mirror of https://github.com/acidanthera/audk.git
CorebootModulePkg/CbSupportDxe: Remove SCI_EN setting
Current implemenation sets PM1_CNT.SCI_EN bit at ReadyToBoot event. However, this should not be done because this causes OS to skip triggering FADT.SMI_CMD, which leads to the functions implemented in the SMI handler being omitted. This issue was identified by Matt Delco <delco@google.com>. The fix does the following: - The SCI_EN bit setting is removed from CbSupportDxe driver. - Some additional checks are added in CbParseFadtInfo() in CbParseLib.c to output some error message and ASSERT (FALSE) if ALL of the following conditions are met: 1) HARDWARE_REDUCED_ACPI is not set; 2) SMI_CMD field is zero; 3) SCI_EN bit is zero; which indicates the ACPI enabling status is inconsistent: SCI is not enabled but the ACPI table does not provide a means to enable it through FADT->SMI_CMD. This may cause issues in OS. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Prince Agyeman <prince.agyeman@intel.com> Cc: Matt Delco <delco@google.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Benjamin You <benjamin.you@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Matt Delco <delco@google.com>
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@ -14,7 +14,6 @@
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**/
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**/
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#include "CbSupportDxe.h"
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#include "CbSupportDxe.h"
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UINTN mPmCtrlReg = 0;
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/**
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/**
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Reserve MMIO/IO resource in GCD
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Reserve MMIO/IO resource in GCD
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@ -86,31 +85,6 @@ CbReserveResourceInGcd (
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return Status;
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return Status;
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}
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}
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/**
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Notification function of EVT_GROUP_READY_TO_BOOT event group.
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This is a notification function registered on EVT_GROUP_READY_TO_BOOT event group.
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When the Boot Manager is about to load and execute a boot option, it reclaims variable
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storage if free size is below the threshold.
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@param Event Event whose notification function is being invoked.
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@param Context Pointer to the notification function's context.
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**/
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VOID
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EFIAPI
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OnReadyToBoot (
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IN EFI_EVENT Event,
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IN VOID *Context
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)
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{
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//
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// Enable SCI
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//
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IoOr16 (mPmCtrlReg, BIT0);
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DEBUG ((EFI_D_ERROR, "Enable SCI bit at 0x%lx before boot\n", (UINT64)mPmCtrlReg));
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}
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/**
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/**
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Main entry for the Coreboot Support DXE module.
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Main entry for the Coreboot Support DXE module.
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@ -130,10 +104,8 @@ CbDxeEntryPoint (
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)
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)
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{
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{
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EFI_STATUS Status;
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EFI_STATUS Status;
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EFI_EVENT ReadyToBootEvent;
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EFI_HOB_GUID_TYPE *GuidHob;
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EFI_HOB_GUID_TYPE *GuidHob;
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SYSTEM_TABLE_INFO *pSystemTableInfo;
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SYSTEM_TABLE_INFO *pSystemTableInfo;
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ACPI_BOARD_INFO *pAcpiBoardInfo;
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FRAME_BUFFER_INFO *FbInfo;
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FRAME_BUFFER_INFO *FbInfo;
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Status = EFI_SUCCESS;
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Status = EFI_SUCCESS;
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@ -171,16 +143,6 @@ CbDxeEntryPoint (
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ASSERT_EFI_ERROR (Status);
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ASSERT_EFI_ERROR (Status);
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}
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}
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//
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// Find the acpi board information guid hob
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//
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GuidHob = GetFirstGuidHob (&gUefiAcpiBoardInfoGuid);
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ASSERT (GuidHob != NULL);
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pAcpiBoardInfo = (ACPI_BOARD_INFO *)GET_GUID_HOB_DATA (GuidHob);
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mPmCtrlReg = (UINTN)pAcpiBoardInfo->PmCtrlRegBase;
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DEBUG ((EFI_D_ERROR, "PmCtrlReg at 0x%lx\n", (UINT64)mPmCtrlReg));
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//
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//
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// Find the frame buffer information and update PCDs
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// Find the frame buffer information and update PCDs
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//
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//
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@ -197,19 +159,6 @@ CbDxeEntryPoint (
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ASSERT_EFI_ERROR (Status);
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ASSERT_EFI_ERROR (Status);
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}
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}
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//
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// Register callback on the ready to boot event
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// in order to enable SCI
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//
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ReadyToBootEvent = NULL;
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Status = EfiCreateEventReadyToBootEx (
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TPL_CALLBACK,
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OnReadyToBoot,
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NULL,
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&ReadyToBootEvent
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);
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ASSERT_EFI_ERROR (Status);
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return EFI_SUCCESS;
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return EFI_SUCCESS;
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}
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}
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@ -46,7 +46,6 @@
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DebugLib
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DebugLib
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BaseMemoryLib
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BaseMemoryLib
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UefiLib
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UefiLib
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IoLib
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HobLib
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HobLib
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[Guids]
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[Guids]
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@ -18,6 +18,7 @@
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#include <Library/BaseMemoryLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/DebugLib.h>
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#include <Library/DebugLib.h>
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#include <Library/PcdLib.h>
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#include <Library/PcdLib.h>
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#include <Library/IoLib.h>
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#include <Library/CbParseLib.h>
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#include <Library/CbParseLib.h>
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#include <IndustryStandard/Acpi.h>
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#include <IndustryStandard/Acpi.h>
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@ -477,6 +478,39 @@ CbParseFadtInfo (
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ASSERT(Fadt->Pm1aEvtBlk != 0);
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ASSERT(Fadt->Pm1aEvtBlk != 0);
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ASSERT(Fadt->Gpe0Blk != 0);
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ASSERT(Fadt->Gpe0Blk != 0);
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DEBUG_CODE_BEGIN ();
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BOOLEAN SciEnabled;
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//
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// Check the consistency of SCI enabling
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//
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//
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// Get SCI_EN value
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//
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if (Fadt->Pm1CntLen == 4) {
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SciEnabled = (IoRead32 (Fadt->Pm1aCntBlk) & BIT0)? TRUE : FALSE;
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} else {
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//
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// if (Pm1CntLen == 2), use 16 bit IO read;
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// if (Pm1CntLen != 2 && Pm1CntLen != 4), use 16 bit IO read as a fallback
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//
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SciEnabled = (IoRead16 (Fadt->Pm1aCntBlk) & BIT0)? TRUE : FALSE;
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}
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if (!(Fadt->Flags & EFI_ACPI_5_0_HW_REDUCED_ACPI) &&
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(Fadt->SmiCmd == 0) &&
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!SciEnabled) {
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//
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// The ACPI enabling status is inconsistent: SCI is not enabled but ACPI
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// table does not provide a means to enable it through FADT->SmiCmd
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//
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DEBUG ((DEBUG_ERROR, "ERROR: The ACPI enabling status is inconsistent: SCI is not"
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" enabled but the ACPI table does not provide a means to enable it through FADT->SmiCmd."
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" This may cause issues in OS.\n"));
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ASSERT (FALSE);
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}
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DEBUG_CODE_END ();
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return RETURN_SUCCESS;
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return RETURN_SUCCESS;
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}
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}
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}
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}
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@ -37,7 +37,8 @@
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[LibraryClasses]
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[LibraryClasses]
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BaseLib
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BaseLib
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BaseMemoryLib
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BaseMemoryLib
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DebugLib
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IoLib
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DebugLib
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PcdLib
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PcdLib
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[Pcd]
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[Pcd]
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