ArmPkg: Added new ARM Processor Feature Register definitions

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15552 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Olivier Martin 2014-06-03 16:39:23 +00:00 committed by oliviermartin
parent 01674afdad
commit 27331bff97
3 changed files with 9 additions and 3 deletions

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@ -33,6 +33,7 @@
// ID_AA64PFR0 - AArch64 Processor Feature Register 0 definitions
#define AARCH64_PFR0_FP (0xF << 16)
#define AARCH64_PFR0_GIC (0xF << 24)
// SCR - Secure Configuration Register definitions
#define SCR_NS (1 << 0)

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@ -22,6 +22,11 @@
// ARM Interrupt ID in Exception Table
#define ARM_ARCH_EXCEPTION_IRQ EXCEPT_ARM_IRQ
// ID_PFR1 - ARM Processor Feature Register 1 definitions
#define ARM_PFR1_SEC (0xFUL << 4)
#define ARM_PFR1_TIMER (0xFUL << 16)
#define ARM_PFR1_GIC (0xFUL << 28)
// Domain Access Control Register
#define DOMAIN_ACCESS_CONTROL_MASK(a) (3UL << (2 * (a)))
#define DOMAIN_ACCESS_CONTROL_NONE(a) (0UL << (2 * (a)))

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@ -1,7 +1,7 @@
/** @file
Generic ARM implementation of TimerLib.h
Copyright (c) 2011-2013, ARM Limited. All rights reserved.
Copyright (c) 2011-2014, ARM Limited. All rights reserved.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@ -46,7 +46,7 @@ TimerConstructor (
#ifdef MDE_CPU_ARM
// Only set the frequency for ARMv7. We expect the secure firmware to have already do it
// If the security extensions are not implemented set Timer Frequency
if ((ArmReadIdPfr1 () & 0xF0) == 0x0) {
if ((ArmReadIdPfr1 () & ARM_PFR1_SEC) == 0x0) {
ArmArchTimerSetTimerFreq (PcdGet32 (PcdArmArchTimerFreqInHz));
}
#endif