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OvmfPkg/PlatformPei: PeiMemory: stop using mPlatformInfoHob 

Stop using the mPlatformInfoHob global variable in PublishPeiMemory()
and GetPeiMemoryCap() functions.  Pass a pointer to the PlatformInfoHob
instead.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Tested-by: Tom Lendacky <thomas.lendacky@amd.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
This commit is contained in:
Gerd Hoffmann 2022-12-02 14:10:01 +01:00 committed by mergify[bot]
parent 00743d144b
commit 27874a382c
3 changed files with 20 additions and 20 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

36
OvmfPkg/PlatformPei/MemDetect.c
View File

@ -188,7 +188,7 @@ AddressWidthInitialization (
STATIC
UINT32
GetPeiMemoryCap (
VOID
IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob
)
{
BOOLEAN Page1GSupport;
@ -225,15 +225,15 @@ GetPeiMemoryCap (
}
}
if (mPlatformInfoHob.PhysMemAddressWidth <= 39) {
if (PlatformInfoHob->PhysMemAddressWidth <= 39) {
Pml4Entries = 1;
PdpEntries = 1 << (mPlatformInfoHob.PhysMemAddressWidth - 30);
PdpEntries = 1 << (PlatformInfoHob->PhysMemAddressWidth - 30);
ASSERT (PdpEntries <= 0x200);
} else {
if (mPlatformInfoHob.PhysMemAddressWidth > 48) {
if (PlatformInfoHob->PhysMemAddressWidth > 48) {
Pml4Entries = 0x200;
} else {
Pml4Entries = 1 << (mPlatformInfoHob.PhysMemAddressWidth - 39);
Pml4Entries = 1 << (PlatformInfoHob->PhysMemAddressWidth - 39);
}
ASSERT (Pml4Entries <= 0x200);
@ -260,7 +260,7 @@ GetPeiMemoryCap (
**/
EFI_STATUS
PublishPeiMemory (
VOID
IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob
)
{
EFI_STATUS Status;
@ -271,12 +271,12 @@ PublishPeiMemory (
UINT32 S3AcpiReservedMemoryBase;
UINT32 S3AcpiReservedMemorySize;
LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (&mPlatformInfoHob);
if (mPlatformInfoHob.SmmSmramRequire) {
LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
if (PlatformInfoHob->SmmSmramRequire) {
//
// TSEG is chipped from the end of low RAM
//
LowerMemorySize -= mPlatformInfoHob.Q35TsegMbytes * SIZE_1MB;
LowerMemorySize -= PlatformInfoHob->Q35TsegMbytes * SIZE_1MB;
}
S3AcpiReservedMemoryBase = 0;
@ -287,27 +287,27 @@ PublishPeiMemory (
// downwards. Its size is primarily dictated by CpuMpPei. The formula below
// is an approximation.
//
if (mPlatformInfoHob.S3Supported) {
if (PlatformInfoHob->S3Supported) {
S3AcpiReservedMemorySize = SIZE_512KB +
mPlatformInfoHob.PcdCpuMaxLogicalProcessorNumber *
PlatformInfoHob->PcdCpuMaxLogicalProcessorNumber *
PcdGet32 (PcdCpuApStackSize);
S3AcpiReservedMemoryBase = LowerMemorySize - S3AcpiReservedMemorySize;
LowerMemorySize = S3AcpiReservedMemoryBase;
}
mPlatformInfoHob.S3AcpiReservedMemoryBase = S3AcpiReservedMemoryBase;
mPlatformInfoHob.S3AcpiReservedMemorySize = S3AcpiReservedMemorySize;
PlatformInfoHob->S3AcpiReservedMemoryBase = S3AcpiReservedMemoryBase;
PlatformInfoHob->S3AcpiReservedMemorySize = S3AcpiReservedMemorySize;
if (mPlatformInfoHob.BootMode == BOOT_ON_S3_RESUME) {
if (PlatformInfoHob->BootMode == BOOT_ON_S3_RESUME) {
MemoryBase = S3AcpiReservedMemoryBase;
MemorySize = S3AcpiReservedMemorySize;
} else {
PeiMemoryCap = GetPeiMemoryCap ();
PeiMemoryCap = GetPeiMemoryCap (PlatformInfoHob);
DEBUG ((
DEBUG_INFO,
"%a: PhysMemAddressWidth=%d PeiMemoryCap=%u KB\n",
__FUNCTION__,
mPlatformInfoHob.PhysMemAddressWidth,
PlatformInfoHob->PhysMemAddressWidth,
PeiMemoryCap >> 10
));
@ -321,7 +321,7 @@ PublishPeiMemory (
// allocation HOB, and other allocations served from the permanent PEI RAM
// shouldn't overlap with that HOB.
//
MemoryBase = mPlatformInfoHob.S3Supported && mPlatformInfoHob.SmmSmramRequire ?
MemoryBase = PlatformInfoHob->S3Supported && PlatformInfoHob->SmmSmramRequire ?
PcdGet32 (PcdOvmfDecompressionScratchEnd) :
PcdGet32 (PcdOvmfDxeMemFvBase) + PcdGet32 (PcdOvmfDxeMemFvSize);
MemorySize = LowerMemorySize - MemoryBase;
@ -336,7 +336,7 @@ PublishPeiMemory (
// normal boot permanent PEI RAM. Regarding the S3 boot path, the S3
// permanent PEI RAM is located even higher.
//
if (mPlatformInfoHob.SmmSmramRequire && mPlatformInfoHob.Q35SmramAtDefaultSmbase) {
if (PlatformInfoHob->SmmSmramRequire && PlatformInfoHob->Q35SmramAtDefaultSmbase) {
ASSERT (SMM_DEFAULT_SMBASE + MCH_DEFAULT_SMBASE_SIZE <= MemoryBase);
}

2
OvmfPkg/PlatformPei/Platform.c
View File

@ -361,7 +361,7 @@ InitializePlatform (
Q35SmramAtDefaultSmbaseInitialization (&mPlatformInfoHob);
}
PublishPeiMemory ();
PublishPeiMemory (&mPlatformInfoHob);
PlatformQemuUc32BaseInitialization (&mPlatformInfoHob);

2
OvmfPkg/PlatformPei/Platform.h
View File

@ -32,7 +32,7 @@ Q35SmramAtDefaultSmbaseInitialization (
EFI_STATUS
PublishPeiMemory (
VOID
IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob
);
VOID