ArmPkg: Tidy assembler code

- Fixed typo
- Removed unreachable 'dead' loop

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15277 6f19259b-4bc3-4df7-8a09-765794883524

ArmPkg/Drivers/CpuDxe/AArch64/ExceptionSupport.S

@@ -376,6 +376,3 @@ ASM_PFX(AsmCommonExceptionEntry):
 
 #undef REG_PAIR
 #undef REG_ONE
-
-dead:
-  b        dead

ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S

@@ -74,16 +74,16 @@ ASM_PFX(ArmWriteCpacr):
 ASM_PFX(ArmWriteAuxCr):
   EL1_OR_EL2(x1)
 1:msr     actlr_el1, x0      // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
-  b       3f
+  ret
 2:msr     actlr_el2, x0      // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
-3:ret
+  ret
 
 ASM_PFX(ArmReadAuxCr):
   EL1_OR_EL2(x1)
 1:mrs     x0, actlr_el1      // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
-  b       3f
+  ret
 2:mrs     x0, actlr_el2      // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
-3:ret
+  ret
 
 ASM_PFX(ArmSetTTBR0):
   EL1_OR_EL2_OR_EL3(x1)
@@ -185,7 +185,7 @@ ASM_PFX(ArmWriteScr):
   ret
 
 ASM_PFX(ArmWriteMVBar):
-  msr    vbar_el3, x0            // Excpetion Vector Base address for Monitor on EL3
+  msr    vbar_el3, x0            // Exception Vector Base address for Monitor on EL3
   ret
 
 ASM_PFX(ArmCallWFE):

ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.S

@@ -87,7 +87,7 @@ ASM_PFX(CPSRMaskInsert):    @ on entry, r0 is the mask and r1 is the field to in
   isb
   mov     sp, r3            @ restore stack pointer
   ldmfd   sp!, {r4-r12, lr} @ restore registers
-  bx      lr                @ return (hopefully thumb-safe!)             @ return (hopefully thumb-safe!)
+  bx      lr                @ return (hopefully thumb-safe!)
 
 ASM_PFX(CPSRRead):
   mrs     r0, cpsr

ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.asm

@@ -171,14 +171,14 @@ ArmWriteMVBar
   
 ArmCallWFE
   wfe
-  blx   lr
+  bx      lr
 
 ArmCallSEV
   sev
-  blx   lr
+  bx      lr
 
 ArmReadSctlr
-  mrc     p15, 0, R0, c1, c0, 0      // Read SCTLR into R0 (Read control register configuration data)
+  mrc     p15, 0, r0, c1, c0, 0      // Read SCTLR into R0 (Read control register configuration data)
   bx	    lr
 
   END

ArmPlatformPkg/PrePeiCore/AArch64/Helper.S

@@ -45,7 +45,4 @@ ASM_PFX(SetupExceptionLevel2):
 
    ret
 
-dead:
-   b       dead
-
 ASM_FUNCTION_REMOVE_IF_UNREFERENCED

ArmPlatformPkg/Sec/AArch64/Helper.S

@@ -92,7 +92,4 @@ ASM_PFX(set_non_secure_mode):
    msr     spsr_el3, x0
    ret
 
-dead:
-   b       dead
-
 ASM_FUNCTION_REMOVE_IF_UNREFERENCED

ArmPlatformPkg/Sec/AArch64/SecEntryPoint.S

@@ -1,5 +1,5 @@
 //
-//  Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+//  Copyright (c) 2011-2014, ARM Limited. All rights reserved.
 //
 //  This program and the accompanying materials
 //  are licensed and made available under the terms and conditions of the BSD License
@@ -141,6 +141,3 @@ _PrepareArguments:
 ASM_PFX(JumpToPEI):
   LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), x0)
   blr   x0
-
-dead:
-  b     dead

ArmPlatformPkg/Sec/Arm/Helper.S

@@ -1,5 +1,5 @@
 #========================================================================================
-#  Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+#  Copyright (c) 2011-2014, ARM Limited. All rights reserved.
 #  
 #  This program and the accompanying materials                          
 #  are licensed and made available under the terms and conditions of the BSD License         
@@ -81,7 +81,4 @@ ASM_PFX(set_non_secure_mode):
     pop     { r1 }
     bx      lr                @ return (hopefully thumb-safe!)
     
-dead:
-    b       dead
-    
 ASM_FUNCTION_REMOVE_IF_UNREFERENCED