mirror of https://github.com/acidanthera/audk.git
PrmPkg: Add initial PrmSampleHardwareAccessModule
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3812 Adds a sample PRM module that demonstrates: 1. How to write a PRM module 2. How to use multiple PRM handlers in a module 3. How to use a basic PRM OS service 4. MSR access at OS runtime Note: This module contains a PRM handler to read from the HPET MMIO range but the memory map changes needed for this to succeed are currently not implemented. These will be implemented in a future change. Cc: Andrew Fish <afish@apple.com> Cc: Kang Gao <kang.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Michael Kubacki <michael.kubacki@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Liu Yun <yun.y.liu@intel.com> Cc: Ankit Sinha <ankit.sinha@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Acked-by: Michael D Kinney <michael.d.kinney@intel.com> Acked-by: Liming Gao <gaoliming@byosoft.com.cn> Acked-by: Leif Lindholm <quic_llindhol@quicinc.com> Reviewed-by: Ankit Sinha <ankit.sinha@intel.com>
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/** @file
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HPET register definitions from the IA-PC HPET (High Precision Event Timers)
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Specification, Revision 1.0a, October 2004.
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PRM Module Note:
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This specific header was copied from PcAtChipsetPkg to avoid a module dependency on the package
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just for this header. This is done for temporary testing purposes of the PRM module.
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Copyright (c) Microsoft Corporation
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Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef HPET_REGISTER_H_
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#define HPET_REGISTER_H_
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///
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/// HPET General Register Offsets
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///
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#define HPET_GENERAL_CAPABILITIES_ID_OFFSET 0x000
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#define HPET_GENERAL_CONFIGURATION_OFFSET 0x010
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#define HPET_GENERAL_INTERRUPT_STATUS_OFFSET 0x020
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///
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/// HPET Timer Register Offsets
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///
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#define HPET_MAIN_COUNTER_OFFSET 0x0F0
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#define HPET_TIMER_CONFIGURATION_OFFSET 0x100
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#define HPET_TIMER_COMPARATOR_OFFSET 0x108
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#define HPET_TIMER_MSI_ROUTE_OFFSET 0x110
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///
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/// Stride between sets of HPET Timer Registers
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///
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#define HPET_TIMER_STRIDE 0x20
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#pragma pack(1)
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///
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/// HPET General Capabilities and ID Register
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///
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typedef union {
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struct {
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UINT32 Revision:8;
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UINT32 NumberOfTimers:5;
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UINT32 CounterSize:1;
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UINT32 Reserved0:1;
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UINT32 LegacyRoute:1;
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UINT32 VendorId:16;
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UINT32 CounterClockPeriod:32;
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} Bits;
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UINT64 Uint64;
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} HPET_GENERAL_CAPABILITIES_ID_REGISTER;
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///
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/// HPET General Configuration Register
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///
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typedef union {
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struct {
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UINT32 MainCounterEnable:1;
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UINT32 LegacyRouteEnable:1;
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UINT32 Reserved0:30;
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UINT32 Reserved1:32;
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} Bits;
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UINT64 Uint64;
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} HPET_GENERAL_CONFIGURATION_REGISTER;
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///
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/// HPET Timer Configuration Register
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///
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typedef union {
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struct {
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UINT32 Reserved0:1;
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UINT32 LevelTriggeredInterrupt:1;
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UINT32 InterruptEnable:1;
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UINT32 PeriodicInterruptEnable:1;
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UINT32 PeriodicInterruptCapability:1;
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UINT32 CounterSizeCapability:1;
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UINT32 ValueSetEnable:1;
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UINT32 Reserved1:1;
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UINT32 CounterSizeEnable:1;
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UINT32 InterruptRoute:5;
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UINT32 MsiInterruptEnable:1;
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UINT32 MsiInterruptCapability:1;
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UINT32 Reserved2:16;
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UINT32 InterruptRouteCapability;
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} Bits;
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UINT64 Uint64;
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} HPET_TIMER_CONFIGURATION_REGISTER;
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///
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/// HPET Timer MSI Route Register
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///
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typedef union {
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struct {
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UINT32 Value:32;
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UINT32 Address:32;
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} Bits;
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UINT64 Uint64;
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} HPET_TIMER_MSI_ROUTE_REGISTER;
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#pragma pack()
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#endif
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@ -0,0 +1,537 @@
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/** @file
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A sample PRM Module implementation. This PRM Module provides PRM handlers that perform various types
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of hardware access. This is simply meant to demonstrate hardware access capabilities from a PRM handler.
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Copyright (c) Microsoft Corporation
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <PrmModule.h>
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#include <Library/BaseLib.h>
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#include <Library/MtrrLib.h>
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#include <Library/PrintLib.h>
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#include <Library/UefiLib.h>
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#include <Register/Intel/ArchitecturalMsr.h>
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#include <Register/Intel/Cpuid.h>
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#include "Hpet.h"
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//
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// PRM Handler GUIDs
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//
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// {2120cd3c-848b-4d8f-abbb-4b74ce64ac89}
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#define MSR_ACCESS_MICROCODE_SIGNATURE_PRM_HANDLER_GUID {0x2120cd3c, 0x848b, 0x4d8f, {0xab, 0xbb, 0x4b, 0x74, 0xce, 0x64, 0xac, 0x89}}
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// {ea0935a7-506b-4159-bbbb-48deeecb6f58}
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#define MSR_ACCESS_MTRR_DUMP_PRM_HANDLER_GUID {0xea0935a7, 0x506b, 0x4159, {0xbb, 0xbb, 0x48, 0xde, 0xee, 0xcb, 0x6f, 0x58}}
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// {1bd1bda9-909a-4614-9699-25ec0c2783f7}
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#define MMIO_ACCESS_HPET_PRM_HANDLER_GUID {0x1bd1bda9, 0x909a, 0x4614, {0x96, 0x99, 0x25, 0xec, 0x0c, 0x27, 0x83, 0xf7}}
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#define HPET_BASE_ADDRESS 0xFED00000
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//
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// BEGIN: MtrrLib internal library globals and function prototypes here for testing
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//
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extern CONST CHAR8 *mMtrrMemoryCacheTypeShortName[];
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/**
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Initializes the valid bits mask and valid address mask for MTRRs.
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This function initializes the valid bits mask and valid address mask for MTRRs.
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@param[out] MtrrValidBitsMask The mask for the valid bit of the MTRR
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@param[out] MtrrValidAddressMask The valid address mask for the MTRR
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**/
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VOID
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MtrrLibInitializeMtrrMask (
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OUT UINT64 *MtrrValidBitsMask,
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OUT UINT64 *MtrrValidAddressMask
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);
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/**
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Convert variable MTRRs to a RAW MTRR_MEMORY_RANGE array.
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One MTRR_MEMORY_RANGE element is created for each MTRR setting.
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The routine doesn't remove the overlap or combine the near-by region.
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@param[in] VariableSettings The variable MTRR values to shadow
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@param[in] VariableMtrrCount The number of variable MTRRs
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@param[in] MtrrValidBitsMask The mask for the valid bit of the MTRR
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@param[in] MtrrValidAddressMask The valid address mask for MTRR
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@param[out] VariableMtrr The array to shadow variable MTRRs content
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@return Number of MTRRs which has been used.
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**/
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UINT32
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MtrrLibGetRawVariableRanges (
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IN MTRR_VARIABLE_SETTINGS *VariableSettings,
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IN UINTN VariableMtrrCount,
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IN UINT64 MtrrValidBitsMask,
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IN UINT64 MtrrValidAddressMask,
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OUT MTRR_MEMORY_RANGE *VariableMtrr
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);
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/**
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Apply the fixed MTRR settings to memory range array.
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@param Fixed The fixed MTRR settings.
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@param Ranges Return the memory range array holding memory type
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settings for all memory address.
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@param RangeCapacity The capacity of memory range array.
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@param RangeCount Return the count of memory range.
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@retval RETURN_SUCCESS The memory range array is returned successfully.
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@retval RETURN_OUT_OF_RESOURCES The count of memory ranges exceeds capacity.
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**/
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RETURN_STATUS
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MtrrLibApplyFixedMtrrs (
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IN MTRR_FIXED_SETTINGS *Fixed,
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IN OUT MTRR_MEMORY_RANGE *Ranges,
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IN UINTN RangeCapacity,
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IN OUT UINTN *RangeCount
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);
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/**
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Apply the variable MTRR settings to memory range array.
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@param VariableMtrr The variable MTRR array.
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@param VariableMtrrCount The count of variable MTRRs.
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@param Ranges Return the memory range array with new MTRR settings applied.
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@param RangeCapacity The capacity of memory range array.
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@param RangeCount Return the count of memory range.
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@retval RETURN_SUCCESS The memory range array is returned successfully.
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@retval RETURN_OUT_OF_RESOURCES The count of memory ranges exceeds capacity.
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**/
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RETURN_STATUS
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MtrrLibApplyVariableMtrrs (
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IN CONST MTRR_MEMORY_RANGE *VariableMtrr,
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IN UINT32 VariableMtrrCount,
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IN OUT MTRR_MEMORY_RANGE *Ranges,
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IN UINTN RangeCapacity,
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IN OUT UINTN *RangeCount
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);
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//
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// END: MtrrLib internal library function prototypes here for testing
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//
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/**
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Prints all MTRR values including architectural and variable MTTRs.
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**/
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VOID
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EFIAPI
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PrintAllMtrrs (
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IN PRM_OS_SERVICE_DEBUG_PRINT OsServiceDebugPrint
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)
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{
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MTRR_SETTINGS LocalMtrrs;
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MTRR_SETTINGS *Mtrrs;
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UINTN Index;
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UINTN RangeCount;
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UINT64 MtrrValidBitsMask;
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UINT64 MtrrValidAddressMask;
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UINT32 VariableMtrrCount;
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BOOLEAN ContainVariableMtrr;
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CHAR8 DebugMessage[256];
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MTRR_MEMORY_RANGE Ranges[
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MTRR_NUMBER_OF_FIXED_MTRR * sizeof (UINT64) + 2 * ARRAY_SIZE (Mtrrs->Variables.Mtrr) + 1
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];
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MTRR_MEMORY_RANGE RawVariableRanges[ARRAY_SIZE (Mtrrs->Variables.Mtrr)];
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if (OsServiceDebugPrint == NULL || !IsMtrrSupported ()) {
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return;
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}
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VariableMtrrCount = GetVariableMtrrCount ();
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MtrrGetAllMtrrs (&LocalMtrrs);
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Mtrrs = &LocalMtrrs;
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//
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// Dump RAW MTRR contents
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//
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OsServiceDebugPrint (" MTRR Settings:\n");
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OsServiceDebugPrint (" =============\n");
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AsciiSPrint (
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&DebugMessage[0],
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ARRAY_SIZE (DebugMessage),
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" MTRR Default Type: %016lx\n",
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Mtrrs->MtrrDefType
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);
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OsServiceDebugPrint (&DebugMessage[0]);
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for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
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AsciiSPrint (
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&DebugMessage[0],
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ARRAY_SIZE (DebugMessage),
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" Fixed MTRR[%02d] : %016lx\n",
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Index,
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Mtrrs->Fixed.Mtrr[Index]
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);
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OsServiceDebugPrint (&DebugMessage[0]);
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}
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ContainVariableMtrr = FALSE;
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for (Index = 0; Index < VariableMtrrCount; Index++) {
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if ((Mtrrs->Variables.Mtrr[Index].Mask & BIT11) == 0) {
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//
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// If mask is not valid, then do not display range
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//
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continue;
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}
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ContainVariableMtrr = TRUE;
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AsciiSPrint (
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&DebugMessage[0],
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ARRAY_SIZE (DebugMessage),
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" Variable MTRR[%02d]: Base=%016lx Mask=%016lx\n",
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Index,
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Mtrrs->Variables.Mtrr[Index].Base,
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Mtrrs->Variables.Mtrr[Index].Mask
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);
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OsServiceDebugPrint (&DebugMessage[0]);
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}
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if (!ContainVariableMtrr) {
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OsServiceDebugPrint (" Variable MTRR : None.\n");
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}
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OsServiceDebugPrint ("\n");
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//
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// Dump MTRR setting in ranges
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//
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OsServiceDebugPrint (" Memory Ranges:\n");
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OsServiceDebugPrint (" ====================================\n");
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MtrrLibInitializeMtrrMask (&MtrrValidBitsMask, &MtrrValidAddressMask);
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Ranges[0].BaseAddress = 0;
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Ranges[0].Length = MtrrValidBitsMask + 1;
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Ranges[0].Type = MtrrGetDefaultMemoryType ();
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RangeCount = 1;
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MtrrLibGetRawVariableRanges (
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&Mtrrs->Variables, VariableMtrrCount,
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MtrrValidBitsMask, MtrrValidAddressMask, RawVariableRanges
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);
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MtrrLibApplyVariableMtrrs (
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RawVariableRanges, VariableMtrrCount,
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Ranges, ARRAY_SIZE (Ranges), &RangeCount
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);
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MtrrLibApplyFixedMtrrs (&Mtrrs->Fixed, Ranges, ARRAY_SIZE (Ranges), &RangeCount);
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for (Index = 0; Index < RangeCount; Index++) {
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AsciiSPrint (
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&DebugMessage[0],
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ARRAY_SIZE (DebugMessage),
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" %a:%016lx-%016lx\n",
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mMtrrMemoryCacheTypeShortName[Ranges[Index].Type],
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Ranges[Index].BaseAddress, Ranges[Index].BaseAddress + Ranges[Index].Length - 1
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);
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OsServiceDebugPrint (&DebugMessage[0]);
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}
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}
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/**
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Reads a HPET MMIO register.
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Reads the 64-bit HPET MMIO register specified by Address.
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This function must guarantee that all MMIO read and write
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operations are serialized.
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If Address is not aligned on a 64-bit boundary, zero will be returned.
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@param Offset Specifies the offset of the HPET register to read.
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@return The value read.
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**/
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UINT64
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EFIAPI
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HpetRead (
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IN UINTN Offset
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)
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{
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UINTN Address;
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UINT64 Value;
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Address = HPET_BASE_ADDRESS + Offset;
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if ((Address & 7) == 0) {
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return 0;
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}
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MemoryFence ();
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Value = *(volatile UINT64*)Address;
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MemoryFence ();
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return Value;
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}
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/**
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Prints HPET configuration information.
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**/
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VOID
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EFIAPI
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PrintHpetConfiguration (
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IN PRM_OS_SERVICE_DEBUG_PRINT OsServiceDebugPrint
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)
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{
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UINTN TimerIndex;
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HPET_GENERAL_CAPABILITIES_ID_REGISTER HpetGeneralCapabilities;
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HPET_GENERAL_CONFIGURATION_REGISTER HpetGeneralConfiguration;
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CHAR8 DebugMessage[256];
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if (OsServiceDebugPrint == NULL) {
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return;
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}
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HpetGeneralCapabilities.Uint64 = HpetRead (HPET_GENERAL_CAPABILITIES_ID_OFFSET);
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HpetGeneralConfiguration.Uint64 = HpetRead (HPET_GENERAL_CONFIGURATION_OFFSET);
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AsciiSPrint (
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&DebugMessage[0],
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ARRAY_SIZE (DebugMessage),
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" HPET Base Address = 0x%08x\n",
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HPET_BASE_ADDRESS
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);
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OsServiceDebugPrint (&DebugMessage[0]);
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AsciiSPrint (
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&DebugMessage[0],
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ARRAY_SIZE (DebugMessage),
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" HPET_GENERAL_CAPABILITIES_ID = 0x%016lx\n",
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HpetGeneralCapabilities
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);
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OsServiceDebugPrint (&DebugMessage[0]);
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AsciiSPrint (
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&DebugMessage[0],
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ARRAY_SIZE (DebugMessage),
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" HPET_GENERAL_CONFIGURATION = 0x%016lx\n",
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HpetGeneralConfiguration.Uint64
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);
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OsServiceDebugPrint (&DebugMessage[0]);
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AsciiSPrint (
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&DebugMessage[0],
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ARRAY_SIZE (DebugMessage),
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" HPET_GENERAL_INTERRUPT_STATUS = 0x%016lx\n",
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HpetRead (HPET_GENERAL_INTERRUPT_STATUS_OFFSET)
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);
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OsServiceDebugPrint (&DebugMessage[0]);
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AsciiSPrint (
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&DebugMessage[0],
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ARRAY_SIZE (DebugMessage),
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" HPET_MAIN_COUNTER = 0x%016lx\n",
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HpetRead (HPET_MAIN_COUNTER_OFFSET)
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);
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OsServiceDebugPrint (&DebugMessage[0]);
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AsciiSPrint (
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&DebugMessage[0],
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ARRAY_SIZE (DebugMessage),
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" HPET Main Counter Period = %d (fs)\n",
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HpetGeneralCapabilities.Bits.CounterClockPeriod
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);
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OsServiceDebugPrint (&DebugMessage[0]);
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for (TimerIndex = 0; TimerIndex <= HpetGeneralCapabilities.Bits.NumberOfTimers; TimerIndex++) {
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AsciiSPrint (
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&DebugMessage[0],
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ARRAY_SIZE (DebugMessage),
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" HPET_TIMER%d_CONFIGURATION = 0x%016lx\n",
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TimerIndex,
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HpetRead (HPET_TIMER_CONFIGURATION_OFFSET + TimerIndex * HPET_TIMER_STRIDE)
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);
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OsServiceDebugPrint (&DebugMessage[0]);
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AsciiSPrint (
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&DebugMessage[0],
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ARRAY_SIZE (DebugMessage),
|
||||
" HPET_TIMER%d_COMPARATOR = 0x%016lx\n",
|
||||
TimerIndex,
|
||||
HpetRead (HPET_TIMER_COMPARATOR_OFFSET + TimerIndex * HPET_TIMER_STRIDE)
|
||||
);
|
||||
OsServiceDebugPrint (&DebugMessage[0]);
|
||||
|
||||
AsciiSPrint (
|
||||
&DebugMessage[0],
|
||||
ARRAY_SIZE (DebugMessage),
|
||||
" HPET_TIMER%d_MSI_ROUTE = 0x%016lx\n",
|
||||
TimerIndex,
|
||||
HpetRead (HPET_TIMER_MSI_ROUTE_OFFSET + TimerIndex * HPET_TIMER_STRIDE)
|
||||
);
|
||||
OsServiceDebugPrint (&DebugMessage[0]);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
Prints the microcode update signature as read from architectural MSR 0x8B.
|
||||
|
||||
**/
|
||||
VOID
|
||||
EFIAPI
|
||||
PrintMicrocodeUpdateSignature (
|
||||
IN PRM_OS_SERVICE_DEBUG_PRINT OsServiceDebugPrint
|
||||
)
|
||||
{
|
||||
MSR_IA32_BIOS_SIGN_ID_REGISTER BiosSignIdMsr;
|
||||
CHAR8 DebugMessage[256];
|
||||
|
||||
if (OsServiceDebugPrint == NULL) {
|
||||
return;
|
||||
}
|
||||
|
||||
AsmWriteMsr64 (MSR_IA32_BIOS_SIGN_ID, 0);
|
||||
AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, NULL);
|
||||
BiosSignIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_BIOS_SIGN_ID);
|
||||
|
||||
AsciiSPrint (
|
||||
&DebugMessage[0],
|
||||
ARRAY_SIZE (DebugMessage),
|
||||
" Signature read = 0x%x.\n",
|
||||
BiosSignIdMsr.Bits.MicrocodeUpdateSignature
|
||||
);
|
||||
OsServiceDebugPrint (&DebugMessage[0]);
|
||||
}
|
||||
|
||||
/**
|
||||
A sample Platform Runtime Mechanism (PRM) handler.
|
||||
|
||||
This sample handler attempts to read the microcode update signature MSR and print the result to a debug message.
|
||||
|
||||
@param[in] ParameterBuffer A pointer to the PRM handler parameter buffer
|
||||
@param[in] ContextBUffer A pointer to the PRM handler context buffer
|
||||
|
||||
@retval EFI_STATUS The PRM handler executed successfully.
|
||||
@retval Others An error occurred in the PRM handler.
|
||||
|
||||
**/
|
||||
PRM_HANDLER_EXPORT (MsrAccessMicrocodeSignaturePrmHandler)
|
||||
{
|
||||
PRM_OS_SERVICE_DEBUG_PRINT OsServiceDebugPrint;
|
||||
|
||||
if (ParameterBuffer == NULL) {
|
||||
return EFI_INVALID_PARAMETER;
|
||||
}
|
||||
|
||||
// In the POC, the OS debug print service is assumed to be at the beginning of ParameterBuffer
|
||||
OsServiceDebugPrint = *((PRM_OS_SERVICE_DEBUG_PRINT *) ParameterBuffer);
|
||||
if (OsServiceDebugPrint == NULL) {
|
||||
return EFI_INVALID_PARAMETER;
|
||||
}
|
||||
|
||||
OsServiceDebugPrint ("Hardware Access MsrAccessMicrocodeSignaturePrmHandler entry.\n");
|
||||
OsServiceDebugPrint (" Attempting to read the Microcode Update Signature MSR (0x8B)...\n");
|
||||
PrintMicrocodeUpdateSignature (OsServiceDebugPrint);
|
||||
OsServiceDebugPrint ("Hardware Access MsrAccessMicrocodeSignaturePrmHandler exit.\n");
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
A sample Platform Runtime Mechanism (PRM) handler.
|
||||
|
||||
This sample handler attempts to read the current MTRR settings and print the result to a debug message.
|
||||
|
||||
@param[in] ParameterBuffer A pointer to the PRM handler parameter buffer
|
||||
@param[in] ContextBUffer A pointer to the PRM handler context buffer
|
||||
|
||||
@retval EFI_STATUS The PRM handler executed successfully.
|
||||
@retval Others An error occurred in the PRM handler.
|
||||
|
||||
**/
|
||||
PRM_HANDLER_EXPORT (MsrAccessMtrrDumpPrmHandler)
|
||||
{
|
||||
PRM_OS_SERVICE_DEBUG_PRINT OsServiceDebugPrint;
|
||||
|
||||
if (ParameterBuffer == NULL) {
|
||||
return EFI_INVALID_PARAMETER;
|
||||
}
|
||||
|
||||
// In the POC, the OS debug print service is assumed to be at the beginning of ParameterBuffer
|
||||
OsServiceDebugPrint = *((PRM_OS_SERVICE_DEBUG_PRINT *) ParameterBuffer);
|
||||
if (OsServiceDebugPrint == NULL) {
|
||||
return EFI_INVALID_PARAMETER;
|
||||
}
|
||||
|
||||
OsServiceDebugPrint ("Hardware Access MsrAccessMtrrDumpPrmHandler entry.\n");
|
||||
OsServiceDebugPrint (" Attempting to dump MTRR values:\n");
|
||||
PrintAllMtrrs (OsServiceDebugPrint);
|
||||
OsServiceDebugPrint ("Hardware Access MsrAccessMtrrDumpPrmHandler exit.\n");
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
A sample Platform Runtime Mechanism (PRM) handler.
|
||||
|
||||
This sample handler attempts to read from a HPET MMIO resource and print the result to a debug message.
|
||||
|
||||
@param[in] ParameterBuffer A pointer to the PRM handler parameter buffer
|
||||
@param[in] ContextBUffer A pointer to the PRM handler context buffer
|
||||
|
||||
@retval EFI_STATUS The PRM handler executed successfully.
|
||||
@retval Others An error occurred in the PRM handler.
|
||||
|
||||
**/
|
||||
PRM_HANDLER_EXPORT (MmioAccessHpetPrmHandler)
|
||||
{
|
||||
PRM_OS_SERVICE_DEBUG_PRINT OsServiceDebugPrint;
|
||||
|
||||
if (ParameterBuffer == NULL) {
|
||||
return EFI_INVALID_PARAMETER;
|
||||
}
|
||||
|
||||
// In the POC, the OS debug print service is assumed to be at the beginning of ParameterBuffer
|
||||
OsServiceDebugPrint = *((PRM_OS_SERVICE_DEBUG_PRINT *) ParameterBuffer);
|
||||
if (OsServiceDebugPrint == NULL) {
|
||||
return EFI_INVALID_PARAMETER;
|
||||
}
|
||||
|
||||
OsServiceDebugPrint ("Hardware Access MmioAccessHpetPrmHandler entry.\n");
|
||||
OsServiceDebugPrint (" Attempting to read HPET configuration...\n");
|
||||
PrintHpetConfiguration (OsServiceDebugPrint);
|
||||
OsServiceDebugPrint ("Hardware Access MmioAccessHpetPrmHandler exit.\n");
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
//
|
||||
// Register the PRM export information for this PRM Module
|
||||
//
|
||||
PRM_MODULE_EXPORT (
|
||||
PRM_HANDLER_EXPORT_ENTRY (MSR_ACCESS_MICROCODE_SIGNATURE_PRM_HANDLER_GUID, MsrAccessMicrocodeSignaturePrmHandler),
|
||||
PRM_HANDLER_EXPORT_ENTRY (MSR_ACCESS_MTRR_DUMP_PRM_HANDLER_GUID, MsrAccessMtrrDumpPrmHandler),
|
||||
PRM_HANDLER_EXPORT_ENTRY (MMIO_ACCESS_HPET_PRM_HANDLER_GUID, MmioAccessHpetPrmHandler)
|
||||
);
|
||||
|
||||
/**
|
||||
Module entry point.
|
||||
|
||||
@param[in] ImageHandle The image handle.
|
||||
@param[in] SystemTable A pointer to the system table.
|
||||
|
||||
@retval EFI_SUCCESS This function always returns success.
|
||||
|
||||
**/
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
PrmSampleHardwareAccessModuleInit (
|
||||
IN EFI_HANDLE ImageHandle,
|
||||
IN EFI_SYSTEM_TABLE *SystemTable
|
||||
)
|
||||
{
|
||||
return EFI_SUCCESS;
|
||||
}
|
|
@ -0,0 +1,42 @@
|
|||
## @file
|
||||
# Sample PRM Driver
|
||||
#
|
||||
# A sample PRM Module implementation. This PRM Module provides PRM handlers that perform various types
|
||||
# of hardware access. This is simply meant to demonstrate hardware access capabilities from a PRM handler.
|
||||
#
|
||||
# Copyright (c) Microsoft Corporation
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
##
|
||||
|
||||
[Defines]
|
||||
INF_VERSION = 0x00010005
|
||||
BASE_NAME = PrmSampleHardwareAccessModule
|
||||
FILE_GUID = 0EF93ED7-14AE-425B-928F-B85A6213B57E
|
||||
MODULE_TYPE = DXE_RUNTIME_DRIVER
|
||||
VERSION_STRING = 1.0
|
||||
ENTRY_POINT = PrmSampleHardwareAccessModuleInit
|
||||
|
||||
[Sources]
|
||||
Hpet.h
|
||||
PrmSampleHardwareAccessModule.c
|
||||
|
||||
[Packages]
|
||||
MdePkg/MdePkg.dec
|
||||
MdeModulePkg/MdeModulePkg.dec
|
||||
UefiCpuPkg/UefiCpuPkg.dec
|
||||
PrmPkg/PrmPkg.dec
|
||||
|
||||
[LibraryClasses]
|
||||
BaseLib
|
||||
MtrrLib
|
||||
PrintLib
|
||||
UefiDriverEntryPoint
|
||||
UefiLib
|
||||
|
||||
[Depex]
|
||||
TRUE
|
||||
|
||||
[BuildOptions.common]
|
||||
MSFT:*_*_*_DLINK_FLAGS = /DLL /SUBSYSTEM:CONSOLE /VERSION:1.0
|
Loading…
Reference in New Issue