mirror of https://github.com/acidanthera/audk.git
Vlv2TbltDevicePkg: Sync FLASH libraries from UDK2017 branch
https://bugzilla.tianocore.org/show_bug.cgi?id=911 Update Minnow Max FLASH libraries to match libraries in the UDK2017 development branch in edk2-platforms. https://github.com/tianocore/edk2-platforms/tree/devel-MinnowBoardMax-UDK2017 Cc: David Wei <david.wei@intel.com> Cc: Mang Guo <mang.guo@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: David Wei <david.wei@intel.com> Reviewed-by: Guo Mang <mang.guo@intel.com>
This commit is contained in:
Kinney, Michael D
parent
af7bc37a00
commit
27f44846ac
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@ -1,7 +1,7 @@
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/** @file
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Platform Flash Access library.
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Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -11,6 +11,7 @@
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <Uefi.h>
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#include <PiDxe.h>
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@ -19,14 +20,366 @@
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#include <Library/DebugLib.h>
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#include <Library/PcdLib.h>
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#include <Library/PlatformFlashAccessLib.h>
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#include <Library/FlashDeviceLib.h>
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//#include <Library/FlashDeviceLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Protocol/Spi.h>
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#include <Library/CacheMaintenanceLib.h>
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#include "PchAccess.h"
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#include <Library/IoLib.h>
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#include <Library/UefiLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Library/PrintLib.h>
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#define SECTOR_SIZE_64KB 0x10000 // Common 64kBytes sector size
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#define ALINGED_SIZE SECTOR_SIZE_64KB
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//#define SECTOR_SIZE_64KB 0x10000 // Common 64kBytes sector size
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//#define ALINGED_SIZE SECTOR_SIZE_64KB
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#define BLOCK_SIZE 0x1000
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#define ALINGED_SIZE BLOCK_SIZE
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#define R_PCH_LPC_BIOS_CNTL 0xDC
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#define B_PCH_LPC_BIOS_CNTL_SMM_BWP 0x20 ///< SMM BIOS write protect disable
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//
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// Prefix Opcode Index on the host SPI controller
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//
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typedef enum {
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SPI_WREN, // Prefix Opcode 0: Write Enable
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SPI_EWSR, // Prefix Opcode 1: Enable Write Status Register
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} PREFIX_OPCODE_INDEX;
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//
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// Opcode Menu Index on the host SPI controller
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//
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typedef enum {
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SPI_READ_ID, // Opcode 0: READ ID, Read cycle with address
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SPI_READ, // Opcode 1: READ, Read cycle with address
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SPI_RDSR, // Opcode 2: Read Status Register, No address
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SPI_WRDI_SFDP, // Opcode 3: Write Disable or Discovery Parameters, No address
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SPI_SERASE, // Opcode 4: Sector Erase (4KB), Write cycle with address
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SPI_BERASE, // Opcode 5: Block Erase (32KB), Write cycle with address
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SPI_PROG, // Opcode 6: Byte Program, Write cycle with address
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SPI_WRSR, // Opcode 7: Write Status Register, No address
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} SPI_OPCODE_INDEX;
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STATIC EFI_PHYSICAL_ADDRESS mInternalFdAddress;
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EFI_SPI_PROTOCOL *mSpiProtocol;
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/**
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Read NumBytes bytes of data from the address specified by
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PAddress into Buffer.
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@param[in] Address The starting physical address of the read.
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@param[in,out] NumBytes On input, the number of bytes to read. On output, the number
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of bytes actually read.
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@param[out] Buffer The destination data buffer for the read.
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@retval EFI_SUCCESS Opertion is successful.
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@retval EFI_DEVICE_ERROR If there is any device errors.
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**/
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EFI_STATUS
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EFIAPI
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SpiFlashRead (
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IN UINTN Address,
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IN OUT UINT32 *NumBytes,
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OUT UINT8 *Buffer
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)
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{
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EFI_STATUS Status = EFI_SUCCESS;
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UINTN Offset = 0;
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ASSERT ((NumBytes != NULL) && (Buffer != NULL));
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//if (Address >= (UINTN)PcdGet32 (PcdGbeRomBase) && Address < (UINTN)PcdGet32 (PcdPDRRomBase)) {
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Offset = Address - (UINTN)PcdGet32 (PcdFlashChipBase);
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Status = mSpiProtocol->Execute (
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mSpiProtocol,
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1, //SPI_READ,
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0, //SPI_WREN,
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TRUE,
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TRUE,
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FALSE,
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Offset,
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BLOCK_SIZE,
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Buffer,
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EnumSpiRegionAll
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);
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return Status;
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}
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/**
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Write NumBytes bytes of data from Buffer to the address specified by
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PAddresss.
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@param[in] Address The starting physical address of the write.
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@param[in,out] NumBytes On input, the number of bytes to write. On output,
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the actual number of bytes written.
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@param[in] Buffer The source data buffer for the write.
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@retval EFI_SUCCESS Opertion is successful.
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@retval EFI_DEVICE_ERROR If there is any device errors.
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**/
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EFI_STATUS
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EFIAPI
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SpiFlashWrite (
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IN UINTN Address,
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IN OUT UINT32 *NumBytes,
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IN UINT8 *Buffer
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)
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{
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EFI_STATUS Status;
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UINTN Offset;
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UINT32 Length;
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UINT32 RemainingBytes;
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ASSERT ((NumBytes != NULL) && (Buffer != NULL));
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ASSERT (Address >= (UINTN)PcdGet32 (PcdFlashChipBase));
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Offset = Address - (UINTN)PcdGet32 (PcdFlashChipBase);
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ASSERT ((*NumBytes + Offset) <= (UINTN)PcdGet32 (PcdFlashChipSize));
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Status = EFI_SUCCESS;
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RemainingBytes = *NumBytes;
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while (RemainingBytes > 0) {
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if (RemainingBytes > SIZE_4KB) {
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Length = SIZE_4KB;
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} else {
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Length = RemainingBytes;
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}
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Status = mSpiProtocol->Execute (
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mSpiProtocol,
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SPI_PROG,
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SPI_WREN,
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TRUE,
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TRUE,
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TRUE,
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(UINT32) Offset,
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Length,
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Buffer,
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EnumSpiRegionAll
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);
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if (EFI_ERROR (Status)) {
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break;
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}
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RemainingBytes -= Length;
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Offset += Length;
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Buffer += Length;
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}
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//
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// Actual number of bytes written
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//
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*NumBytes -= RemainingBytes;
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return Status;
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}
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EFI_STATUS
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InternalReadBlock (
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IN EFI_PHYSICAL_ADDRESS BaseAddress,
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OUT VOID *ReadBuffer
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)
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{
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EFI_STATUS Status;
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UINT32 BlockSize;
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BlockSize = BLOCK_SIZE;
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Status = SpiFlashRead ((UINTN) BaseAddress, &BlockSize, ReadBuffer);
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return Status;
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}
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/**
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Erase the block starting at Address.
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@param[in] Address The starting physical address of the block to be erased.
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This library assume that caller garantee that the PAddress
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is at the starting address of this block.
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@param[in] NumBytes On input, the number of bytes of the logical block to be erased.
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On output, the actual number of bytes erased.
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@retval EFI_SUCCESS. Opertion is successful.
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@retval EFI_DEVICE_ERROR If there is any device errors.
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**/
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EFI_STATUS
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EFIAPI
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SpiFlashBlockErase (
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IN UINTN Address,
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IN UINTN *NumBytes
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)
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{
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EFI_STATUS Status;
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UINTN Offset;
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UINTN RemainingBytes;
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ASSERT (NumBytes != NULL);
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ASSERT (Address >= (UINTN)PcdGet32 (PcdFlashChipBase));
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Offset = Address - (UINTN)PcdGet32 (PcdFlashChipBase);
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ASSERT ((*NumBytes % SIZE_4KB) == 0);
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ASSERT ((*NumBytes + Offset) <= (UINTN)PcdGet32 (PcdFlashChipSize));
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Status = EFI_SUCCESS;
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RemainingBytes = *NumBytes;
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//
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// To adjust the Offset with Bios/Gbe
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//
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// if (Address >= (UINTN)PcdGet32 (PcdFlashChipBase)) {
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// Offset = Address - (UINTN)PcdGet32 (PcdFlashChipBase);
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while (RemainingBytes > 0) {
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Status = mSpiProtocol->Execute (
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mSpiProtocol,
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SPI_SERASE,
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SPI_WREN,
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FALSE,
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TRUE,
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FALSE,
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(UINT32) Offset,
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0,
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NULL,
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EnumSpiRegionAll
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);
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if (EFI_ERROR (Status)) {
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break;
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}
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RemainingBytes -= SIZE_4KB;
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Offset += SIZE_4KB;
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}
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// }
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//
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// Actual number of bytes erased
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//
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*NumBytes -= RemainingBytes;
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return Status;
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}
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/**
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Routine Description:
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Erase the whole block.
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Arguments:
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BaseAddress - Base address of the block to be erased.
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Returns:
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EFI_SUCCESS - The command completed successfully.
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Other - Device error or wirte-locked, operation failed.
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**/
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EFI_STATUS
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InternalEraseBlock (
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IN EFI_PHYSICAL_ADDRESS BaseAddress
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)
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{
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EFI_STATUS Status;
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UINTN NumBytes;
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NumBytes = BLOCK_SIZE;
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Status = SpiFlashBlockErase ((UINTN) BaseAddress, &NumBytes);
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return Status;
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}
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EFI_STATUS
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InternalCompareBlock (
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IN EFI_PHYSICAL_ADDRESS BaseAddress,
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IN UINT8 *Buffer
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)
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{
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EFI_STATUS Status;
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VOID *CompareBuffer;
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UINT32 NumBytes;
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INTN CompareResult;
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NumBytes = BLOCK_SIZE;
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CompareBuffer = AllocatePool (NumBytes);
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if (CompareBuffer == NULL) {
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Status = EFI_OUT_OF_RESOURCES;
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goto Done;
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}
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Status = SpiFlashRead ((UINTN) BaseAddress, &NumBytes, CompareBuffer);
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if (EFI_ERROR (Status)) {
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goto Done;
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}
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CompareResult = CompareMem (CompareBuffer, Buffer, BLOCK_SIZE);
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if (CompareResult != 0) {
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Status = EFI_VOLUME_CORRUPTED;
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}
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Done:
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if (CompareBuffer != NULL) {
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FreePool (CompareBuffer);
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}
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return Status;
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}
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/**
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Routine Description:
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Write a block of data.
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Arguments:
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BaseAddress - Base address of the block.
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Buffer - Data buffer.
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BufferSize - Size of the buffer.
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Returns:
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EFI_SUCCESS - The command completed successfully.
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EFI_INVALID_PARAMETER - Invalid parameter, can not proceed.
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Other - Device error or wirte-locked, operation failed.
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**/
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EFI_STATUS
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InternalWriteBlock (
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IN EFI_PHYSICAL_ADDRESS BaseAddress,
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IN UINT8 *Buffer,
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IN UINT32 BufferSize
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)
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{
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EFI_STATUS Status;
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Status = SpiFlashWrite ((UINTN) BaseAddress, &BufferSize, Buffer);
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if (EFI_ERROR (Status)) {
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DEBUG((DEBUG_ERROR, "\nFlash write error."));
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return Status;
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}
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WriteBackInvalidateDataCacheRange ((VOID *) (UINTN) BaseAddress, BLOCK_SIZE);
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Status = InternalCompareBlock (BaseAddress, Buffer);
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if (EFI_ERROR (Status)) {
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DEBUG((DEBUG_ERROR, "\nError when writing to BaseAddress %x with different at offset %x.", BaseAddress, Status));
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} else {
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DEBUG((DEBUG_INFO, "\nVerified data written to Block at %x is correct.", BaseAddress));
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}
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return Status;
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}
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/**
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Perform flash write opreation.
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@ -51,36 +404,122 @@ PerformFlashWrite (
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IN UINTN Length
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)
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{
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EFI_STATUS Status;
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EFI_STATUS Status = EFI_SUCCESS;
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UINTN Index;
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EFI_PHYSICAL_ADDRESS Address;
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UINTN CountOfBlocks;
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EFI_TPL OldTpl;
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BOOLEAN FlashError;
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UINT8 *Buf;
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UINTN LpcBaseAddress;
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UINT8 Data8Or;
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UINT8 Data8And;
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UINT8 BiosCntl;
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DEBUG((DEBUG_INFO, "PerformFlashWrite - 0x%x(%x) - 0x%x\n", (UINTN)FlashAddress, (UINTN)FlashAddressType, Length));
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Index = 0;
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Address = 0;
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CountOfBlocks = 0;
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FlashError = FALSE;
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Buf = Buffer;
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DEBUG((DEBUG_INFO | DEBUG_ERROR, "PerformFlashWrite - 0x%x(%x) - 0x%x\n", (UINTN)FlashAddress, (UINTN)FlashAddressType, Length));
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if (FlashAddressType == FlashAddressTypeRelativeAddress) {
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FlashAddress = FlashAddress + mInternalFdAddress;
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}
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DEBUG((DEBUG_INFO, " - 0x%x(%x) - 0x%x\n", (UINTN)FlashAddress, (UINTN)FlashAddressType, Length));
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LibFvbFlashDeviceBlockLock((UINTN)FlashAddress, Length, FALSE);
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CountOfBlocks = (UINTN) (Length / BLOCK_SIZE);
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Address = FlashAddress;
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//
|
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// Erase & Write
|
||||
//
|
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Status = LibFvbFlashDeviceBlockErase((UINTN)FlashAddress, Length);
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ASSERT_EFI_ERROR(Status);
|
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if (EFI_ERROR(Status)) {
|
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LibFvbFlashDeviceBlockLock((UINTN)FlashAddress, Length, TRUE);
|
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DEBUG((DEBUG_ERROR, "Flash Erase error\n"));
|
||||
return Status;
|
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LpcBaseAddress = MmPciAddress (0,
|
||||
DEFAULT_PCI_BUS_NUMBER_PCH,
|
||||
PCI_DEVICE_NUMBER_PCH_LPC,
|
||||
PCI_FUNCTION_NUMBER_PCH_LPC,
|
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0
|
||||
);
|
||||
BiosCntl = MmioRead8 (LpcBaseAddress + R_PCH_LPC_BIOS_CNTL);
|
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if ((BiosCntl & B_PCH_LPC_BIOS_CNTL_SMM_BWP) == B_PCH_LPC_BIOS_CNTL_SMM_BWP) {
|
||||
///
|
||||
/// Clear SMM_BWP bit (D31:F0:RegDCh[5])
|
||||
///
|
||||
Data8And = (UINT8) ~B_PCH_LPC_BIOS_CNTL_SMM_BWP;
|
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Data8Or = 0x00;
|
||||
|
||||
MmioAndThenOr8 (
|
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LpcBaseAddress + R_PCH_LPC_BIOS_CNTL,
|
||||
Data8And,
|
||||
Data8Or
|
||||
);
|
||||
DEBUG((DEBUG_INFO, "PerformFlashWrite Clear SMM_BWP bit\n"));
|
||||
}
|
||||
|
||||
Status = LibFvbFlashDeviceWrite((UINTN)FlashAddress, &Length, Buffer);
|
||||
ASSERT_EFI_ERROR(Status);
|
||||
//
|
||||
// Raise TPL to TPL_NOTIFY to block any event handler,
|
||||
// while still allowing RaiseTPL(TPL_NOTIFY) within
|
||||
// output driver during Print()
|
||||
//
|
||||
OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
|
||||
for (Index = 0; Index < CountOfBlocks; Index++) {
|
||||
//
|
||||
// Handle block based on address and contents.
|
||||
//
|
||||
if (!EFI_ERROR (InternalCompareBlock (Address, Buf))) {
|
||||
DEBUG((DEBUG_INFO, "Skipping block at 0x%lx (already programmed)\n", Address));
|
||||
} else {
|
||||
//
|
||||
// Display a dot for each block being updated.
|
||||
//
|
||||
Print (L".");
|
||||
|
||||
//
|
||||
// Make updating process uninterruptable,
|
||||
// so that the flash memory area is not accessed by other entities
|
||||
// which may interfere with the updating process
|
||||
//
|
||||
Status = InternalEraseBlock (Address);
|
||||
if (EFI_ERROR(Status)) {
|
||||
LibFvbFlashDeviceBlockLock((UINTN)FlashAddress, Length, TRUE);
|
||||
DEBUG((DEBUG_ERROR, "Flash write error\n"));
|
||||
return Status;
|
||||
gBS->RestoreTPL (OldTpl);
|
||||
FlashError = TRUE;
|
||||
goto Done;
|
||||
}
|
||||
Status = InternalWriteBlock (
|
||||
Address,
|
||||
Buf,
|
||||
(UINT32)(Length > BLOCK_SIZE ? BLOCK_SIZE : Length)
|
||||
);
|
||||
if (EFI_ERROR(Status)) {
|
||||
gBS->RestoreTPL (OldTpl);
|
||||
FlashError = TRUE;
|
||||
goto Done;
|
||||
}
|
||||
}
|
||||
|
||||
LibFvbFlashDeviceBlockLock((UINTN)FlashAddress, Length, TRUE);
|
||||
//
|
||||
// Move to next block to update.
|
||||
//
|
||||
Address += BLOCK_SIZE;
|
||||
Buf += BLOCK_SIZE;
|
||||
if (Length > BLOCK_SIZE) {
|
||||
Length -= BLOCK_SIZE;
|
||||
} else {
|
||||
Length = 0;
|
||||
}
|
||||
}
|
||||
gBS->RestoreTPL (OldTpl);
|
||||
|
||||
Done:
|
||||
if ((BiosCntl & B_PCH_LPC_BIOS_CNTL_SMM_BWP) == B_PCH_LPC_BIOS_CNTL_SMM_BWP) {
|
||||
//
|
||||
// Restore original control setting
|
||||
//
|
||||
MmioWrite8 (LpcBaseAddress + R_PCH_LPC_BIOS_CNTL, BiosCntl);
|
||||
}
|
||||
|
||||
//
|
||||
// Print flash update failure message if error detected.
|
||||
//
|
||||
if (FlashError) {
|
||||
Print (L"No %r\n", Status);
|
||||
}
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
|
@ -183,8 +622,16 @@ PerformFlashAccessLibConstructor (
|
|||
VOID
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
mInternalFdAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)PcdGet32(PcdFlashAreaBaseAddress);
|
||||
DEBUG((DEBUG_INFO, "PcdFlashAreaBaseAddress - 0x%x\n", mInternalFdAddress));
|
||||
|
||||
Status = gBS->LocateProtocol (
|
||||
&gEfiSpiProtocolGuid,
|
||||
NULL,
|
||||
(VOID **) &mSpiProtocol
|
||||
);
|
||||
ASSERT_EFI_ERROR(Status);
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
## @file
|
||||
# Platform Flash Access library.
|
||||
#
|
||||
# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
|
|
@ -36,13 +36,26 @@
|
|||
MdeModulePkg/MdeModulePkg.dec
|
||||
SignedCapsulePkg/SignedCapsulePkg.dec
|
||||
Vlv2TbltDevicePkg/PlatformPkg.dec
|
||||
Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec
|
||||
|
||||
[LibraryClasses]
|
||||
BaseMemoryLib
|
||||
IoLib
|
||||
PcdLib
|
||||
DebugLib
|
||||
FlashDeviceLib
|
||||
# FlashDeviceLib
|
||||
MemoryAllocationLib
|
||||
CacheMaintenanceLib
|
||||
|
||||
[Guids]
|
||||
gEdkiiSystemFmpCapsuleConfigFileGuid ## SOMETIMES_CONSUMES ## GUID
|
||||
|
||||
[Protocols]
|
||||
gEfiSpiProtocolGuid ## CONSUMES
|
||||
|
||||
[Pcd]
|
||||
gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress
|
||||
gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress ## SOMETIMES_CONSUMES
|
||||
gPlatformModuleTokenSpaceGuid.PcdFlashChipBase ## SOMETIMES_CONSUMES
|
||||
gPlatformModuleTokenSpaceGuid.PcdFlashChipSize ## SOMETIMES_CONSUMES
|
||||
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ## SOMETIMES_CONSUMES
|
||||
|
||||
|
|
|
|||
|
|
@ -19,13 +19,14 @@
|
|||
#include <Library/FlashDeviceLib.h>
|
||||
#include <Library/DebugLib.h>
|
||||
#include <Library/BaseLib.h>
|
||||
#include <Library/UefiBootServicesTableLib.h>
|
||||
#include <Library/UefiRuntimeServicesTableLib.h>
|
||||
#include <Library/BaseMemoryLib.h>
|
||||
#include <Library/UefiRuntimeLib.h>
|
||||
#include <Protocol/SmmBase2.h>
|
||||
#include <Guid/EventGroup.h>
|
||||
#include <Library/SpiFlash.H>
|
||||
#include "SpiChipDefinitions.h"
|
||||
|
||||
#define FLASH_SIZE 0x400000
|
||||
|
||||
#define FLASH_DEVICE_BASE_ADDRESS (0xFFFFFFFF-FLASH_SIZE+1)
|
||||
UINTN FlashDeviceBase = FLASH_DEVICE_BASE_ADDRESS;
|
||||
|
||||
EFI_SPI_PROTOCOL *mSpiProtocol = NULL;
|
||||
|
|
@ -77,11 +78,11 @@ SpiFlashBlockErase (
|
|||
UINT32 SpiAddress;
|
||||
|
||||
SpiAddress = (UINT32)(UINTN)(BaseAddress) - (UINT32)FlashDeviceBase;
|
||||
SectorSize = SECTOR_SIZE_64KB;
|
||||
SectorSize = SECTOR_SIZE_4KB;
|
||||
while ( (NumBytes > 0) && (NumBytes <= MAX_FWH_SIZE) ) {
|
||||
Status = mSpiProtocol->Execute (
|
||||
mSpiProtocol,
|
||||
SPI_BERASE,
|
||||
SPI_SERASE,
|
||||
SPI_WREN,
|
||||
FALSE,
|
||||
TRUE,
|
||||
|
|
@ -319,3 +320,148 @@ LibFvbFlashDeviceBlockLock (
|
|||
return Status;
|
||||
}
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
LibFvbFlashDeviceVirtualAddressChangeNotifyEvent (
|
||||
IN EFI_EVENT Event,
|
||||
IN VOID *Context
|
||||
)
|
||||
{
|
||||
gRT->ConvertPointer (0, (VOID **) &mSpiProtocol);
|
||||
gRT->ConvertPointer (0, (VOID **) &FlashDeviceBase);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
The library constructuor.
|
||||
|
||||
The function does the necessary initialization work for this library
|
||||
instance. Please put all initialization works in it.
|
||||
|
||||
@param[in] ImageHandle The firmware allocated handle for the UEFI image.
|
||||
@param[in] SystemTable A pointer to the EFI system table.
|
||||
|
||||
@retval EFI_SUCCESS The function always return EFI_SUCCESS for now.
|
||||
It will ASSERT on error for debug version.
|
||||
@retval EFI_ERROR Please reference LocateProtocol for error code details.
|
||||
|
||||
**/
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
LibFvbFlashDeviceSupportInit (
|
||||
IN EFI_HANDLE ImageHandle,
|
||||
IN EFI_SYSTEM_TABLE *SystemTable
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
EFI_EVENT Event;
|
||||
UINT8 SfId[3];
|
||||
UINT8 FlashIndex;
|
||||
UINT8 SpiReadError;
|
||||
UINT8 SpiNotMatchError;
|
||||
EFI_SMM_BASE2_PROTOCOL *SmmBase;
|
||||
BOOLEAN InSmm;
|
||||
|
||||
SpiReadError = 0x00;
|
||||
SpiNotMatchError = 0x00;
|
||||
|
||||
InSmm = FALSE;
|
||||
Status = gBS->LocateProtocol (
|
||||
&gEfiSmmBase2ProtocolGuid,
|
||||
NULL,
|
||||
(void **)&SmmBase
|
||||
);
|
||||
if (!EFI_ERROR(Status)) {
|
||||
Status = SmmBase->InSmm(SmmBase, &InSmm);
|
||||
if (EFI_ERROR(Status)) {
|
||||
InSmm = FALSE;
|
||||
}
|
||||
}
|
||||
|
||||
if (!InSmm) {
|
||||
Status = gBS->LocateProtocol (
|
||||
&gEfiSpiProtocolGuid,
|
||||
NULL,
|
||||
(VOID **)&mSpiProtocol
|
||||
);
|
||||
ASSERT_EFI_ERROR (Status);
|
||||
|
||||
Status = gBS->CreateEventEx (
|
||||
EVT_NOTIFY_SIGNAL,
|
||||
TPL_NOTIFY,
|
||||
LibFvbFlashDeviceVirtualAddressChangeNotifyEvent,
|
||||
NULL,
|
||||
&gEfiEventVirtualAddressChangeGuid,
|
||||
&Event
|
||||
);
|
||||
ASSERT_EFI_ERROR (Status);
|
||||
} else {
|
||||
Status = gBS->LocateProtocol (
|
||||
&gEfiSmmSpiProtocolGuid,
|
||||
NULL,
|
||||
(VOID **)&mSpiProtocol
|
||||
);
|
||||
ASSERT_EFI_ERROR (Status);
|
||||
}
|
||||
|
||||
|
||||
for (FlashIndex = EnumSpiFlashW25Q64; FlashIndex < EnumSpiFlashMax; FlashIndex++) {
|
||||
Status = mSpiProtocol->Init (mSpiProtocol, &(mInitTable[FlashIndex]));
|
||||
if (!EFI_ERROR (Status)) {
|
||||
//
|
||||
// Read Vendor/Device IDs to check if the driver supports the Serial Flash device.
|
||||
//
|
||||
Status = mSpiProtocol->Execute (
|
||||
mSpiProtocol,
|
||||
SPI_READ_ID,
|
||||
SPI_WREN,
|
||||
TRUE,
|
||||
FALSE,
|
||||
FALSE,
|
||||
0,
|
||||
3,
|
||||
SfId,
|
||||
EnumSpiRegionAll
|
||||
);
|
||||
if (!EFI_ERROR (Status)) {
|
||||
if ((SfId[0] == mInitTable[FlashIndex].VendorId) &&
|
||||
(SfId[1] == mInitTable[FlashIndex].DeviceId0) &&
|
||||
(SfId[2] == mInitTable[FlashIndex].DeviceId1)) {
|
||||
//
|
||||
// Found a matching SPI device, FlashIndex now contains flash device.
|
||||
//
|
||||
DEBUG ((DEBUG_ERROR, "OK - Found SPI Flash Type in SPI Flash Driver, Device Type ID 0 = 0x%02x!\n", mInitTable[FlashIndex].DeviceId0));
|
||||
DEBUG ((DEBUG_ERROR, "Device Type ID 1 = 0x%02x!\n", mInitTable[FlashIndex].DeviceId1));
|
||||
|
||||
if (mInitTable[FlashIndex].BiosStartOffset == (UINTN) (-1)) {
|
||||
DEBUG ((DEBUG_ERROR, "ERROR - The size of BIOS image is bigger than SPI Flash device!\n"));
|
||||
CpuDeadLoop ();
|
||||
}
|
||||
break;
|
||||
} else {
|
||||
SpiNotMatchError++;
|
||||
}
|
||||
} else {
|
||||
SpiReadError++;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
DEBUG ((DEBUG_ERROR, "SPI flash chip VID = 0x%X, DID0 = 0x%X, DID1 = 0x%X\n", SfId[0], SfId[1], SfId[2]));
|
||||
|
||||
if (FlashIndex < EnumSpiFlashMax) {
|
||||
return EFI_SUCCESS;
|
||||
} else {
|
||||
if (SpiReadError != 0) {
|
||||
DEBUG ((DEBUG_ERROR, "ERROR - SPI Read ID execution failed! Error Count = %d\n", SpiReadError));
|
||||
}
|
||||
else {
|
||||
if (SpiNotMatchError != 0) {
|
||||
DEBUG ((DEBUG_ERROR, "ERROR - No supported SPI flash chip found! Error Count = %d\n", SpiNotMatchError));
|
||||
DEBUG ((DEBUG_ERROR, "SPI flash chip VID = 0x%X, DID0 = 0x%X, DID1 = 0x%X\n", SfId[0], SfId[1], SfId[2]));
|
||||
}
|
||||
}
|
||||
return EFI_UNSUPPORTED;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
|
||||
[Defines]
|
||||
INF_VERSION = 0x00010005
|
||||
BASE_NAME = FlashDeviceLibRuntimeSmm
|
||||
BASE_NAME = FlashDeviceLib
|
||||
FILE_GUID = E38A1C3C-928C-4bf7-B6C1-7F0EF163FAA5
|
||||
MODULE_TYPE = DXE_DRIVER
|
||||
VERSION_STRING = 1.0
|
||||
|
|
@ -32,7 +32,6 @@
|
|||
|
||||
[Sources]
|
||||
FlashDeviceLib.c
|
||||
FlashDeviceLibDxeRuntimeSmm.c
|
||||
|
||||
|
||||
[Packages]
|
||||
|
|
@ -44,9 +43,6 @@
|
|||
[LibraryClasses]
|
||||
DebugLib
|
||||
|
||||
[Guids]
|
||||
gEfiEventVirtualAddressChangeGuid
|
||||
|
||||
[Protocols]
|
||||
gEfiSpiProtocolGuid
|
||||
gEfiSmmSpiProtocolGuid
|
||||
|
|
|
|||
|
|
@ -17,6 +17,7 @@
|
|||
#include <Library/SpiFlash.H>
|
||||
|
||||
#define FLASH_SIZE 0x400000
|
||||
#define FLASH_DEVICE_BASE_ADDRESS (0xFFFFFFFF-FLASH_SIZE+1)
|
||||
|
||||
//
|
||||
// Serial Flash device initialization data table provided to the
|
||||
|
|
|
|||
Loading…
Reference in New Issue