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MdePkg/BaseLib: RISC-V: Add FPU CSR constants

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* Define CSR fcsr
* Define bitmasks for vs and fs bit fields in the mstatus register

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This commit is contained in:
Heinrich Schuchardt 2024-09-16 23:08:06 +02:00 committed by mergify[bot]
parent 7123940665
commit 28dd588ca8
1 changed files with 4 additions and 0 deletions
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4
MdePkg/Include/Register/RiscV64/RiscVEncoding.h
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@ -20,6 +20,7 @@
#define MSTATUS_SPP (1UL << MSTATUS_SPP_SHIFT)
#define MSTATUS_MPP_SHIFT 11
#define MSTATUS_MPP (3UL << MSTATUS_MPP_SHIFT)
#define MSTATUS_FS 0x00006000UL
#define SSTATUS_SIE MSTATUS_SIE
#define SSTATUS_SPIE_SHIFT MSTATUS_SPIE_SHIFT
@ -76,6 +77,9 @@
#define CSR_CYCLE 0xc00
#define CSR_TIME 0xc01
/* Floating-Point */
#define CSR_FCSR 0x003
/* Supervisor Trap Setup */
#define CSR_SSTATUS 0x100
#define CSR_SEDELEG 0x102