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https://github.com/acidanthera/audk.git
synced 2025-07-29 08:34:07 +02:00
Update 8254 Timer driver to use IoLib instead of CPU I/O Protocol
Also change the default tick rate from 54 ms to 10 ms. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6243 6f19259b-4bc3-4df7-8a09-765794883524
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@ -35,16 +35,16 @@
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BaseLib
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BaseLib
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DebugLib
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DebugLib
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UefiDriverEntryPoint
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UefiDriverEntryPoint
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IoLib
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[Sources.common]
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[Sources.common]
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Timer.h
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Timer.h
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Timer.c
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Timer.c
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[Protocols]
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[Protocols]
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gEfiCpuIoProtocolGuid
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gEfiCpuArchProtocolGuid
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gEfiCpuArchProtocolGuid
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gEfiLegacy8259ProtocolGuid
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gEfiLegacy8259ProtocolGuid
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gEfiTimerArchProtocolGuid
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gEfiTimerArchProtocolGuid
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[Depex]
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[Depex]
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gEfiCpuIoProtocolGuid AND gEfiCpuArchProtocolGuid AND gEfiLegacy8259ProtocolGuid
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gEfiCpuArchProtocolGuid AND gEfiLegacy8259ProtocolGuid
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@ -42,11 +42,6 @@ EFI_TIMER_ARCH_PROTOCOL mTimer = {
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//
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//
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EFI_CPU_ARCH_PROTOCOL *mCpu;
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EFI_CPU_ARCH_PROTOCOL *mCpu;
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//
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// Pointer to the CPU I/O Protocol instance
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//
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EFI_CPU_IO_PROTOCOL *mCpuIo;
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//
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//
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// Pointer to the Legacy 8259 Protocol instance
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// Pointer to the Legacy 8259 Protocol instance
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//
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//
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@ -86,11 +81,9 @@ Returns:
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--*/
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--*/
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{
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{
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UINT8 Data;
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IoWrite8 (TIMER_CONTROL_PORT, 0x36);
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IoWrite8 (TIMER0_COUNT_PORT, (UINT8)(Count & 0xff));
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Data = 0x36;
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IoWrite8 (TIMER0_COUNT_PORT, (UINT8)((Count >> 8) & 0xff));
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mCpuIo->Io.Write (mCpuIo, EfiCpuIoWidthUint8, TIMER_CONTROL_PORT, 1, &Data);
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mCpuIo->Io.Write (mCpuIo, EfiCpuIoWidthFifoUint8, TIMER0_COUNT_PORT, 2, &Count);
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}
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}
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VOID
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VOID
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@ -262,6 +255,7 @@ Returns:
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//
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//
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mLegacy8259->DisableIrq (mLegacy8259, Efi8259Irq0);
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mLegacy8259->DisableIrq (mLegacy8259, Efi8259Irq0);
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} else {
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} else {
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//
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//
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// Convert TimerPeriod into 8254 counts
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// Convert TimerPeriod into 8254 counts
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//
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//
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@ -433,12 +427,6 @@ Returns:
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//
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//
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ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiTimerArchProtocolGuid);
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ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiTimerArchProtocolGuid);
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//
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// Find the CPU I/O Protocol.
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//
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Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, (VOID **) &mCpuIo);
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ASSERT_EFI_ERROR (Status);
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//
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//
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// Find the CPU architectural protocol.
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// Find the CPU architectural protocol.
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//
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//
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@ -481,11 +469,11 @@ Returns:
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//
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//
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Status = gBS->InstallMultipleProtocolInterfaces (
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Status = gBS->InstallMultipleProtocolInterfaces (
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&mTimerHandle,
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&mTimerHandle,
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&gEfiTimerArchProtocolGuid,
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&gEfiTimerArchProtocolGuid, &mTimer,
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&mTimer,
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NULL
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NULL
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);
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);
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ASSERT_EFI_ERROR (Status);
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ASSERT_EFI_ERROR (Status);
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return Status;
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return Status;
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}
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}
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@ -26,13 +26,13 @@ Abstract:
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#include <PiDxe.h>
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#include <PiDxe.h>
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#include <Protocol/Cpu.h>
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#include <Protocol/Cpu.h>
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#include <Protocol/CpuIo.h>
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#include <Protocol/Legacy8259.h>
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#include <Protocol/Legacy8259.h>
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#include <Protocol/Timer.h>
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#include <Protocol/Timer.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Library/BaseLib.h>
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#include <Library/BaseLib.h>
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#include <Library/DebugLib.h>
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#include <Library/DebugLib.h>
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#include <Library/IoLib.h>
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//
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//
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// The PCAT 8253/8254 has an input clock at 1.193182 MHz and Timer 0 is
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// The PCAT 8253/8254 has an input clock at 1.193182 MHz and Timer 0 is
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@ -43,7 +43,9 @@ Abstract:
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// ---------------- * 1,000,000 uS/S = 54925.4 uS = 549254 * 100 ns
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// ---------------- * 1,000,000 uS/S = 54925.4 uS = 549254 * 100 ns
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// 1,193,182 Hz
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// 1,193,182 Hz
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//
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//
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#define DEFAULT_TIMER_TICK_DURATION 549254
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// The default timer tick duration is set to 10 ms = 100000 100 ns units
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//
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#define DEFAULT_TIMER_TICK_DURATION 100000
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#define TIMER_CONTROL_PORT 0x43
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#define TIMER_CONTROL_PORT 0x43
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#define TIMER0_COUNT_PORT 0x40
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#define TIMER0_COUNT_PORT 0x40
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