mirror of https://github.com/acidanthera/audk.git
OvmfPkg/Sec: Stop building identity mapped pages in SEC
Now for X64 we use a VTF0 ResetVector which puts the page tables in RAM. Therefore SEC no longer needs to do this. This reverts commit r14494. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14719 6f19259b-4bc3-4df7-8a09-765794883524
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@ -1,7 +1,7 @@
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/** @file
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/** @file
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Main SEC phase code. Transitions to PEI.
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Main SEC phase code. Transitions to PEI.
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Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2008 - 2011, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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@ -31,8 +31,6 @@
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#include <Ppi/TemporaryRamSupport.h>
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#include <Ppi/TemporaryRamSupport.h>
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#include <IndustryStandard/X64Paging.h>
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#define SEC_IDT_ENTRY_COUNT 34
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#define SEC_IDT_ENTRY_COUNT 34
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typedef struct _SEC_IDT_TABLE {
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typedef struct _SEC_IDT_TABLE {
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@ -525,137 +523,6 @@ FindImageBase (
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}
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}
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}
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}
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#if defined (MDE_CPU_X64)
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/**
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Allocates and fills in the Page Directory and Page Table Entries to
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establish a 1:1 Virtual to Physical mapping.
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@param Location Memory to build the page tables in
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**/
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VOID
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Create4GbIdentityMappingPageTables (
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VOID *Location
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)
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{
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UINT32 RegEax;
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UINT32 RegEdx;
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EFI_PHYSICAL_ADDRESS PageAddress;
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UINTN IndexOfPml4Entries;
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UINTN IndexOfPdpEntries;
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UINTN IndexOfPageDirectoryEntries;
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UINT32 NumberOfPml4EntriesNeeded;
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UINT32 NumberOfPdpEntriesNeeded;
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X64_PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel4Entry;
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X64_PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;
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X64_PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;
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X64_PAGE_TABLE_ENTRY *PageDirectoryEntry;
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UINTN NextAllocAddress;
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BOOLEAN Page1GSupport;
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X64_PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry;
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Page1GSupport = FALSE;
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AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
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if (RegEax >= 0x80000001) {
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AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);
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if ((RegEdx & BIT26) != 0) {
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Page1GSupport = TRUE;
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}
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}
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//
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// Only build entries for the first 4GB at this stage.
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//
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NumberOfPml4EntriesNeeded = 1;
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NumberOfPdpEntriesNeeded = 4;
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NextAllocAddress = (UINTN) Location;
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//
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// By architecture only one PageMapLevel4 exists - so lets allocate storage for it.
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//
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PageMap = (VOID *) NextAllocAddress;
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NextAllocAddress += SIZE_4KB;
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PageMapLevel4Entry = PageMap;
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PageAddress = 0;
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for (IndexOfPml4Entries = 0; IndexOfPml4Entries < NumberOfPml4EntriesNeeded; IndexOfPml4Entries++, PageMapLevel4Entry++) {
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//
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// Each PML4 entry points to a page of Page Directory Pointer entires.
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// So lets allocate space for them and fill them in in the IndexOfPdpEntries loop.
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//
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PageDirectoryPointerEntry = (VOID *) NextAllocAddress;
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NextAllocAddress += SIZE_4KB;
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//
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// Make a PML4 Entry
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//
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PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry;
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PageMapLevel4Entry->Bits.ReadWrite = 1;
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PageMapLevel4Entry->Bits.Present = 1;
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if (Page1GSupport) {
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PageDirectory1GEntry = (VOID *) PageDirectoryPointerEntry;
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for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectory1GEntry++, PageAddress += SIZE_1GB) {
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//
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// Fill in the Page Directory entries
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//
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PageDirectory1GEntry->Uint64 = (UINT64)PageAddress;
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PageDirectory1GEntry->Bits.ReadWrite = 1;
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PageDirectory1GEntry->Bits.Present = 1;
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PageDirectory1GEntry->Bits.MustBe1 = 1;
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}
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} else {
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for (IndexOfPdpEntries = 0; IndexOfPdpEntries < NumberOfPdpEntriesNeeded; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {
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//
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// Each Directory Pointer entries points to a page of Page Directory entires.
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// So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.
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//
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PageDirectoryEntry = (VOID *) NextAllocAddress;
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NextAllocAddress += SIZE_4KB;
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//
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// Fill in a Page Directory Pointer Entries
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//
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PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry;
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PageDirectoryPointerEntry->Bits.ReadWrite = 1;
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PageDirectoryPointerEntry->Bits.Present = 1;
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for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress += SIZE_2MB) {
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//
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// Fill in the Page Directory entries
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//
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PageDirectoryEntry->Uint64 = (UINT64)PageAddress;
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PageDirectoryEntry->Bits.ReadWrite = 1;
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PageDirectoryEntry->Bits.Present = 1;
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PageDirectoryEntry->Bits.MustBe1 = 1;
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}
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}
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for (; IndexOfPdpEntries < 512; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {
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ZeroMem (
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PageDirectoryPointerEntry,
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sizeof(X64_PAGE_MAP_AND_DIRECTORY_POINTER)
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);
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}
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}
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}
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//
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// For the PML4 entries we are not using fill in a null entry.
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//
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for (; IndexOfPml4Entries < 512; IndexOfPml4Entries++, PageMapLevel4Entry++) {
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ZeroMem (
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PageMapLevel4Entry,
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sizeof (X64_PAGE_MAP_AND_DIRECTORY_POINTER)
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);
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}
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AsmWriteCr3 ((UINTN) PageMap);
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}
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#endif
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/*
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/*
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Find and return Pei Core entry point.
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Find and return Pei Core entry point.
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@ -779,13 +646,6 @@ SecCoreStartupWithStack (
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IoWrite8 (0x21, 0xff);
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IoWrite8 (0x21, 0xff);
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IoWrite8 (0xA1, 0xff);
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IoWrite8 (0xA1, 0xff);
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#if defined (MDE_CPU_X64)
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//
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// Create Identity Mapped Pages in RAM
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//
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Create4GbIdentityMappingPageTables (TopOfCurrentStack);
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#endif
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//
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//
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// Initialize Debug Agent to support source level debug in SEC/PEI phases before memory ready.
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// Initialize Debug Agent to support source level debug in SEC/PEI phases before memory ready.
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//
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//
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