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MdePkg BaseLib: Convert Ia32/FlushCacheLine.asm to NASM 

The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/FlushCacheLine.asm to Ia32/FlushCacheLine.nasm

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
This commit is contained in:
Jordan Justen 2016-05-30 18:51:58 -07:00 committed by Liming Gao
parent 4a848ec9f1
commit 2aefd3c371
2 changed files with 52 additions and 0 deletions
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1
MdePkg/Library/BaseLib/BaseLib.inf
View File

@ -313,6 +313,7 @@
Ia32/FxRestore.asm | INTEL Ia32/FxRestore.asm | INTEL
Ia32/FxSave.nasm| INTEL Ia32/FxSave.nasm| INTEL
Ia32/FxSave.asm | INTEL Ia32/FxSave.asm | INTEL
Ia32/FlushCacheLine.nasm| INTEL
Ia32/FlushCacheLine.asm | INTEL Ia32/FlushCacheLine.asm | INTEL
Ia32/EnablePaging32.asm | INTEL Ia32/EnablePaging32.asm | INTEL
Ia32/EnableInterrupts.asm | INTEL Ia32/EnableInterrupts.asm | INTEL

51
MdePkg/Library/BaseLib/Ia32/FlushCacheLine.nasm Normal file
View File

@ -0,0 +1,51 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; FlushCacheLine.Asm
;
; Abstract:
;
; AsmFlushCacheLine function
;
; Notes:
;
;------------------------------------------------------------------------------
SECTION .text
;------------------------------------------------------------------------------
; VOID *
; EFIAPI
; AsmFlushCacheLine (
; IN VOID *LinearAddress
; );
;------------------------------------------------------------------------------
global ASM_PFX(AsmFlushCacheLine)
ASM_PFX(AsmFlushCacheLine):
;
; If the CPU does not support CLFLUSH instruction,
; then promote flush range to flush entire cache.
;
mov eax, 1
push ebx
cpuid
pop ebx
mov eax, [esp + 4]
test edx, BIT19
jz .0
clflush [eax]
ret
.0:
wbinvd
ret