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MdePkg/PciSegmentLib: Optimize PCI_SEGMENT_LIB_ADDRESS() 

https://bugzilla.tianocore.org/show_bug.cgi?id=180

The PCI_SEGMENT_LIB_ADDRESS() macro puts the Segment number
into bits 32..47 of the logical address that is returned.
The portable method to put Segment in this bit range is to
use LShitU64().  For 64-bit CPUs, this is optimized well
by the compiler.  For 32-bit CPUs, a call to LSHiftU64()
is included in the generated binaries.  However, if the
Segment parameter is 0, then no shift is required.  Add
a check for Segment set to 0 and provide an optimized
macro implementation that does not call LShiftU64().

Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
This commit is contained in:
Michael Kinney 2016-10-26 14:08:22 -07:00
parent 70830df6dc
commit 2b27b55727
1 changed files with 13 additions and 6 deletions
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19
MdePkg/Include/Library/PciSegmentLib.h
View File

@ -23,7 +23,7 @@
access method. Modules will typically use the PCI Segment Library for its PCI configuration
accesses when PCI Segments other than Segment #0 must be accessed.
Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -56,11 +56,18 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#define PCI_SEGMENT_LIB_ADDRESS(Segment,Bus,Device,Function,Register) \
( ((Register) & 0xfff) | \
(((Function) & 0x07) << 12) | \
(((Device) & 0x1f) << 15) | \
(((Bus) & 0xff) << 20) | \
(LShiftU64((Segment) & 0xffff, 32)) \
((Segment != 0) ? \
( ((Register) & 0xfff) | \
(((Function) & 0x07) << 12) | \
(((Device) & 0x1f) << 15) | \
(((Bus) & 0xff) << 20) | \
(LShiftU64 ((Segment) & 0xffff, 32)) \
) : \
( ((Register) & 0xfff) | \
(((Function) & 0x07) << 12) | \
(((Device) & 0x1f) << 15) | \
(((Bus) & 0xff) << 20) \
) \
)
/**