BaseTools/GenFv: Support SecCore and PeiCore in different FV

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1423

There is usage model that SecCore and PeiCore are in different FVs.
Update BaseTools to support this usage model.

Test: Verified on internal platform with the case SecCore and
PeiCore in different FVs and built/booted successfully.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
This commit is contained in:
Chasel, Chiu 2018-12-26 21:15:19 +08:00
parent abc4c3386a
commit 2bb4a7ca62
1 changed files with 41 additions and 41 deletions

View File

@ -1655,11 +1655,9 @@ Returns:
//
// Find the PEI Core
//
PeiCorePhysicalAddress = 0;
Status = GetFileByType (EFI_FV_FILETYPE_PEI_CORE, 1, &PeiCoreFile);
if (EFI_ERROR (Status) || PeiCoreFile == NULL) {
Error (NULL, 0, 3000, "Invalid", "could not find the PEI core in the FV.");
return EFI_ABORTED;
}
if (!EFI_ERROR (Status) && (PeiCoreFile != NULL)) {
//
// PEI Core found, now find PE32 or TE section
//
@ -1692,6 +1690,7 @@ Returns:
PeiCorePhysicalAddress += (UINTN) Pe32Section.Pe32Section + SecHeaderSize - (UINTN) FvImage->FileImage;
PeiCorePhysicalAddress += EntryPoint;
DebugMsg (NULL, 0, 9, "PeiCore physical entry point address", "Address = 0x%llX", (unsigned long long) PeiCorePhysicalAddress);
}
if (MachineType == EFI_IMAGE_MACHINE_IA64) {
//
@ -1749,6 +1748,7 @@ Returns:
*SecCoreEntryAddressPtr = SecCorePhysicalAddress;
} else if (MachineType == EFI_IMAGE_MACHINE_IA32 || MachineType == EFI_IMAGE_MACHINE_X64) {
if (PeiCorePhysicalAddress != 0) {
//
// Get the location to update
//
@ -1758,7 +1758,7 @@ Returns:
// Write lower 32 bits of physical address for Pei Core entry
//
*Ia32ResetAddressPtr = (UINT32) PeiCorePhysicalAddress;
}
//
// Write SecCore Entry point relative address into the jmp instruction in reset vector.
//