mirror of https://github.com/acidanthera/audk.git
OvmfPkg: PlatformBdsLib: connect all PCI root buses
Currently we only connect the root bus with bus number 0, by device path. Soon we will possibly have several extra root buses, so connect all root buses up-front (bus number zero and otherwise), by protocol GUID. Cc: Jordan Justen <jordan.l.justen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Gabriel Somlo <somlo@cmu.edu> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17954 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Laszlo Ersek
lersek
parent
7730ad6e5d
commit
2c34f3bc54
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@ -116,49 +116,27 @@ Returns:
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EFI_STATUS
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EFIAPI
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ConnectRootBridge (
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VOID
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IN EFI_HANDLE RootBridgeHandle,
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IN VOID *Instance,
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IN VOID *Context
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)
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/*++
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Routine Description:
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Connect RootBridge
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Arguments:
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None.
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Returns:
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EFI_SUCCESS - Connect RootBridge successfully.
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EFI_STATUS - Connect RootBridge fail.
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--*/
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{
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EFI_STATUS Status;
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EFI_HANDLE RootHandle;
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EFI_STATUS Status;
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//
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// Make all the PCI_IO protocols on PCI Seg 0 show up
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// Make the PCI bus driver connect the root bridge, non-recursively. This
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// will produce a number of child handles with PciIo on them.
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//
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BdsLibConnectDevicePath (gPlatformRootBridges[0]);
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Status = gBS->LocateDevicePath (
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&gEfiDevicePathProtocolGuid,
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&gPlatformRootBridges[0],
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&RootHandle
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Status = gBS->ConnectController (
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RootBridgeHandle, // ControllerHandle
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NULL, // DriverImageHandle
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NULL, // RemainingDevicePath -- produce all
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// children
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FALSE // Recursive
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);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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Status = gBS->ConnectController (RootHandle, NULL, NULL, FALSE);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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return EFI_SUCCESS;
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return Status;
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}
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@ -1222,7 +1200,8 @@ Returns:
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DEBUG ((EFI_D_INFO, "PlatformBdsPolicyBehavior\n"));
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ConnectRootBridge ();
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VisitAllInstancesOfProtocol (&gEfiPciRootBridgeIoProtocolGuid,
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ConnectRootBridge, NULL);
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if (PcdGetBool (PcdOvmfFlashVariablesEnable)) {
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DEBUG ((EFI_D_INFO, "PlatformBdsPolicyBehavior: not restoring NvVars "
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@ -52,6 +52,7 @@ Abstract:
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#include <Protocol/PciIo.h>
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#include <Protocol/FirmwareVolume2.h>
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#include <Protocol/SimpleFileSystem.h>
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#include <Protocol/PciRootBridgeIo.h>
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#include <Guid/Acpi.h>
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#include <Guid/SmBios.h>
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@ -64,7 +65,6 @@ Abstract:
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extern BDS_CONSOLE_CONNECT_ENTRY gPlatformConsole[];
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extern EFI_DEVICE_PATH_PROTOCOL *gPlatformConnectSequence[];
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extern EFI_DEVICE_PATH_PROTOCOL *gPlatformDriverOption[];
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extern EFI_DEVICE_PATH_PROTOCOL *gPlatformRootBridges[];
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extern ACPI_HID_DEVICE_PATH gPnpPs2KeyboardDeviceNode;
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extern ACPI_HID_DEVICE_PATH gPnp16550ComPortDeviceNode;
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extern UART_DEVICE_PATH gUartDeviceNode;
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@ -107,9 +107,6 @@ extern VENDOR_DEVICE_PATH gTerminalTypeDeviceNode;
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0 \
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}
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#define gPciRootBridge \
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PNPID_DEVICE_PATH_NODE(0x0A03)
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#define gPciIsaBridge \
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PCI_DEVICE_PATH_NODE(0, 0x1f)
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@ -152,16 +149,6 @@ extern VENDOR_DEVICE_PATH gTerminalTypeDeviceNode;
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DEVICE_PATH_MESSAGING_PC_ANSI \
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}
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#define gEndEntire \
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{ \
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END_DEVICE_PATH_TYPE, \
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END_ENTIRE_DEVICE_PATH_SUBTYPE, \
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{ \
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END_DEVICE_PATH_LENGTH, \
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0 \
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} \
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}
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#define PCI_CLASS_SCC 0x07
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#define PCI_SUBCLASS_SERIAL 0x00
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#define PCI_IF_16550 0x02
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@ -172,14 +159,6 @@ extern VENDOR_DEVICE_PATH gTerminalTypeDeviceNode;
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#define IS_PCI_ISA_PDECODE(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA_PDECODE, 0)
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//
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// Platform Root Bridge
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//
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typedef struct {
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ACPI_HID_DEVICE_PATH PciRootBridge;
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EFI_DEVICE_PATH_PROTOCOL End;
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} PLATFORM_ROOT_BRIDGE_DEVICE_PATH;
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typedef struct {
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ACPI_HID_DEVICE_PATH PciRootBridge;
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PCI_DEVICE_PATH IsaBridge;
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@ -223,8 +202,6 @@ typedef struct {
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EFI_DEVICE_PATH_PROTOCOL End;
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} USB_CLASS_FORMAT_DEVICE_PATH;
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extern PLATFORM_ROOT_BRIDGE_DEVICE_PATH gPlatformRootBridge0;
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//
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// Platform BDS Functions
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//
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@ -64,4 +64,4 @@
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[Protocols]
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gEfiDecompressProtocolGuid
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gEfiPciRootBridgeIoProtocolGuid
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@ -25,19 +25,6 @@ ACPI_HID_DEVICE_PATH gPnp16550ComPortDeviceNode = gPnp16550ComPort;
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UART_DEVICE_PATH gUartDeviceNode = gUart;
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VENDOR_DEVICE_PATH gTerminalTypeDeviceNode = gPcAnsiTerminal;
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//
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// Predefined platform root bridge
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//
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PLATFORM_ROOT_BRIDGE_DEVICE_PATH gPlatformRootBridge0 = {
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gPciRootBridge,
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gEndEntire
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};
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EFI_DEVICE_PATH_PROTOCOL *gPlatformRootBridges[] = {
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(EFI_DEVICE_PATH_PROTOCOL *) &gPlatformRootBridge0,
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NULL
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};
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//
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// Platform specific keyboard device path
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//
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