mirror of https://github.com/acidanthera/audk.git
MdeModulePkg EhciPei: Support IoMmu
V2: Halt HC at EndOfPei. Update the EhciPei driver to consume IOMMU_PPI to allocate DMA buffer. If no IOMMU_PPI exists, this driver still calls PEI service to allocate DMA buffer, with assumption that DRAM==DMA. Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
This commit is contained in:
parent
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2c656af04d
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@ -0,0 +1,250 @@
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/** @file
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The DMA memory help functions.
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Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions
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of the BSD License which accompanies this distribution. The
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full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "EhcPeim.h"
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/**
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Provides the controller-specific addresses required to access system memory from a
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DMA bus master.
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@param IoMmu Pointer to IOMMU PPI.
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@param Operation Indicates if the bus master is going to read or write to system memory.
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@param HostAddress The system memory address to map to the PCI controller.
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@param NumberOfBytes On input the number of bytes to map. On output the number of bytes
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that were mapped.
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@param DeviceAddress The resulting map address for the bus master PCI controller to use to
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access the hosts HostAddress.
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@param Mapping A resulting value to pass to Unmap().
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@retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
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@retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
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@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
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@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
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@retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
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**/
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EFI_STATUS
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IoMmuMap (
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IN EDKII_IOMMU_PPI *IoMmu,
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IN EDKII_IOMMU_OPERATION Operation,
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IN VOID *HostAddress,
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IN OUT UINTN *NumberOfBytes,
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OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
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OUT VOID **Mapping
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)
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{
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EFI_STATUS Status;
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UINT64 Attribute;
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if (IoMmu != NULL) {
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Status = IoMmu->Map (
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IoMmu,
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Operation,
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HostAddress,
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NumberOfBytes,
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DeviceAddress,
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Mapping
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);
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if (EFI_ERROR (Status)) {
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return EFI_OUT_OF_RESOURCES;
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}
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switch (Operation) {
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case EdkiiIoMmuOperationBusMasterRead:
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case EdkiiIoMmuOperationBusMasterRead64:
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Attribute = EDKII_IOMMU_ACCESS_READ;
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break;
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case EdkiiIoMmuOperationBusMasterWrite:
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case EdkiiIoMmuOperationBusMasterWrite64:
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Attribute = EDKII_IOMMU_ACCESS_WRITE;
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break;
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case EdkiiIoMmuOperationBusMasterCommonBuffer:
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case EdkiiIoMmuOperationBusMasterCommonBuffer64:
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Attribute = EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE;
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break;
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default:
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ASSERT(FALSE);
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return EFI_INVALID_PARAMETER;
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}
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Status = IoMmu->SetAttribute (
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IoMmu,
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*Mapping,
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Attribute
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);
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if (EFI_ERROR (Status)) {
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IoMmu->Unmap (IoMmu, Mapping);
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*Mapping = NULL;
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return Status;
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}
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} else {
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*DeviceAddress = (EFI_PHYSICAL_ADDRESS) (UINTN) HostAddress;
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*Mapping = NULL;
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Status = EFI_SUCCESS;
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}
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return Status;
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}
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/**
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Completes the Map() operation and releases any corresponding resources.
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@param IoMmu Pointer to IOMMU PPI.
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@param Mapping The mapping value returned from Map().
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**/
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VOID
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IoMmuUnmap (
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IN EDKII_IOMMU_PPI *IoMmu,
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IN VOID *Mapping
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)
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{
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if (IoMmu != NULL) {
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IoMmu->SetAttribute (IoMmu, Mapping, 0);
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IoMmu->Unmap (IoMmu, Mapping);
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}
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}
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/**
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Allocates pages that are suitable for an OperationBusMasterCommonBuffer or
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OperationBusMasterCommonBuffer64 mapping.
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@param IoMmu Pointer to IOMMU PPI.
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@param Pages The number of pages to allocate.
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@param HostAddress A pointer to store the base system memory address of the
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allocated range.
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@param DeviceAddress The resulting map address for the bus master PCI controller to use to
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access the hosts HostAddress.
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@param Mapping A resulting value to pass to Unmap().
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@retval EFI_SUCCESS The requested memory pages were allocated.
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@retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
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MEMORY_WRITE_COMBINE and MEMORY_CACHED.
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@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
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@retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
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**/
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EFI_STATUS
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IoMmuAllocateBuffer (
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IN EDKII_IOMMU_PPI *IoMmu,
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IN UINTN Pages,
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OUT VOID **HostAddress,
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OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
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OUT VOID **Mapping
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)
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{
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EFI_STATUS Status;
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UINTN NumberOfBytes;
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EFI_PHYSICAL_ADDRESS HostPhyAddress;
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*HostAddress = NULL;
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*DeviceAddress = 0;
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*Mapping = NULL;
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if (IoMmu != NULL) {
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Status = IoMmu->AllocateBuffer (
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IoMmu,
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EfiBootServicesData,
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Pages,
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HostAddress,
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0
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);
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if (EFI_ERROR (Status)) {
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return EFI_OUT_OF_RESOURCES;
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}
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NumberOfBytes = EFI_PAGES_TO_SIZE (Pages);
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Status = IoMmu->Map (
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IoMmu,
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EdkiiIoMmuOperationBusMasterCommonBuffer,
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*HostAddress,
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&NumberOfBytes,
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DeviceAddress,
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Mapping
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);
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if (EFI_ERROR (Status)) {
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IoMmu->FreeBuffer (IoMmu, Pages, *HostAddress);
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*HostAddress = NULL;
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return EFI_OUT_OF_RESOURCES;
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}
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Status = IoMmu->SetAttribute (
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IoMmu,
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*Mapping,
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EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE
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);
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if (EFI_ERROR (Status)) {
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IoMmu->Unmap (IoMmu, *Mapping);
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IoMmu->FreeBuffer (IoMmu, Pages, *HostAddress);
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*Mapping = NULL;
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*HostAddress = NULL;
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return Status;
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}
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} else {
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Status = PeiServicesAllocatePages (
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EfiBootServicesCode,
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Pages,
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&HostPhyAddress
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);
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if (EFI_ERROR (Status)) {
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return EFI_OUT_OF_RESOURCES;
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}
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*HostAddress = (VOID *) (UINTN) HostPhyAddress;
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*DeviceAddress = HostPhyAddress;
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*Mapping = NULL;
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}
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return Status;
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}
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/**
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Frees memory that was allocated with AllocateBuffer().
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@param IoMmu Pointer to IOMMU PPI.
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@param Pages The number of pages to free.
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@param HostAddress The base system memory address of the allocated range.
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@param Mapping The mapping value returned from Map().
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**/
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VOID
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IoMmuFreeBuffer (
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IN EDKII_IOMMU_PPI *IoMmu,
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IN UINTN Pages,
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IN VOID *HostAddress,
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IN VOID *Mapping
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)
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{
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if (IoMmu != NULL) {
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IoMmu->SetAttribute (IoMmu, Mapping, 0);
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IoMmu->Unmap (IoMmu, Mapping);
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IoMmu->FreeBuffer (IoMmu, Pages, HostAddress);
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}
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}
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/**
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Initialize IOMMU.
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@param IoMmu Pointer to pointer to IOMMU PPI.
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**/
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VOID
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IoMmuInit (
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OUT EDKII_IOMMU_PPI **IoMmu
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)
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{
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PeiServicesLocatePpi (
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&gEdkiiIoMmuPpiGuid,
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0,
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NULL,
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(VOID **) IoMmu
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);
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}
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@ -2,7 +2,7 @@
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PEIM to produce gPeiUsb2HostControllerPpiGuid based on gPeiUsbControllerPpiGuid
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which is used to enable recovery function from USB Drivers.
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Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions
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@ -1140,6 +1140,36 @@ ON_EXIT:
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return Status;
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}
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/**
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One notified function to stop the Host Controller at the end of PEI
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@param[in] PeiServices Pointer to PEI Services Table.
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@param[in] NotifyDescriptor Pointer to the descriptor for the Notification event that
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caused this function to execute.
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@param[in] Ppi Pointer to the PPI data associated with this function.
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@retval EFI_SUCCESS The function completes successfully
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@retval others
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**/
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EFI_STATUS
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EFIAPI
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EhcEndOfPei (
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IN EFI_PEI_SERVICES **PeiServices,
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IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
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IN VOID *Ppi
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)
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{
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PEI_USB2_HC_DEV *Ehc;
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Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_THIS_NOTIFY (NotifyDescriptor);
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EhcHaltHC (Ehc, EHC_GENERIC_TIMEOUT);
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EhcFreeSched (Ehc);
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return EFI_SUCCESS;
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}
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/**
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@param FileHandle Handle of the file being invoked.
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@param PeiServices Describes the list of possible PEI Services.
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@ -1219,6 +1249,8 @@ EhcPeimEntry (
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EhcDev->Signature = USB2_HC_DEV_SIGNATURE;
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IoMmuInit (&EhcDev->IoMmu);
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EhcDev->UsbHostControllerBaseAddress = (UINT32) BaseAddress;
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continue;
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}
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EhcDev->EndOfPeiNotifyList.Flags = (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);
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EhcDev->EndOfPeiNotifyList.Guid = &gEfiEndOfPeiSignalPpiGuid;
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EhcDev->EndOfPeiNotifyList.Notify = EhcEndOfPei;
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PeiServicesNotifyPpi (&EhcDev->EndOfPeiNotifyList);
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Index++;
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}
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@ -1,7 +1,7 @@
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/** @file
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Private Header file for Usb Host Controller PEIM
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Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions
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@ -21,6 +21,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#include <Ppi/UsbController.h>
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#include <Ppi/Usb2HostController.h>
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#include <Ppi/IoMmu.h>
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#include <Ppi/EndOfPeiPhase.h>
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#include <Library/DebugLib.h>
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#include <Library/PeimEntryPoint.h>
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@ -94,7 +96,13 @@ typedef struct _PEI_USB2_HC_DEV PEI_USB2_HC_DEV;
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struct _PEI_USB2_HC_DEV {
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UINTN Signature;
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PEI_USB2_HOST_CONTROLLER_PPI Usb2HostControllerPpi;
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EDKII_IOMMU_PPI *IoMmu;
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EFI_PEI_PPI_DESCRIPTOR PpiDescriptor;
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//
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// EndOfPei callback is used to stop the XHC DMA operation
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// after exit PEI phase.
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//
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EFI_PEI_NOTIFY_DESCRIPTOR EndOfPeiNotifyList;
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UINT32 UsbHostControllerBaseAddress;
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PEI_URB *Urb;
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USBHC_MEM_POOL *MemPool;
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@ -122,7 +130,6 @@ struct _PEI_USB2_HC_DEV {
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// Periodic (interrupt) transfer schedule data:
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//
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VOID *PeriodFrame; // Mapped as common buffer
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VOID *PeriodFrameHost;
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VOID *PeriodFrameMap;
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PEI_EHC_QH *PeriodOne;
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@ -138,6 +145,7 @@ struct _PEI_USB2_HC_DEV {
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};
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#define PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS(a) CR (a, PEI_USB2_HC_DEV, Usb2HostControllerPpi, USB2_HC_DEV_SIGNATURE)
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#define PEI_RECOVERY_USB_EHC_DEV_FROM_THIS_NOTIFY(a) CR (a, PEI_USB2_HC_DEV, EndOfPeiNotifyList, USB2_HC_DEV_SIGNATURE)
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/**
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@param EhcDev EHCI Device.
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@ -174,6 +182,7 @@ UsbHcInitMemPool (
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/**
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Release the memory management pool.
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@param Ehc The EHCI device.
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@param Pool The USB memory pool to free.
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@retval EFI_DEVICE_ERROR Fail to free the memory pool.
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@ -182,6 +191,7 @@ UsbHcInitMemPool (
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**/
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EFI_STATUS
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UsbHcFreeMemPool (
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IN PEI_USB2_HC_DEV *Ehc,
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IN USBHC_MEM_POOL *Pool
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)
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;
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@ -208,6 +218,7 @@ UsbHcAllocateMem (
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/**
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Free the allocated memory back to the memory pool.
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@param Ehc The EHCI device.
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@param Pool The memory pool of the host controller.
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@param Mem The memory to free.
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@param Size The size of the memory to free.
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|
@ -215,10 +226,110 @@ UsbHcAllocateMem (
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**/
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VOID
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UsbHcFreeMem (
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IN PEI_USB2_HC_DEV *Ehc,
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IN USBHC_MEM_POOL *Pool,
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IN VOID *Mem,
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IN UINTN Size
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)
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;
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/**
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Provides the controller-specific addresses required to access system memory from a
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DMA bus master.
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@param IoMmu Pointer to IOMMU PPI.
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@param Operation Indicates if the bus master is going to read or write to system memory.
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@param HostAddress The system memory address to map to the PCI controller.
|
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@param NumberOfBytes On input the number of bytes to map. On output the number of bytes
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that were mapped.
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@param DeviceAddress The resulting map address for the bus master PCI controller to use to
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access the hosts HostAddress.
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@param Mapping A resulting value to pass to Unmap().
|
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@retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
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@retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
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@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
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@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
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@retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
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**/
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EFI_STATUS
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IoMmuMap (
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IN EDKII_IOMMU_PPI *IoMmu,
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IN EDKII_IOMMU_OPERATION Operation,
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IN VOID *HostAddress,
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IN OUT UINTN *NumberOfBytes,
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OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
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OUT VOID **Mapping
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);
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/**
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Completes the Map() operation and releases any corresponding resources.
|
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@param IoMmu Pointer to IOMMU PPI.
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@param Mapping The mapping value returned from Map().
|
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**/
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VOID
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IoMmuUnmap (
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IN EDKII_IOMMU_PPI *IoMmu,
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IN VOID *Mapping
|
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);
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/**
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Allocates pages that are suitable for an OperationBusMasterCommonBuffer or
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OperationBusMasterCommonBuffer64 mapping.
|
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|
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@param IoMmu Pointer to IOMMU PPI.
|
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@param Pages The number of pages to allocate.
|
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@param HostAddress A pointer to store the base system memory address of the
|
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allocated range.
|
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@param DeviceAddress The resulting map address for the bus master PCI controller to use to
|
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access the hosts HostAddress.
|
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@param Mapping A resulting value to pass to Unmap().
|
||||
|
||||
@retval EFI_SUCCESS The requested memory pages were allocated.
|
||||
@retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
|
||||
MEMORY_WRITE_COMBINE and MEMORY_CACHED.
|
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@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
|
||||
@retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
|
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**/
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EFI_STATUS
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IoMmuAllocateBuffer (
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IN EDKII_IOMMU_PPI *IoMmu,
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IN UINTN Pages,
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OUT VOID **HostAddress,
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OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
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OUT VOID **Mapping
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);
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/**
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Frees memory that was allocated with AllocateBuffer().
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@param IoMmu Pointer to IOMMU PPI.
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@param Pages The number of pages to free.
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@param HostAddress The base system memory address of the allocated range.
|
||||
@param Mapping The mapping value returned from Map().
|
||||
|
||||
**/
|
||||
VOID
|
||||
IoMmuFreeBuffer (
|
||||
IN EDKII_IOMMU_PPI *IoMmu,
|
||||
IN UINTN Pages,
|
||||
IN VOID *HostAddress,
|
||||
IN VOID *Mapping
|
||||
);
|
||||
|
||||
/**
|
||||
Initialize IOMMU.
|
||||
|
||||
@param IoMmu Pointer to pointer to IOMMU PPI.
|
||||
|
||||
**/
|
||||
VOID
|
||||
IoMmuInit (
|
||||
OUT EDKII_IOMMU_PPI **IoMmu
|
||||
);
|
||||
|
||||
#endif
|
||||
|
|
|
@ -4,7 +4,7 @@
|
|||
# It produces gPeiUsb2HostControllerPpiGuid based on gPeiUsbControllerPpiGuid
|
||||
# which is used to enable recovery function from USB Drivers.
|
||||
#
|
||||
# Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.<BR>
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions
|
||||
|
@ -43,6 +43,7 @@
|
|||
EhciSched.h
|
||||
EhciUrb.h
|
||||
UsbHcMem.h
|
||||
DmaMem.c
|
||||
|
||||
|
||||
[Packages]
|
||||
|
@ -61,7 +62,8 @@
|
|||
[Ppis]
|
||||
gPeiUsb2HostControllerPpiGuid ## PRODUCES
|
||||
gPeiUsbControllerPpiGuid ## CONSUMES
|
||||
|
||||
gEdkiiIoMmuPpiGuid ## CONSUMES
|
||||
gEfiEndOfPeiSignalPpiGuid ## CONSUMES
|
||||
|
||||
[Depex]
|
||||
gEfiPeiMemoryDiscoveredPpiGuid AND gPeiUsbControllerPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
PEIM to produce gPeiUsb2HostControllerPpiGuid based on gPeiUsbControllerPpiGuid
|
||||
which is used to enable recovery function from USB Drivers.
|
||||
|
||||
Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.<BR>
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions
|
||||
|
@ -107,11 +107,13 @@ EhcInitSched (
|
|||
IN PEI_USB2_HC_DEV *Ehc
|
||||
)
|
||||
{
|
||||
VOID *Buf;
|
||||
EFI_PHYSICAL_ADDRESS PhyAddr;
|
||||
VOID *Map;
|
||||
UINTN Index;
|
||||
UINT32 *Desc;
|
||||
EFI_STATUS Status;
|
||||
EFI_PHYSICAL_ADDRESS PciAddr;
|
||||
|
||||
//
|
||||
// First initialize the periodical schedule data:
|
||||
|
@ -124,15 +126,19 @@ EhcInitSched (
|
|||
// The Frame List ocupies 4K bytes,
|
||||
// and must be aligned on 4-Kbyte boundaries.
|
||||
//
|
||||
Status = PeiServicesAllocatePages (
|
||||
EfiBootServicesCode,
|
||||
Status = IoMmuAllocateBuffer (
|
||||
Ehc->IoMmu,
|
||||
1,
|
||||
&PhyAddr
|
||||
&Buf,
|
||||
&PhyAddr,
|
||||
&Map
|
||||
);
|
||||
|
||||
Map = NULL;
|
||||
Ehc->PeriodFrameHost = (VOID *)(UINTN)PhyAddr;
|
||||
Ehc->PeriodFrame = (VOID *)(UINTN)PhyAddr;
|
||||
if (EFI_ERROR (Status)) {
|
||||
return EFI_OUT_OF_RESOURCES;
|
||||
}
|
||||
|
||||
Ehc->PeriodFrame = Buf;
|
||||
Ehc->PeriodFrameMap = Map;
|
||||
Ehc->High32bitAddr = EHC_HIGH_32BIT (PhyAddr);
|
||||
|
||||
|
@ -161,19 +167,20 @@ EhcInitSched (
|
|||
// Initialize the frame list entries then set the registers
|
||||
//
|
||||
Desc = (UINT32 *) Ehc->PeriodFrame;
|
||||
|
||||
PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Ehc->PeriodOne, sizeof (PEI_EHC_QH));
|
||||
for (Index = 0; Index < EHC_FRAME_LEN; Index++) {
|
||||
Desc[Index] = QH_LINK (Ehc->PeriodOne, EHC_TYPE_QH, FALSE);
|
||||
Desc[Index] = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);
|
||||
}
|
||||
|
||||
EhcWriteOpReg (Ehc, EHC_FRAME_BASE_OFFSET, EHC_LOW_32BIT (Ehc->PeriodFrame));
|
||||
EhcWriteOpReg (Ehc, EHC_FRAME_BASE_OFFSET, EHC_LOW_32BIT (PhyAddr));
|
||||
|
||||
//
|
||||
// Second initialize the asynchronous schedule:
|
||||
// Only need to set the AsynListAddr register to
|
||||
// the reclamation header
|
||||
//
|
||||
EhcWriteOpReg (Ehc, EHC_ASYNC_HEAD_OFFSET, EHC_LOW_32BIT (Ehc->ReclaimHead));
|
||||
PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Ehc->ReclaimHead, sizeof (PEI_EHC_QH));
|
||||
EhcWriteOpReg (Ehc, EHC_ASYNC_HEAD_OFFSET, EHC_LOW_32BIT (PciAddr));
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
|
@ -192,26 +199,27 @@ EhcFreeSched (
|
|||
EhcWriteOpReg (Ehc, EHC_ASYNC_HEAD_OFFSET, 0);
|
||||
|
||||
if (Ehc->PeriodOne != NULL) {
|
||||
UsbHcFreeMem (Ehc->MemPool, Ehc->PeriodOne, sizeof (PEI_EHC_QH));
|
||||
UsbHcFreeMem (Ehc, Ehc->MemPool, Ehc->PeriodOne, sizeof (PEI_EHC_QH));
|
||||
Ehc->PeriodOne = NULL;
|
||||
}
|
||||
|
||||
if (Ehc->ReclaimHead != NULL) {
|
||||
UsbHcFreeMem (Ehc->MemPool, Ehc->ReclaimHead, sizeof (PEI_EHC_QH));
|
||||
UsbHcFreeMem (Ehc, Ehc->MemPool, Ehc->ReclaimHead, sizeof (PEI_EHC_QH));
|
||||
Ehc->ReclaimHead = NULL;
|
||||
}
|
||||
|
||||
if (Ehc->ShortReadStop != NULL) {
|
||||
UsbHcFreeMem (Ehc->MemPool, Ehc->ShortReadStop, sizeof (PEI_EHC_QTD));
|
||||
UsbHcFreeMem (Ehc, Ehc->MemPool, Ehc->ShortReadStop, sizeof (PEI_EHC_QTD));
|
||||
Ehc->ShortReadStop = NULL;
|
||||
}
|
||||
|
||||
if (Ehc->MemPool != NULL) {
|
||||
UsbHcFreeMemPool (Ehc->MemPool);
|
||||
UsbHcFreeMemPool (Ehc, Ehc->MemPool);
|
||||
Ehc->MemPool = NULL;
|
||||
}
|
||||
|
||||
if (Ehc->PeriodFrame != NULL) {
|
||||
IoMmuFreeBuffer (Ehc->IoMmu, 1, Ehc->PeriodFrame, Ehc->PeriodFrameMap);
|
||||
Ehc->PeriodFrame = NULL;
|
||||
}
|
||||
}
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
PEIM to produce gPeiUsb2HostControllerPpiGuid based on gPeiUsbControllerPpiGuid
|
||||
which is used to enable recovery function from USB Drivers.
|
||||
|
||||
Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.<BR>
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions
|
||||
|
@ -301,7 +301,7 @@ EhcFreeQtds (
|
|||
Qtd = EFI_LIST_CONTAINER (Entry, PEI_EHC_QTD, QtdList);
|
||||
|
||||
RemoveEntryList (&Qtd->QtdList);
|
||||
UsbHcFreeMem (Ehc->MemPool, Qtd, sizeof (PEI_EHC_QTD));
|
||||
UsbHcFreeMem (Ehc, Ehc->MemPool, Qtd, sizeof (PEI_EHC_QTD));
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -318,13 +318,21 @@ EhcFreeUrb (
|
|||
IN PEI_URB *Urb
|
||||
)
|
||||
{
|
||||
if (Urb->RequestPhy != NULL) {
|
||||
IoMmuUnmap (Ehc->IoMmu, Urb->RequestMap);
|
||||
}
|
||||
|
||||
if (Urb->DataMap != NULL) {
|
||||
IoMmuUnmap (Ehc->IoMmu, Urb->DataMap);
|
||||
}
|
||||
|
||||
if (Urb->Qh != NULL) {
|
||||
//
|
||||
// Ensure that this queue head has been unlinked from the
|
||||
// schedule data structures. Free all the associated QTDs
|
||||
//
|
||||
EhcFreeQtds (Ehc, &Urb->Qh->Qtds);
|
||||
UsbHcFreeMem (Ehc->MemPool, Urb->Qh, sizeof (PEI_EHC_QH));
|
||||
UsbHcFreeMem (Ehc, Ehc->MemPool, Urb->Qh, sizeof (PEI_EHC_QH));
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -527,14 +535,12 @@ EhcCreateUrb (
|
|||
{
|
||||
USB_ENDPOINT *Ep;
|
||||
EFI_PHYSICAL_ADDRESS PhyAddr;
|
||||
EDKII_IOMMU_OPERATION MapOp;
|
||||
EFI_STATUS Status;
|
||||
UINTN Len;
|
||||
PEI_URB *Urb;
|
||||
VOID *Map;
|
||||
|
||||
|
||||
Map = NULL;
|
||||
|
||||
Urb = Ehc->Urb;
|
||||
Urb->Signature = EHC_URB_SIG;
|
||||
InitializeListHead (&Urb->UrbList);
|
||||
|
@ -576,24 +582,40 @@ EhcCreateUrb (
|
|||
//
|
||||
if (Request != NULL) {
|
||||
Len = sizeof (EFI_USB_DEVICE_REQUEST);
|
||||
PhyAddr = (EFI_PHYSICAL_ADDRESS) (UINTN) Request ;
|
||||
if ( (Len != sizeof (EFI_USB_DEVICE_REQUEST))) {
|
||||
MapOp = EdkiiIoMmuOperationBusMasterRead;
|
||||
Status = IoMmuMap (Ehc->IoMmu, MapOp, Request, &Len, &PhyAddr, &Map);
|
||||
|
||||
if (EFI_ERROR (Status) || (Len != sizeof (EFI_USB_DEVICE_REQUEST))) {
|
||||
goto ON_ERROR;
|
||||
}
|
||||
|
||||
Urb->RequestPhy = (VOID *) ((UINTN) PhyAddr);
|
||||
Urb->RequestMap = Map;
|
||||
} else {
|
||||
Urb->RequestPhy = NULL;
|
||||
Urb->RequestMap = NULL;
|
||||
}
|
||||
|
||||
if (Data != NULL) {
|
||||
Len = DataLen;
|
||||
PhyAddr = (EFI_PHYSICAL_ADDRESS) (UINTN) Data ;
|
||||
if ( (Len != DataLen)) {
|
||||
|
||||
if (Ep->Direction == EfiUsbDataIn) {
|
||||
MapOp = EdkiiIoMmuOperationBusMasterWrite;
|
||||
} else {
|
||||
MapOp = EdkiiIoMmuOperationBusMasterRead;
|
||||
}
|
||||
|
||||
Status = IoMmuMap (Ehc->IoMmu, MapOp, Data, &Len, &PhyAddr, &Map);
|
||||
|
||||
if (EFI_ERROR (Status) || (Len != DataLen)) {
|
||||
goto ON_ERROR;
|
||||
}
|
||||
|
||||
Urb->DataPhy = (VOID *) ((UINTN) PhyAddr);
|
||||
Urb->DataMap = Map;
|
||||
} else {
|
||||
Urb->DataPhy = NULL;
|
||||
Urb->DataMap = NULL;
|
||||
}
|
||||
|
||||
Status = EhcCreateQtds (Ehc, Urb);
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
PEIM to produce gPeiUsb2HostControllerPpiGuid based on gPeiUsbControllerPpiGuid
|
||||
which is used to enable recovery function from USB Drivers.
|
||||
|
||||
Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.<BR>
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions
|
||||
|
@ -79,16 +79,18 @@ UsbHcAllocMemBlock (
|
|||
|
||||
Block->Bits = (UINT8 *)(UINTN)TempPtr;
|
||||
|
||||
|
||||
Status = PeiServicesAllocatePages (
|
||||
EfiBootServicesCode,
|
||||
Status = IoMmuAllocateBuffer (
|
||||
Ehc->IoMmu,
|
||||
Pages,
|
||||
&TempPtr
|
||||
(VOID **) &BufHost,
|
||||
&MappedAddr,
|
||||
&Mapping
|
||||
);
|
||||
ZeroMem ((VOID *)(UINTN)TempPtr, Pages*EFI_PAGE_SIZE);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return NULL;
|
||||
}
|
||||
ZeroMem (BufHost, Pages*EFI_PAGE_SIZE);
|
||||
|
||||
BufHost = (VOID *)(UINTN)TempPtr;
|
||||
MappedAddr = (EFI_PHYSICAL_ADDRESS) (UINTN) BufHost;
|
||||
//
|
||||
// Check whether the data structure used by the host controller
|
||||
// should be restricted into the same 4G
|
||||
|
@ -109,17 +111,21 @@ UsbHcAllocMemBlock (
|
|||
/**
|
||||
Free the memory block from the memory pool.
|
||||
|
||||
@param Ehc The EHCI device.
|
||||
@param Pool The memory pool to free the block from.
|
||||
@param Block The memory block to free.
|
||||
|
||||
**/
|
||||
VOID
|
||||
UsbHcFreeMemBlock (
|
||||
IN PEI_USB2_HC_DEV *Ehc,
|
||||
IN USBHC_MEM_POOL *Pool,
|
||||
IN USBHC_MEM_BLOCK *Block
|
||||
)
|
||||
{
|
||||
ASSERT ((Pool != NULL) && (Block != NULL));
|
||||
|
||||
IoMmuFreeBuffer (Ehc->IoMmu, EFI_SIZE_TO_PAGES (Block->BufLen), Block->BufHost, Block->Mapping);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -195,6 +201,54 @@ UsbHcAllocMemFromBlock (
|
|||
return Block->Buf + (StartByte * 8 + StartBit) * USBHC_MEM_UNIT;
|
||||
}
|
||||
|
||||
/**
|
||||
Calculate the corresponding pci bus address according to the Mem parameter.
|
||||
|
||||
@param Pool The memory pool of the host controller.
|
||||
@param Mem The pointer to host memory.
|
||||
@param Size The size of the memory region.
|
||||
|
||||
@return the pci memory address
|
||||
**/
|
||||
EFI_PHYSICAL_ADDRESS
|
||||
UsbHcGetPciAddressForHostMem (
|
||||
IN USBHC_MEM_POOL *Pool,
|
||||
IN VOID *Mem,
|
||||
IN UINTN Size
|
||||
)
|
||||
{
|
||||
USBHC_MEM_BLOCK *Head;
|
||||
USBHC_MEM_BLOCK *Block;
|
||||
UINTN AllocSize;
|
||||
EFI_PHYSICAL_ADDRESS PhyAddr;
|
||||
UINTN Offset;
|
||||
|
||||
Head = Pool->Head;
|
||||
AllocSize = USBHC_MEM_ROUND (Size);
|
||||
|
||||
if (Mem == NULL) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
for (Block = Head; Block != NULL; Block = Block->Next) {
|
||||
//
|
||||
// scan the memory block list for the memory block that
|
||||
// completely contains the allocated memory.
|
||||
//
|
||||
if ((Block->BufHost <= (UINT8 *) Mem) && (((UINT8 *) Mem + AllocSize) <= (Block->BufHost + Block->BufLen))) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
ASSERT ((Block != NULL));
|
||||
//
|
||||
// calculate the pci memory address for host memory address.
|
||||
//
|
||||
Offset = (UINT8 *)Mem - Block->BufHost;
|
||||
PhyAddr = (EFI_PHYSICAL_ADDRESS)(UINTN) (Block->Buf + Offset);
|
||||
return PhyAddr;
|
||||
}
|
||||
|
||||
/**
|
||||
Insert the memory block to the pool's list of the blocks.
|
||||
|
||||
|
@ -317,6 +371,7 @@ UsbHcInitMemPool (
|
|||
/**
|
||||
Release the memory management pool.
|
||||
|
||||
@param Ehc The EHCI device.
|
||||
@param Pool The USB memory pool to free.
|
||||
|
||||
@retval EFI_DEVICE_ERROR Fail to free the memory pool.
|
||||
|
@ -325,6 +380,7 @@ UsbHcInitMemPool (
|
|||
**/
|
||||
EFI_STATUS
|
||||
UsbHcFreeMemPool (
|
||||
IN PEI_USB2_HC_DEV *Ehc,
|
||||
IN USBHC_MEM_POOL *Pool
|
||||
)
|
||||
{
|
||||
|
@ -337,11 +393,11 @@ UsbHcFreeMemPool (
|
|||
// UsbHcUnlinkMemBlock can't be used to unlink and free the
|
||||
// first block.
|
||||
//
|
||||
for (Block = Pool->Head->Next; Block != NULL; Block = Pool->Head->Next) {
|
||||
UsbHcFreeMemBlock (Pool, Block);
|
||||
for (Block = Pool->Head->Next; Block != NULL; Block = Block->Next) {
|
||||
UsbHcFreeMemBlock (Ehc, Pool, Block);
|
||||
}
|
||||
|
||||
UsbHcFreeMemBlock (Pool, Pool->Head);
|
||||
UsbHcFreeMemBlock (Ehc, Pool, Pool->Head);
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
@ -425,6 +481,7 @@ UsbHcAllocateMem (
|
|||
/**
|
||||
Free the allocated memory back to the memory pool.
|
||||
|
||||
@param Ehc The EHCI device.
|
||||
@param Pool The memory pool of the host controller.
|
||||
@param Mem The memory to free.
|
||||
@param Size The size of the memory to free.
|
||||
|
@ -432,6 +489,7 @@ UsbHcAllocateMem (
|
|||
**/
|
||||
VOID
|
||||
UsbHcFreeMem (
|
||||
IN PEI_USB2_HC_DEV *Ehc,
|
||||
IN USBHC_MEM_POOL *Pool,
|
||||
IN VOID *Mem,
|
||||
IN UINTN Size
|
||||
|
@ -486,7 +544,7 @@ UsbHcFreeMem (
|
|||
// Release the current memory block if it is empty and not the head
|
||||
//
|
||||
if ((Block != Head) && UsbHcIsMemBlockEmpty (Block)) {
|
||||
UsbHcFreeMemBlock (Pool, Block);
|
||||
UsbHcFreeMemBlock (Ehc, Pool, Block);
|
||||
}
|
||||
|
||||
return ;
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/** @file
|
||||
Private Header file for Usb Host Controller PEIM
|
||||
|
||||
Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.<BR>
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions
|
||||
|
@ -74,4 +74,20 @@ typedef struct _USBHC_MEM_POOL {
|
|||
} while (0)
|
||||
|
||||
|
||||
/**
|
||||
Calculate the corresponding pci bus address according to the Mem parameter.
|
||||
|
||||
@param Pool The memory pool of the host controller.
|
||||
@param Mem The pointer to host memory.
|
||||
@param Size The size of the memory region.
|
||||
|
||||
@return the pci memory address
|
||||
**/
|
||||
EFI_PHYSICAL_ADDRESS
|
||||
UsbHcGetPciAddressForHostMem (
|
||||
IN USBHC_MEM_POOL *Pool,
|
||||
IN VOID *Mem,
|
||||
IN UINTN Size
|
||||
);
|
||||
|
||||
#endif
|
||||
|
|
Loading…
Reference in New Issue