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ArmPkg/ArmGicDxe: Use EOImode 0x0 on GICv3

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When re-entering EDK2 from a high level OS such as Linux, the GICv3 may
be configured to use split priority drop and deactivate (EOImode == 1),
whereas EDK2's GICv3 driver assumes the default setting of EOImode == 0.

So clear the EOImode bit explicitly when taking control of the GIC.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
This commit is contained in:
Ard Biesheuvel 2025-01-17 12:08:51 +01:00 committed by mergify[bot]
parent 81e2cd329e
commit 2d2642f483
5 changed files with 50 additions and 1 deletions
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10
ArmPkg/Drivers/ArmGicDxe/ArmGicDxe.h
View File

@ -139,4 +139,14 @@ ArmGicV3SetPriorityMask (
IN UINTN Priority IN UINTN Priority
); );
UINTN
ArmGicV3GetControlRegister (
VOID
);
VOID
ArmGicV3SetControlRegister (
IN UINTN Value
);
#endif // ARM_GIC_DXE_H_ #endif // ARM_GIC_DXE_H_

17
ArmPkg/Drivers/ArmGicDxe/GicV3/AArch64/ArmGicV3.S
View File

@ -22,6 +22,7 @@
#define ICC_IAR1_EL1 S3_0_C12_C12_0 #define ICC_IAR1_EL1 S3_0_C12_C12_0
#define ICC_PMR_EL1 S3_0_C4_C6_0 #define ICC_PMR_EL1 S3_0_C4_C6_0
#define ICC_BPR1_EL1 S3_0_C12_C12_3 #define ICC_BPR1_EL1 S3_0_C12_C12_3
#define ICC_CTLR_EL1 S3_0_C12_C12_4
#endif #endif
@ -99,3 +100,19 @@ ASM_FUNC(ArmGicV3SetPriorityMask)
ASM_FUNC(ArmGicV3SetBinaryPointer) ASM_FUNC(ArmGicV3SetBinaryPointer)
msr ICC_BPR1_EL1, x0 msr ICC_BPR1_EL1, x0
ret ret
//UINTN
//ArmGicV3GetControlRegister(
// VOID
// );
ASM_FUNC(ArmGicV3GetControlRegister)
mrs x0, ICC_CTLR_EL1
ret
//VOID
//ArmGicV3SetControlRegister(
// IN UINTN Value
// );
ASM_FUNC(ArmGicV3SetControlRegister)
msr ICC_CTLR_EL1, x0
ret

16
ArmPkg/Drivers/ArmGicDxe/GicV3/Arm/ArmGicV3.S
View File

@ -78,3 +78,19 @@ ASM_FUNC(ArmGicV3SetPriorityMask)
ASM_FUNC(ArmGicV3SetBinaryPointer) ASM_FUNC(ArmGicV3SetBinaryPointer)
mcr p15, 0, r0, c12, c12, 3 //ICC_BPR1 mcr p15, 0, r0, c12, c12, 3 //ICC_BPR1
bx lr bx lr
//UINTN
//ArmGicV3GetControlRegister(
// VOID
// );
ASM_FUNC(ArmGicV3GetControlRegister)
mrc p15, 0, r0, c12, c12, 4 //ICC_CTLR
bx lr
//VOID
//ArmGicV3SetControlRegister(
// IN UINTN Value
// );
ASM_FUNC(ArmGicV3SetControlRegister)
mcr p15, 0, r0, c12, c12, 4 //ICC_CTLR
bx lr

5
ArmPkg/Drivers/ArmGicDxe/GicV3/ArmGicV3Dxe.c
View File

@ -704,6 +704,11 @@ GicV3DxeInitialize (
// Set priority mask reg to 0xff to allow all priorities through // Set priority mask reg to 0xff to allow all priorities through
ArmGicV3SetPriorityMask (0xff); ArmGicV3SetPriorityMask (0xff);
// Use combined priority drop and deactivate (EOImode == 0)
RegValue = ArmGicV3GetControlRegister ();
RegValue &= ~(UINT64)ICC_CTLR_EOImode;
ArmGicV3SetControlRegister (RegValue);
// Enable gic cpu interface // Enable gic cpu interface
ArmGicV3EnableInterruptInterface (); ArmGicV3EnableInterruptInterface ();

1
ArmPkg/Include/Library/ArmGicLib.h
View File

@ -119,6 +119,7 @@
// GIC revision 3 specific declarations // GIC revision 3 specific declarations
#define ICC_SRE_EL2_SRE (1 << 0) #define ICC_SRE_EL2_SRE (1 << 0)
#define ICC_CTLR_EOImode (1 << 1)
#define ARM_GICD_IROUTER_IRM BIT31 #define ARM_GICD_IROUTER_IRM BIT31