mirror of https://github.com/acidanthera/audk.git
ARM Packages: Replaced the macro GetCorePositionFromMpId() by the ArmPlatformGetCorePosition()
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> Acked-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14346 6f19259b-4bc3-4df7-8a09-765794883524
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oliviermartin
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2d45f194d9
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@ -120,16 +120,6 @@
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.long (_Data) ; \
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1:
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// Convert the (ClusterId,CoreId) into a Core Position
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// We assume there are 4 cores per cluster
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// Note: 0xFFFF is the magic value for ARM_CORE_MASK | ARM_CLUSTER_MASK
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#define GetCorePositionFromMpId(Pos, MpId, Tmp) \
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ldr Tmp, =0xFFFF \
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and MpId, Tmp \
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lsr Pos, MpId, #6 ; \
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and Tmp, MpId, #3 ; \
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add Pos, Pos, Tmp
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// Reserve a region at the top of the Primary Core stack
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// for Global variables for the XIP phase
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#define SetPrimaryStack(StackTop, GlobalSize, Tmp) \
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@ -211,16 +201,6 @@ _InitializePrimaryStackEnd:
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#define LoadConstantToReg(Data, Reg) \
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ldr Reg, =Data
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// Convert the (ClusterId,CoreId) into a Core Position
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// We assume there are 4 cores per cluster
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// Note: 0xFFFF is the magic value for ARM_CORE_MASK | ARM_CLUSTER_MASK
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#define GetCorePositionFromMpId(Pos, MpId, Tmp) \
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ldr Tmp, =0xFFFF ; \
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and MpId, Tmp ; \
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lsr Pos, MpId, #6 ; \
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and Tmp, MpId, #3 ; \
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add Pos, Pos, Tmp
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#define SetPrimaryStack(StackTop, GlobalSize, Tmp) \
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and Tmp, GlobalSize, #7 ; \
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rsbne Tmp, Tmp, #8 ; \
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@ -313,8 +293,6 @@ _InitializePrimaryStackEnd:
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// conditional load testing eq flag
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#define LoadConstantToRegIfEq(Data, Reg) LoadConstantToRegIfEqMacro Data, Reg
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#define GetCorePositionFromMpId(Pos, MpId, Tmp) GetCorePositionFromMpId Pos, MpId, Tmp
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#define SetPrimaryStack(StackTop,GlobalSize,Tmp) SetPrimaryStack StackTop, GlobalSize, Tmp
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// Initialize the Global Variable with '0'
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@ -80,17 +80,6 @@
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ldr $Reg, =($Data)
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MEND
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MACRO
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GetCorePositionFromMpId $Pos, $MpId, $Tmp
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;Note: The ARM macro does not support the pre-processing. 0xFF and (0xFF << 8) are the values of
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; ARM_CORE_MASK and ARM_CLUSTER_MASK
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mov $Tmp, #(0xFF :OR: (0xFF << 8))
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and $MpId, $Tmp
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lsr $Pos, $MpId, #6
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and $Tmp, $MpId, #3
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add $Pos, $Pos, $Tmp
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MEND
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; The reserved place must be 8-bytes aligned for pushing 64-bit variable on the stack
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; Note: Global Size will be modified
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MACRO
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@ -12,12 +12,14 @@
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#
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#include <AsmMacroIoLib.h>
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#include <Library/ArmLib.h>
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.text
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.align 2
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GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
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GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
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GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
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GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
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GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
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@ -46,4 +48,12 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
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movne r0, #0
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bx lr
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//UINTN
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//ArmPlatformGetCorePosition (
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// IN UINTN MpId
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// );
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ASM_PFX(ArmPlatformGetCorePosition):
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and r0, r0, #ARM_CORE_MASK
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bx lr
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ASM_FUNCTION_REMOVE_IF_UNREFERENCED
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@ -12,6 +12,7 @@
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//
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#include <AsmMacroIoLib.h>
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#include <Library/ArmLib.h>
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#include <AutoGen.h>
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@ -19,6 +20,7 @@
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EXPORT ArmPlatformIsPrimaryCore
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EXPORT ArmPlatformGetPrimaryCoreMpId
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EXPORT ArmPlatformGetCorePosition
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IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore
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IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask
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@ -51,4 +53,13 @@ ArmPlatformIsPrimaryCore FUNCTION
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bx lr
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ENDFUNC
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//UINTN
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//ArmPlatformGetCorePosition (
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// IN UINTN MpId
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// );
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ArmPlatformGetCorePosition FUNCTION
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and r0, r0, #ARM_CORE_MASK
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bx lr
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ENDFUNC
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END
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@ -13,6 +13,7 @@
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#include <AsmMacroIoLib.h>
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#include <Base.h>
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#include <Library/ArmLib.h>
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#include <Library/PcdLib.h>
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#include <AutoGen.h>
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@ -24,6 +25,7 @@
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GCC_ASM_EXPORT(ArmGetCpuCountPerCluster)
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GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
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GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
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GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
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GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
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GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
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@ -96,4 +98,14 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
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movne r0, #0
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bx lr
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//UINTN
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//ArmPlatformGetCorePosition (
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// IN UINTN MpId
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// );
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ASM_PFX(ArmPlatformGetCorePosition):
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and r1, r0, #ARM_CORE_MASK
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and r0, r0, #ARM_CLUSTER_MASK
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add r0, r1, r0, LSR #7
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bx lr
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ASM_FUNCTION_REMOVE_IF_UNREFERENCED
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@ -1,5 +1,5 @@
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//
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// Copyright (c) 2011-2012, ARM Limited. All rights reserved.
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// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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@ -13,6 +13,7 @@
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#include <AsmMacroIoLib.h>
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#include <Base.h>
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#include <Library/ArmLib.h>
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#include <Library/PcdLib.h>
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#include <Chipset/ArmCortexA9.h>
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@ -24,9 +25,10 @@
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EXPORT ArmGetCpuCountPerCluster
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EXPORT ArmPlatformIsPrimaryCore
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EXPORT ArmPlatformGetPrimaryCoreMpId
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EXPORT ArmPlatformGetCorePosition
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IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore
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IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask
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IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore
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IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask
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AREA RTSMHelper, CODE, READONLY
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@ -103,4 +105,15 @@ ArmPlatformIsPrimaryCore FUNCTION
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bx lr
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ENDFUNC
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//UINTN
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//ArmPlatformGetCorePosition (
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// IN UINTN MpId
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// );
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ArmPlatformGetCorePosition FUNCTION
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and r1, r0, #ARM_CORE_MASK
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and r0, r0, #ARM_CLUSTER_MASK
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add r0, r1, r0, LSR #7
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bx lr
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ENDFUNC
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END
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@ -20,6 +20,7 @@
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.align 3
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GCC_ASM_IMPORT(CEntryPoint)
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GCC_ASM_IMPORT(ArmPlatformGetCorePosition)
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GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
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GCC_ASM_IMPORT(ArmReadMpidr)
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GCC_ASM_EXPORT(_ModuleEntryPoint)
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@ -47,8 +48,10 @@ ASM_PFX(_ModuleEntryPoint):
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_SetupSecondaryCoreStack:
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// r1 contains the base of the secondary stacks
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// Get the Core Position (ClusterId * 4) + CoreId
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GetCorePositionFromMpId(r0, r5, r2)
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// Get the Core Position
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mov r6, r1 // Save base of the secondary stacks
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mov r0, r5
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bl ASM_PFX(ArmPlatformGetCorePosition)
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// The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
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add r0, r0, #1
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@ -56,7 +59,7 @@ _SetupSecondaryCoreStack:
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r2)
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mul r0, r0, r2
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// SP = StackBase + StackOffset
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add sp, r1, r0
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add sp, r6, r0
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_PrepareArguments:
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// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
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@ -19,6 +19,7 @@
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INCLUDE AsmMacroIoLib.inc
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IMPORT CEntryPoint
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IMPORT ArmPlatformGetCorePosition
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IMPORT ArmPlatformIsPrimaryCore
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IMPORT ArmReadMpidr
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EXPORT _ModuleEntryPoint
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@ -49,8 +50,10 @@ _ModuleEntryPoint
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_SetupSecondaryCoreStack
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// r1 contains the base of the secondary stacks
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// Get the Core Position (ClusterId * 4) + CoreId
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GetCorePositionFromMpId(r0, r5, r2)
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// Get the Core Position
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mov r6, r1 // Save base of the secondary stacks
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mov r0, r5
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bl ArmPlatformGetCorePosition
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// The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
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add r0, r0, #1
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@ -58,7 +61,7 @@ _SetupSecondaryCoreStack
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r2)
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mul r0, r0, r2
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// SP = StackBase + StackOffset
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add sp, r1, r0
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add sp, r6, r0
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_PrepareArguments
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// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
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@ -20,6 +20,7 @@
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GCC_ASM_IMPORT(CEntryPoint)
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GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
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GCC_ASM_IMPORT(ArmPlatformGetCorePosition)
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GCC_ASM_IMPORT(ArmPlatformSecBootAction)
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GCC_ASM_IMPORT(ArmPlatformSecBootMemoryInit)
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GCC_ASM_IMPORT(ArmDisableInterrupts)
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@ -91,10 +92,11 @@ _SetupSecondaryCoreStack:
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// Get the top of the primary stacks (and the base of the secondary stacks)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)
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add r1, r1, r2
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add r6, r1, r2
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// Get the Core Position (ClusterId * 4) + CoreId
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GetCorePositionFromMpId(r0, r9, r2)
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// Get the Core Position
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mov r0, r9
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bl ASM_PFX(ArmPlatformGetCorePosition)
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// The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
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add r0, r0, #1
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@ -102,7 +104,7 @@ _SetupSecondaryCoreStack:
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecSecondaryStackSize), r2)
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mul r0, r0, r2
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// SP = StackBase + StackOffset
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add sp, r1, r0
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add sp, r6, r0
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_PrepareArguments:
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// Move sec startup address into a data register
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@ -19,6 +19,7 @@
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IMPORT CEntryPoint
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IMPORT ArmPlatformIsPrimaryCore
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IMPORT ArmPlatformGetCorePosition
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IMPORT ArmPlatformSecBootAction
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IMPORT ArmPlatformSecBootMemoryInit
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IMPORT ArmDisableInterrupts
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@ -93,10 +94,11 @@ _SetupSecondaryCoreStack
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// Get the top of the primary stacks (and the base of the secondary stacks)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)
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add r1, r1, r2
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add r6, r1, r2
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// Get the Core Position (ClusterId * 4) + CoreId
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GetCorePositionFromMpId(r0, r9, r2)
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// Get the Core Position
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mov r0, r9
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bl ArmPlatformGetCorePosition
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// The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
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add r0, r0, #1
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@ -104,7 +106,7 @@ _SetupSecondaryCoreStack
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecSecondaryStackSize), r2)
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mul r0, r0, r2
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// SP = StackBase + StackOffset
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add sp, r1, r0
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add sp, r6, r0
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_PrepareArguments
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// Move sec startup address into a data register
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