MdePkg/Cpuid.h: Change and add some macro definitions.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3105

Change and add some macro definitions about
CPUID_HYBRID_INFORMATION Leaf(1Ah).

Signed-off-by: Jason Lou <yun.lou@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
This commit is contained in:
Lou, Yun 2021-01-25 09:20:48 +08:00 committed by mergify[bot]
parent 1c5c7bcd1d
commit 2d6fc9d36f
2 changed files with 15 additions and 6 deletions

View File

@ -3601,7 +3601,7 @@ typedef union {
CPUID Hybrid Information Enumeration Leaf
@param EAX CPUID_HYBRID_INFORMATION (0x1A)
@param ECX CPUID_HYBRID_INFORMATION_SUB_LEAF (0x00).
@param ECX CPUID_HYBRID_INFORMATION_MAIN_LEAF (0x00).
@retval EAX Enumerates the native model ID and core type described
by the type CPUID_NATIVE_MODEL_ID_AND_CORE_TYPE_EAX
@ -3615,7 +3615,7 @@ typedef union {
AsmCpuidEx (
CPUID_HYBRID_INFORMATION,
CPUID_HYBRID_INFORMATION_SUB_LEAF,
CPUID_HYBRID_INFORMATION_MAIN_LEAF,
&Eax, NULL, NULL, NULL
);
@endcode
@ -3624,13 +3624,13 @@ typedef union {
#define CPUID_HYBRID_INFORMATION 0x1A
///
/// CPUID Hybrid Information Enumeration sub-leaf
/// CPUID Hybrid Information Enumeration main leaf
///
#define CPUID_HYBRID_INFORMATION_SUB_LEAF 0x00
#define CPUID_HYBRID_INFORMATION_MAIN_LEAF 0x00
/**
CPUID Hybrid Information EAX for CPUID leaf #CPUID_HYBRID_INFORMATION,
sub-leaf #CPUID_HYBRID_INFORMATION_SUB_LEAF.
main leaf #CPUID_HYBRID_INFORMATION_MAIN_LEAF.
**/
typedef union {
///
@ -3657,6 +3657,15 @@ typedef union {
UINT32 Uint32;
} CPUID_NATIVE_MODEL_ID_AND_CORE_TYPE_EAX;
///
/// @{ Define value for CPUID_NATIVE_MODEL_ID_AND_CORE_TYPE_EAX.CoreType
///
#define CPUID_CORE_TYPE_INTEL_ATOM 0x20
#define CPUID_CORE_TYPE_INTEL_CORE 0x40
///
/// @}
///
/**
CPUID V2 Extended Topology Enumeration Leaf

View File

@ -175,7 +175,7 @@ CpuCacheInfoCollectCoreAndCacheData (
//
Context->ProcessorInfo[ProcessorIndex].CoreType = 0;
if (CpuidMaxInput >= CPUID_HYBRID_INFORMATION) {
AsmCpuidEx (CPUID_HYBRID_INFORMATION, CPUID_HYBRID_INFORMATION_SUB_LEAF, &NativeModelIdAndCoreTypeEax.Uint32, NULL, NULL, NULL);
AsmCpuidEx (CPUID_HYBRID_INFORMATION, CPUID_HYBRID_INFORMATION_MAIN_LEAF, &NativeModelIdAndCoreTypeEax.Uint32, NULL, NULL, NULL);
Context->ProcessorInfo[ProcessorIndex].CoreType = (UINT8) NativeModelIdAndCoreTypeEax.Bits.CoreType;
}