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Enhance the SmmBaseHelper driver to support changing SMBASE/IORestart/AutoHALTRestart CPU Save State registers for Framework SMM driver.

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Signed-off-by: rsun3
Reviewed-by: jfan12


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12230 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
rsun3 2011-08-30 09:12:43 +00:00
parent f767f99009
commit 2e7c8ac41d
1 changed files with 21 additions and 14 deletions
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35
EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.c
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@ -4,7 +4,7 @@
This driver is the counterpart of the SMM Base On SMM Base2 Thunk driver. It This driver is the counterpart of the SMM Base On SMM Base2 Thunk driver. It
provides helping services in SMM to the SMM Base On SMM Base2 Thunk driver. provides helping services in SMM to the SMM Base On SMM Base2 Thunk driver.
Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR> Copyright (c) 2009 - 2011, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -144,17 +144,13 @@ ReadCpuSaveState (
SaveState = &mFrameworkSmst->CpuSaveState[CpuIndex].Ia32SaveState; SaveState = &mFrameworkSmst->CpuSaveState[CpuIndex].Ia32SaveState;
} }
if (State->x86.SMMRevId < EFI_SMM_MIN_REV_ID_x64) { //
SaveState->SMBASE = State->x86.SMBASE; // Note that SMBASE/SMMRevId/IORestart/AutoHALTRestart are in same location in IA32 and X64 CPU Save State Map.
SaveState->SMMRevId = State->x86.SMMRevId; //
SaveState->IORestart = State->x86.IORestart; SaveState->SMBASE = State->x86.SMBASE;
SaveState->AutoHALTRestart = State->x86.AutoHALTRestart; SaveState->SMMRevId = State->x86.SMMRevId;
} else { SaveState->IORestart = State->x86.IORestart;
SaveState->SMBASE = State->x64.SMBASE; SaveState->AutoHALTRestart = State->x86.AutoHALTRestart;
SaveState->SMMRevId = State->x64.SMMRevId;
SaveState->IORestart = State->x64.IORestart;
SaveState->AutoHALTRestart = State->x64.AutoHALTRestart;
}
for (Index = 0; Index < sizeof (mCpuSaveStateConvTable) / sizeof (CPU_SAVE_STATE_CONVERSION); Index++) { for (Index = 0; Index < sizeof (mCpuSaveStateConvTable) / sizeof (CPU_SAVE_STATE_CONVERSION); Index++) {
/// ///
@ -188,15 +184,26 @@ WriteCpuSaveState (
IN EFI_SMM_CPU_SAVE_STATE *ToWrite IN EFI_SMM_CPU_SAVE_STATE *ToWrite
) )
{ {
EFI_STATUS Status; EFI_STATUS Status;
UINTN Index; UINTN Index;
EFI_SMM_CPU_STATE *State;
EFI_SMI_CPU_SAVE_STATE *SaveState; EFI_SMI_CPU_SAVE_STATE *SaveState;
State = (EFI_SMM_CPU_STATE *)gSmst->CpuSaveState[CpuIndex];
if (ToWrite != NULL) { if (ToWrite != NULL) {
SaveState = &ToWrite->Ia32SaveState; SaveState = &ToWrite->Ia32SaveState;
} else { } else {
SaveState = &mFrameworkSmst->CpuSaveState[CpuIndex].Ia32SaveState; SaveState = &mFrameworkSmst->CpuSaveState[CpuIndex].Ia32SaveState;
} }
//
// SMMRevId is read-only.
// Note that SMBASE/IORestart/AutoHALTRestart are in same location in IA32 and X64 CPU Save State Map.
//
State->x86.SMBASE = SaveState->SMBASE;
State->x86.IORestart = SaveState->IORestart;
State->x86.AutoHALTRestart = SaveState->AutoHALTRestart;
for (Index = 0; Index < sizeof (mCpuSaveStateConvTable) / sizeof (CPU_SAVE_STATE_CONVERSION); Index++) { for (Index = 0; Index < sizeof (mCpuSaveStateConvTable) / sizeof (CPU_SAVE_STATE_CONVERSION); Index++) {
Status = mSmmCpu->WriteSaveState ( Status = mSmmCpu->WriteSaveState (