mirror of https://github.com/acidanthera/audk.git
ArmPkg/CpuDxe: Added support to not set a memory region with the same attribute
Changing the attribute implies some cache management (clean & invalidate). Preventing the cache management should improve the performance. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14568 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Olivier Martin
oliviermartin
parent
6adbd5b4d2
commit
2e969d2e9e
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@ -194,3 +194,149 @@ SyncCacheConfig (
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return EFI_SUCCESS;
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}
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UINT64
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EfiAttributeToArmAttribute (
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IN UINT64 EfiAttributes
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)
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{
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UINT64 ArmAttributes;
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switch (EfiAttributes & EFI_MEMORY_CACHETYPE_MASK) {
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case EFI_MEMORY_UC:
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ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY;
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break;
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case EFI_MEMORY_WC:
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ArmAttributes = TT_ATTR_INDX_MEMORY_NON_CACHEABLE;
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break;
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case EFI_MEMORY_WT:
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ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_THROUGH;
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break;
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case EFI_MEMORY_WB:
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ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_BACK;
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break;
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default:
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DEBUG ((EFI_D_ERROR, "EfiAttributeToArmAttribute: 0x%lX attributes is not supported.\n", EfiAttributes));
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ASSERT (0);
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ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY;
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}
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// Set the access flag to match the block attributes
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ArmAttributes |= TT_AF;
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// Determine protection attributes
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if (EfiAttributes & EFI_MEMORY_WP) {
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ArmAttributes |= TT_AP_RO_RO;
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}
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// Process eXecute Never attribute
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if (EfiAttributes & EFI_MEMORY_XP) {
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ArmAttributes |= TT_PXN_MASK;
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}
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return ArmAttributes;
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}
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// This function will recursively go down the page table to find the first block address linked to 'BaseAddress'.
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// And then the function will identify the size of the region that has the same page table attribute.
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EFI_STATUS
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GetMemoryRegionRec (
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IN UINT64 *TranslationTable,
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IN UINTN TableLevel,
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IN UINT64 *LastBlockEntry,
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IN OUT UINTN *BaseAddress,
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OUT UINTN *RegionLength,
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OUT UINTN *RegionAttributes
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)
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{
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EFI_STATUS Status;
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UINT64 *NextTranslationTable;
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UINT64 *BlockEntry;
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UINT64 BlockEntryType;
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UINT64 EntryType;
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if (TableLevel != 3) {
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BlockEntryType = TT_TYPE_BLOCK_ENTRY;
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} else {
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BlockEntryType = TT_TYPE_BLOCK_ENTRY_LEVEL3;
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}
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// Find the block entry linked to the Base Address
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BlockEntry = (UINT64*)TT_GET_ENTRY_FOR_ADDRESS (TranslationTable, TableLevel, *BaseAddress);
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EntryType = *BlockEntry & TT_TYPE_MASK;
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if (EntryType == TT_TYPE_TABLE_ENTRY) {
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NextTranslationTable = (UINT64*)(*BlockEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE);
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// The entry is a page table, so we go to the next level
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Status = GetMemoryRegionRec (
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NextTranslationTable, // Address of the next level page table
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TableLevel + 1, // Next Page Table level
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(UINTN*)TT_LAST_BLOCK_ADDRESS(NextTranslationTable, TT_ENTRY_COUNT),
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BaseAddress, RegionLength, RegionAttributes);
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// In case of 'Success', it means the end of the block region has been found into the upper
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// level translation table
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if (!EFI_ERROR(Status)) {
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return EFI_SUCCESS;
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}
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} else if (EntryType == BlockEntryType) {
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// We have found the BlockEntry attached to the address. We save its start address (the start
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// address might be before the 'BaseAdress') and attributes
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*BaseAddress = *BaseAddress & ~(TT_ADDRESS_AT_LEVEL(TableLevel) - 1);
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*RegionLength = 0;
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*RegionAttributes = *BlockEntry & TT_ATTRIBUTES_MASK;
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} else {
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// We have an 'Invalid' entry
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return EFI_UNSUPPORTED;
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}
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while (BlockEntry <= LastBlockEntry) {
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if ((*BlockEntry & TT_ATTRIBUTES_MASK) == *RegionAttributes) {
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*RegionLength = *RegionLength + TT_BLOCK_ENTRY_SIZE_AT_LEVEL(TableLevel);
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} else {
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// In case we have found the end of the region we return success
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return EFI_SUCCESS;
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}
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BlockEntry++;
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}
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// If we have reached the end of the TranslationTable and we have not found the end of the region then
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// we return EFI_NOT_FOUND.
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// The caller will continue to look for the memory region at its level
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return EFI_NOT_FOUND;
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}
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EFI_STATUS
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GetMemoryRegion (
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IN OUT UINTN *BaseAddress,
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OUT UINTN *RegionLength,
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OUT UINTN *RegionAttributes
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)
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{
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EFI_STATUS Status;
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UINT64 *TranslationTable;
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UINTN TableLevel;
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UINTN EntryCount;
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UINTN T0SZ;
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ASSERT ((BaseAddress != NULL) && (RegionLength != NULL) && (RegionAttributes != NULL));
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TranslationTable = ArmGetTTBR0BaseAddress ();
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T0SZ = ArmGetTCR () & TCR_T0SZ_MASK;
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// Get the Table info from T0SZ
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GetRootTranslationTableInfo (T0SZ, &TableLevel, &EntryCount);
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Status = GetMemoryRegionRec (TranslationTable, TableLevel,
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(UINTN*)TT_LAST_BLOCK_ADDRESS(TranslationTable, EntryCount),
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BaseAddress, RegionLength, RegionAttributes);
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// If the region continues up to the end of the root table then GetMemoryRegionRec()
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// will return EFI_NOT_FOUND
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if (Status == EFI_NOT_FOUND) {
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return EFI_SUCCESS;
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} else {
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return Status;
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}
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}
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@ -696,3 +696,185 @@ SetMemoryAttributes (
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return Status;
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}
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UINT64
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EfiAttributeToArmAttribute (
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IN UINT64 EfiAttributes
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)
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{
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UINT64 ArmAttributes;
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switch (EfiAttributes & EFI_MEMORY_CACHETYPE_MASK) {
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case EFI_MEMORY_UC:
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// Map to strongly ordered
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ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED; // TEX[2:0] = 0, C=0, B=0
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break;
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case EFI_MEMORY_WC:
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// Map to normal non-cachable
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ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE; // TEX [2:0]= 001 = 0x2, B=0, C=0
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break;
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case EFI_MEMORY_WT:
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// Write through with no-allocate
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ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC; // TEX [2:0] = 0, C=1, B=0
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break;
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case EFI_MEMORY_WB:
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// Write back (with allocate)
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ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC; // TEX [2:0] = 001, C=1, B=1
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break;
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case EFI_MEMORY_WP:
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case EFI_MEMORY_XP:
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case EFI_MEMORY_RP:
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case EFI_MEMORY_UCE:
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default:
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// Cannot be implemented UEFI definition unclear for ARM
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// Cause a page fault if these ranges are accessed.
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ArmAttributes = TT_DESCRIPTOR_SECTION_TYPE_FAULT;
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DEBUG ((EFI_D_PAGE, "SetMemoryAttributes(): Unsupported attribute %x will page fault on access\n", EfiAttributes));
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break;
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}
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// Determine protection attributes
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if (EfiAttributes & EFI_MEMORY_WP) {
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ArmAttributes |= TT_DESCRIPTOR_SECTION_AP_RO_RO;
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} else {
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ArmAttributes |= TT_DESCRIPTOR_SECTION_AP_RW_RW;
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}
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// Determine eXecute Never attribute
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if (EfiAttributes & EFI_MEMORY_XP) {
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ArmAttributes |= TT_DESCRIPTOR_SECTION_XN_MASK;
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}
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return ArmAttributes;
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}
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EFI_STATUS
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GetMemoryRegionPage (
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IN UINT32 *PageTable,
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IN OUT UINTN *BaseAddress,
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OUT UINTN *RegionLength,
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OUT UINTN *RegionAttributes
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)
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{
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UINT32 PageAttributes;
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UINT32 TableIndex;
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UINT32 PageDescriptor;
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// Convert the section attributes into page attributes
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PageAttributes = ConvertSectionAttributesToPageAttributes (*RegionAttributes, 0);
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// Calculate index into first level translation table for start of modification
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TableIndex = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(*BaseAddress) >> TT_DESCRIPTOR_PAGE_BASE_SHIFT;
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ASSERT (TableIndex < TRANSLATION_TABLE_PAGE_COUNT);
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// Go through the page table to find the end of the section
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for (; TableIndex < TRANSLATION_TABLE_PAGE_COUNT; TableIndex++) {
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// Get the section at the given index
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PageDescriptor = PageTable[TableIndex];
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if ((PageDescriptor & TT_DESCRIPTOR_PAGE_TYPE_MASK) == TT_DESCRIPTOR_PAGE_TYPE_FAULT) {
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// Case: End of the boundary of the region
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return EFI_SUCCESS;
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} else if ((PageDescriptor & TT_DESCRIPTOR_PAGE_TYPE_PAGE) == TT_DESCRIPTOR_PAGE_TYPE_PAGE) {
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if ((PageDescriptor & TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK) == PageAttributes) {
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*RegionLength = *RegionLength + TT_DESCRIPTOR_PAGE_SIZE;
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} else {
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// Case: End of the boundary of the region
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return EFI_SUCCESS;
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}
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} else {
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// We do not support Large Page yet. We return EFI_SUCCESS that means end of the region.
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ASSERT(0);
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return EFI_SUCCESS;
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}
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}
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return EFI_NOT_FOUND;
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}
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EFI_STATUS
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GetMemoryRegion (
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IN OUT UINTN *BaseAddress,
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OUT UINTN *RegionLength,
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OUT UINTN *RegionAttributes
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)
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{
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EFI_STATUS Status;
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UINT32 TableIndex;
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UINT32 PageAttributes;
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UINT32 PageTableIndex;
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UINT32 SectionDescriptor;
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ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;
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UINT32 *PageTable;
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// Initialize the arguments
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*RegionLength = 0;
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// Obtain page table base
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FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)ArmGetTTBR0BaseAddress ();
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// Calculate index into first level translation table for start of modification
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TableIndex = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (*BaseAddress) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;
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ASSERT (TableIndex < TRANSLATION_TABLE_SECTION_COUNT);
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// Get the section at the given index
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SectionDescriptor = FirstLevelTable[TableIndex];
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// If 'BaseAddress' belongs to the section then round it to the section boundary
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if (((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) ||
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((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION))
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{
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*BaseAddress = (*BaseAddress) & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK;
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*RegionAttributes = SectionDescriptor & TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK;
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} else {
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// Otherwise, we round it to the page boundary
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*BaseAddress = (*BaseAddress) & TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK;
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// Get the attribute at the page table level (Level 2)
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PageTable = (UINT32*)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
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// Calculate index into first level translation table for start of modification
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PageTableIndex = TT_DESCRIPTOR_PAGE_BASE_ADDRESS (*BaseAddress) >> TT_DESCRIPTOR_PAGE_BASE_SHIFT;
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ASSERT (PageTableIndex < TRANSLATION_TABLE_PAGE_COUNT);
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PageAttributes = PageTable[PageTableIndex] & TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK;
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*RegionAttributes = TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY (PageAttributes, 0) |
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TT_DESCRIPTOR_CONVERT_TO_SECTION_AP (PageAttributes);
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}
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for (;TableIndex < TRANSLATION_TABLE_SECTION_COUNT; TableIndex++) {
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// Get the section at the given index
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SectionDescriptor = FirstLevelTable[TableIndex];
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// If the entry is a level-2 page table then we scan it to find the end of the region
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if ((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE) {
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// Extract the page table location from the descriptor
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PageTable = (UINT32*)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
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// Scan the page table to find the end of the region.
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Status = GetMemoryRegionPage (PageTable, BaseAddress, RegionLength, RegionAttributes);
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// If we have found the end of the region (Status == EFI_SUCCESS) then we exit the for-loop
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if (Status == EFI_SUCCESS) {
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break;
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}
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} else if (((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) ||
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((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION)) {
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if ((SectionDescriptor & TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK) != *RegionAttributes) {
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// If the attributes of the section differ from the one targeted then we exit the loop
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break;
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} else {
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*RegionLength = *RegionLength + TT_DESCRIPTOR_SECTION_SIZE;
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}
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} else {
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// If we are on an invalid section then it means it is the end of our section.
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break;
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}
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}
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return EFI_SUCCESS;
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}
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@ -148,6 +148,19 @@ SetMemoryAttributes (
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IN EFI_PHYSICAL_ADDRESS VirtualMask
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);
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// The ARM Attributes might be defined on 64-bit (case of the long format description table)
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UINT64
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EfiAttributeToArmAttribute (
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IN UINT64 EfiAttributes
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);
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EFI_STATUS
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GetMemoryRegion (
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IN OUT UINTN *BaseAddress,
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OUT UINTN *RegionLength,
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OUT UINTN *RegionAttributes
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);
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VOID
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GetRootTranslationTableInfo (
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IN UINTN T0SZ,
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@ -178,18 +178,37 @@ CpuSetMemoryAttributes (
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IN EFI_CPU_ARCH_PROTOCOL *This,
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IN EFI_PHYSICAL_ADDRESS BaseAddress,
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IN UINT64 Length,
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IN UINT64 Attributes
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IN UINT64 EfiAttributes
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)
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{
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DEBUG ((EFI_D_PAGE, "CpuSetMemoryAttributes(%lx, %lx, %lx)\n", BaseAddress, Length, Attributes));
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EFI_STATUS Status;
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UINTN ArmAttributes;
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UINTN RegionBaseAddress;
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UINTN RegionLength;
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UINTN RegionArmAttributes;
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if ((BaseAddress & (SIZE_4KB - 1)) != 0) {
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// Minimum granularity is SIZE_4KB (4KB on ARM)
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DEBUG ((EFI_D_PAGE, "CpuSetMemoryAttributes(%lx, %lx, %lx): Minimum ganularity is SIZE_4KB\n", BaseAddress, Length, Attributes));
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DEBUG ((EFI_D_PAGE, "CpuSetMemoryAttributes(%lx, %lx, %lx): Minimum ganularity is SIZE_4KB\n", BaseAddress, Length, EfiAttributes));
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return EFI_UNSUPPORTED;
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}
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return SetMemoryAttributes (BaseAddress, Length, Attributes, 0);
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// Convert the 'Attribute' into ARM Attribute
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ArmAttributes = EfiAttributeToArmAttribute (EfiAttributes);
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// Get the region starting from 'BaseAddress' and its 'Attribute'
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RegionBaseAddress = BaseAddress;
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Status = GetMemoryRegion (&RegionBaseAddress, &RegionLength, &RegionArmAttributes);
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// Data & Instruction Caches are flushed when we set new memory attributes.
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// So, we only set the attributes if the new region is different.
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if (EFI_ERROR (Status) || (RegionArmAttributes != ArmAttributes) ||
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((BaseAddress + Length) > (RegionBaseAddress + RegionLength)))
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{
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return SetMemoryAttributes (BaseAddress, Length, EfiAttributes, 0);
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} else {
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return EFI_SUCCESS;
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}
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}
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EFI_STATUS
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