mirror of https://github.com/acidanthera/audk.git
OvmfPkg/ResetVector: move clearing GHCB in SecMain
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275 In preparation for SEV-SNP support move clearing of the GHCB memory from the ResetVector/AmdSev.asm to SecMain/AmdSev.c. The GHCB page is not accessed until SevEsProtocolCheck() switch to full GHCB. So, the move does not make any changes in the code flow or logic. The move will simplify the SEV-SNP support. Cc: Michael Roth <michael.roth@amd.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Min Xu <min.m.xu@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Erdem Aktas <erdemaktas@google.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
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@ -177,12 +177,6 @@ pageTableEntries4kLoop:
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mov ecx, (GHCB_BASE & 0x1F_FFFF) >> 12
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mov [ecx * 8 + GHCB_PT_ADDR + 4], strict dword 0
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mov ecx, GHCB_SIZE / 4
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xor eax, eax
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clearGhcbMemoryLoop:
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mov dword[ecx * 4 + GHCB_BASE - 4], eax
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loop clearGhcbMemoryLoop
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SevClearPageEncMaskForGhcbPageExit:
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OneTimeCallRet SevClearPageEncMaskForGhcbPage
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@ -96,7 +96,7 @@ SevEsProtocolCheck (
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AsmWriteMsr64 (MSR_SEV_ES_GHCB, Msr.GhcbPhysicalAddress);
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Ghcb = Msr.Ghcb;
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SetMem (Ghcb, sizeof (*Ghcb), 0);
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SetMem (Ghcb, FixedPcdGet32 (PcdOvmfSecGhcbSize), 0);
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//
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// Set the version to the maximum that can be supported
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