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ArmPlatformPkg/PL180MciDxe: check PrimeCell ID before initializing 

To deal gracefully with the absence of the PL180 hardware on
the Foundation model, check the PrimeCell ID before proceeding
with the installation.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18307 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Ard Biesheuvel 2015-08-25 13:11:02 +00:00 committed by abiesheuvel
parent 703da8b4ec
commit 300fc77a8a
2 changed files with 33 additions and 0 deletions
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16
ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c
View File

@ -521,6 +521,22 @@ PL180MciDxeInitialize (
EFI_STATUS Status; EFI_STATUS Status;
EFI_HANDLE Handle; EFI_HANDLE Handle;
DEBUG ((EFI_D_WARN, "Probing ID registers at 0x%lx for a PL180\n",
MCI_PERIPH_ID_REG0));
// Check if this is a PL180
if (MmioRead8 (MCI_PERIPH_ID_REG0) != MCI_PERIPH_ID0 ||
MmioRead8 (MCI_PERIPH_ID_REG1) != MCI_PERIPH_ID1 ||
MmioRead8 (MCI_PERIPH_ID_REG2) != MCI_PERIPH_ID2 ||
MmioRead8 (MCI_PERIPH_ID_REG3) != MCI_PERIPH_ID3 ||
MmioRead8 (MCI_PCELL_ID_REG0) != MCI_PCELL_ID0 ||
MmioRead8 (MCI_PCELL_ID_REG1) != MCI_PCELL_ID1 ||
MmioRead8 (MCI_PCELL_ID_REG2) != MCI_PCELL_ID2 ||
MmioRead8 (MCI_PCELL_ID_REG3) != MCI_PCELL_ID3) {
return EFI_NOT_FOUND;
}
Handle = NULL; Handle = NULL;
MCI_TRACE ("PL180MciDxeInitialize()"); MCI_TRACE ("PL180MciDxeInitialize()");

17
ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.h
View File

@ -51,6 +51,23 @@
#define MCI_SELECT_REG (MCI_SYSCTL + 0x044) #define MCI_SELECT_REG (MCI_SYSCTL + 0x044)
#define MCI_FIFOCOUNT_REG (MCI_SYSCTL + 0x048) #define MCI_FIFOCOUNT_REG (MCI_SYSCTL + 0x048)
#define MCI_FIFO_REG (MCI_SYSCTL + 0x080) #define MCI_FIFO_REG (MCI_SYSCTL + 0x080)
#define MCI_PERIPH_ID_REG0 (MCI_SYSCTL + 0xFE0)
#define MCI_PERIPH_ID_REG1 (MCI_SYSCTL + 0xFE4)
#define MCI_PERIPH_ID_REG2 (MCI_SYSCTL + 0xFE8)
#define MCI_PERIPH_ID_REG3 (MCI_SYSCTL + 0xFEC)
#define MCI_PCELL_ID_REG0 (MCI_SYSCTL + 0xFF0)
#define MCI_PCELL_ID_REG1 (MCI_SYSCTL + 0xFF4)
#define MCI_PCELL_ID_REG2 (MCI_SYSCTL + 0xFF8)
#define MCI_PCELL_ID_REG3 (MCI_SYSCTL + 0xFFC)
#define MCI_PERIPH_ID0 0x80
#define MCI_PERIPH_ID1 0x11
#define MCI_PERIPH_ID2 0x04
#define MCI_PERIPH_ID3 0x00
#define MCI_PCELL_ID0 0x0D
#define MCI_PCELL_ID1 0xF0
#define MCI_PCELL_ID2 0x05
#define MCI_PCELL_ID3 0xB1
#define MCI_POWER_OFF 0 #define MCI_POWER_OFF 0
#define MCI_POWER_UP BIT1 #define MCI_POWER_UP BIT1