MdePkg/Library/BaseLib: Enable VS2017/ARM builds

Most of the RVCT assembly can be reused as is for MSFT except
for CpuBreakpoint.asm, which we need to force to Arm mode.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Liming Gao <liming.gao@intel.com>
This commit is contained in:
Pete Batard 2018-01-12 21:33:28 +08:00 committed by Liming Gao
parent 751053d6f1
commit 30939ff2bc
2 changed files with 17 additions and 4 deletions

View File

@ -16,7 +16,10 @@
EXPORT CpuBreakpoint
AREA Cpu_Breakpoint, CODE, READONLY
; Force ARM mode for this section, as MSFT assembler defaults to THUMB
AREA Cpu_Breakpoint, CODE, READONLY, ARM
ARM
;/**
; Generates a breakpoint on the CPU.

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@ -824,8 +824,9 @@
[Sources.ARM]
Arm/InternalSwitchStack.c
Arm/Unaligned.c
Math64.c | RVCT
Math64.c | RVCT
Math64.c | MSFT
Arm/SwitchStack.asm | RVCT
Arm/SetJumpLongJump.asm | RVCT
Arm/DisableInterrupts.asm | RVCT
@ -834,7 +835,16 @@
Arm/CpuPause.asm | RVCT
Arm/CpuBreakpoint.asm | RVCT
Arm/MemoryFence.asm | RVCT
Arm/SwitchStack.asm | MSFT
Arm/SetJumpLongJump.asm | MSFT
Arm/DisableInterrupts.asm | MSFT
Arm/EnableInterrupts.asm | MSFT
Arm/GetInterruptsState.asm | MSFT
Arm/CpuPause.asm | MSFT
Arm/CpuBreakpoint.asm | MSFT
Arm/MemoryFence.asm | MSFT
Arm/Math64.S | GCC
Arm/SwitchStack.S | GCC
Arm/EnableInterrupts.S | GCC