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DynamicTablesPkg/AmlLib: Enumerate memory attributes 

AmlCodeGenRdQWordMemory's and AmlCodeGenRdDWordMemory's Cacheable
and MemoryRangeType parameters treat specific values as having
specific meanings as defined by the spec. This change adds enums to map
those meanings to their corresponding values.

Signed-off-by: Jeshua Smith <jeshuas@nvidia.com>
Acked-by: Leif Lindholm <quic_llindhol@quicinc.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
This commit is contained in:
Jeshua Smith 2023-10-05 16:38:49 +00:00 committed by mergify[bot]
parent ec7f734366
commit 309450db26
4 changed files with 56 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
DynamicTablesPkg/DynamicTablesPkg.ci.yaml
View File

@ -97,6 +97,7 @@
"ARMLTD",
"AMLDBG",
"EISAID",
"cacheablity",
"CCIDX",
"CCSIDR",
"countof",

49
DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h
View File

@ -59,6 +59,47 @@ typedef void *AML_DATA_NODE_HANDLE;
#endif // AML_HANDLE
/** Memory attributes, _MEM (2 bits)
Possible values are:
0-The memory is non-cacheable
1-The memory is cacheable (DEPRECATED)
2-The memory is cacheable and supports
write combining (DEPRECATED)
3-The memory is cacheable and prefetchable
@par Reference(s):
- ACPI 6.5, s6.4.3.5.5 "Resource Type Specific Flags"
**/
typedef enum {
AmlMemoryNonCacheable = 0,
AmlMemoryCacheable = 1,
AmlMemoryCacheableWriteCombine = 2,
AmlMemoryCacheablePrefetch = 3,
AmlMemoryCacheablityMax = 4
} AML_MEMORY_ATTRIBUTES_MEM;
/** Memory attributes, _MTP (2 bits)
Possible values are:
0-AddressRangeMemory
1-AddressRangeReserved
2-AddressRangeACPI
3-AddressRangeNVS
@par Reference(s):
- ACPI 6.5, s6.4.3.5.5 "Resource Type Specific Flags"
**/
typedef enum {
AmlAddressRangeMemory = 0,
AmlAddressRangeReserved = 1,
AmlAddressRangeACPI = 2,
AmlAddressRangeNVS = 3,
AmlAddressRangeMax = 4
} AML_MEMORY_ATTRIBUTES_MTP;
/** Parse the definition block.
The function parses the whole AML blob. It starts with the ACPI DSDT/SSDT
@ -578,7 +619,7 @@ AmlCodeGenRdDWordMemory (
IN BOOLEAN IsPosDecode,
IN BOOLEAN IsMinFixed,
IN BOOLEAN IsMaxFixed,
IN UINT8 Cacheable,
IN AML_MEMORY_ATTRIBUTES_MEM Cacheable,
IN BOOLEAN IsReadWrite,
IN UINT32 AddressGranularity,
IN UINT32 AddressMinimum,
@ -587,7 +628,7 @@ AmlCodeGenRdDWordMemory (
IN UINT32 RangeLength,
IN UINT8 ResourceSourceIndex,
IN CONST CHAR8 *ResourceSource,
IN UINT8 MemoryRangeType,
IN AML_MEMORY_ATTRIBUTES_MTP MemoryRangeType,
IN BOOLEAN IsTypeStatic,
IN AML_OBJECT_NODE_HANDLE NameOpNode, OPTIONAL
OUT AML_DATA_NODE_HANDLE *NewRdNode OPTIONAL
@ -809,7 +850,7 @@ AmlCodeGenRdQWordMemory (
IN BOOLEAN IsPosDecode,
IN BOOLEAN IsMinFixed,
IN BOOLEAN IsMaxFixed,
IN UINT8 Cacheable,
IN AML_MEMORY_ATTRIBUTES_MEM Cacheable,
IN BOOLEAN IsReadWrite,
IN UINT64 AddressGranularity,
IN UINT64 AddressMinimum,
@ -818,7 +859,7 @@ AmlCodeGenRdQWordMemory (
IN UINT64 RangeLength,
IN UINT8 ResourceSourceIndex,
IN CONST CHAR8 *ResourceSource,
IN UINT8 MemoryRangeType,
IN AML_MEMORY_ATTRIBUTES_MTP MemoryRangeType,
IN BOOLEAN IsTypeStatic,
IN AML_OBJECT_NODE_HANDLE NameOpNode, OPTIONAL
OUT AML_DATA_NODE_HANDLE *NewRdNode OPTIONAL

12
DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieGenerator.c
View File

@ -566,7 +566,7 @@ GeneratePciCrs (
IsPosDecode,
TRUE,
TRUE,
TRUE,
AmlMemoryCacheable,
TRUE,
0,
AddrMapInfo->PciAddress,
@ -575,7 +575,7 @@ GeneratePciCrs (
AddrMapInfo->AddressSize,
0,
NULL,
0,
AmlAddressRangeMemory,
TRUE,
CrsNode,
NULL
@ -588,7 +588,7 @@ GeneratePciCrs (
IsPosDecode,
TRUE,
TRUE,
TRUE,
AmlMemoryCacheable,
TRUE,
0,
AddrMapInfo->PciAddress,
@ -597,7 +597,7 @@ GeneratePciCrs (
AddrMapInfo->AddressSize,
0,
NULL,
0,
AmlAddressRangeMemory,
TRUE,
CrsNode,
NULL
@ -718,7 +718,7 @@ ReserveEcamSpace (
TRUE,
TRUE,
TRUE,
FALSE, // non-cacheable
AmlMemoryNonCacheable,
TRUE,
0,
AddressMinimum,
@ -727,7 +727,7 @@ ReserveEcamSpace (
AddressMaximum - AddressMinimum + 1,
0,
NULL,
0,
AmlAddressRangeMemory,
TRUE,
CrsNode,
NULL

8
DynamicTablesPkg/Library/Common/AmlLib/CodeGen/AmlResourceDataCodeGen.c
View File

@ -570,7 +570,7 @@ AmlCodeGenRdDWordMemory (
IN BOOLEAN IsPosDecode,
IN BOOLEAN IsMinFixed,
IN BOOLEAN IsMaxFixed,
IN UINT8 Cacheable,
IN AML_MEMORY_ATTRIBUTES_MEM Cacheable,
IN BOOLEAN IsReadWrite,
IN UINT32 AddressGranularity,
IN UINT32 AddressMinimum,
@ -579,7 +579,7 @@ AmlCodeGenRdDWordMemory (
IN UINT32 RangeLength,
IN UINT8 ResourceSourceIndex,
IN CONST CHAR8 *ResourceSource,
IN UINT8 MemoryRangeType,
IN AML_MEMORY_ATTRIBUTES_MTP MemoryRangeType,
IN BOOLEAN IsTypeStatic,
IN AML_OBJECT_NODE_HANDLE NameOpNode, OPTIONAL
OUT AML_DATA_NODE_HANDLE *NewRdNode OPTIONAL
@ -1161,7 +1161,7 @@ AmlCodeGenRdQWordMemory (
IN BOOLEAN IsPosDecode,
IN BOOLEAN IsMinFixed,
IN BOOLEAN IsMaxFixed,
IN UINT8 Cacheable,
IN AML_MEMORY_ATTRIBUTES_MEM Cacheable,
IN BOOLEAN IsReadWrite,
IN UINT64 AddressGranularity,
IN UINT64 AddressMinimum,
@ -1170,7 +1170,7 @@ AmlCodeGenRdQWordMemory (
IN UINT64 RangeLength,
IN UINT8 ResourceSourceIndex,
IN CONST CHAR8 *ResourceSource,
IN UINT8 MemoryRangeType,
IN AML_MEMORY_ATTRIBUTES_MTP MemoryRangeType,
IN BOOLEAN IsTypeStatic,
IN AML_OBJECT_NODE_HANDLE NameOpNode, OPTIONAL
OUT AML_DATA_NODE_HANDLE *NewRdNode OPTIONAL