mirror of https://github.com/acidanthera/audk.git
OvmfPkg: remove PcdCsmEnable
PcdCsmEnable was introduced in commits50f911d25d
("OvmfPkg: introduce PcdCsmEnable feature flag", 2020-02-05) and75839f977d
("OvmfPkg/PlatformPei: detect SMRAM at default SMBASE (for real)", 2020-02-05). Remove it, and substitute constant FALSE wherever it has been evaluated thus far. Regression test: after building OVMF IA32X64 with -D SMM_REQUIRE, and booting it on Q35, the log still contains > Q35SmramAtDefaultSmbaseInitialization: SMRAM at default SMBASE found Cc: Anthony Perard <anthony.perard@citrix.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jiewen Yao <jiewen.yao@intel.com> https://bugzilla.tianocore.org/show_bug.cgi?id=4588 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20231110235820.644381-3-lersek@redhat.com> Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Corvin Köhne <corvink@FreeBSD.org> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
This commit is contained in:
parent
506cc670c0
commit
3099db510e
|
@ -378,7 +378,6 @@
|
|||
gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
|
||||
!ifdef $(CSM_ENABLE)
|
||||
!error "CSM is being torn down"
|
||||
gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable|TRUE
|
||||
!endif
|
||||
!if $(SECURE_BOOT_ENABLE) == TRUE
|
||||
gUefiOvmfPkgTokenSpaceGuid.PcdSecureBootSupported|TRUE
|
||||
|
|
|
@ -497,8 +497,3 @@
|
|||
|
||||
## This feature flag indicates the firmware build supports secure boot.
|
||||
gUefiOvmfPkgTokenSpaceGuid.PcdSecureBootSupported|FALSE|BOOLEAN|0x6d
|
||||
|
||||
## Informs modules (including pre-DXE-phase modules) whether the platform
|
||||
# firmware contains a CSM (Compatibility Support Module).
|
||||
#
|
||||
gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable|FALSE|BOOLEAN|0x35
|
||||
|
|
|
@ -473,7 +473,6 @@
|
|||
gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
|
||||
!ifdef $(CSM_ENABLE)
|
||||
!error "CSM is being torn down"
|
||||
gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable|TRUE
|
||||
!endif
|
||||
!if $(SMM_REQUIRE) == TRUE
|
||||
gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|TRUE
|
||||
|
|
|
@ -480,7 +480,6 @@
|
|||
gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
|
||||
!ifdef $(CSM_ENABLE)
|
||||
!error "CSM is being torn down"
|
||||
gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable|TRUE
|
||||
!endif
|
||||
!if $(SMM_REQUIRE) == TRUE
|
||||
gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|TRUE
|
||||
|
|
|
@ -499,7 +499,6 @@
|
|||
gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
|
||||
!ifdef $(CSM_ENABLE)
|
||||
!error "CSM is being torn down"
|
||||
gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable|TRUE
|
||||
!endif
|
||||
!if $(SMM_REQUIRE) == TRUE
|
||||
gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|TRUE
|
||||
|
|
|
@ -365,7 +365,6 @@
|
|||
gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
|
||||
!ifdef $(CSM_ENABLE)
|
||||
!error "CSM is being torn down"
|
||||
gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable|TRUE
|
||||
!endif
|
||||
|
||||
[PcdsFixedAtBuild]
|
||||
|
|
|
@ -89,32 +89,22 @@ Q35SmramAtDefaultSmbaseInitialization (
|
|||
)
|
||||
{
|
||||
RETURN_STATUS PcdStatus;
|
||||
UINTN CtlReg;
|
||||
UINT8 CtlRegVal;
|
||||
|
||||
ASSERT (PlatformInfoHob->HostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID);
|
||||
|
||||
PlatformInfoHob->Q35SmramAtDefaultSmbase = FALSE;
|
||||
if (FeaturePcdGet (PcdCsmEnable)) {
|
||||
DEBUG ((
|
||||
DEBUG_INFO,
|
||||
"%a: SMRAM at default SMBASE not checked due to CSM\n",
|
||||
__func__
|
||||
));
|
||||
} else {
|
||||
UINTN CtlReg;
|
||||
UINT8 CtlRegVal;
|
||||
|
||||
CtlReg = DRAMC_REGISTER_Q35 (MCH_DEFAULT_SMBASE_CTL);
|
||||
PciWrite8 (CtlReg, MCH_DEFAULT_SMBASE_QUERY);
|
||||
CtlRegVal = PciRead8 (CtlReg);
|
||||
PlatformInfoHob->Q35SmramAtDefaultSmbase = (BOOLEAN)(CtlRegVal ==
|
||||
MCH_DEFAULT_SMBASE_IN_RAM);
|
||||
DEBUG ((
|
||||
DEBUG_INFO,
|
||||
"%a: SMRAM at default SMBASE %a\n",
|
||||
__func__,
|
||||
PlatformInfoHob->Q35SmramAtDefaultSmbase ? "found" : "not found"
|
||||
));
|
||||
}
|
||||
CtlReg = DRAMC_REGISTER_Q35 (MCH_DEFAULT_SMBASE_CTL);
|
||||
PciWrite8 (CtlReg, MCH_DEFAULT_SMBASE_QUERY);
|
||||
CtlRegVal = PciRead8 (CtlReg);
|
||||
PlatformInfoHob->Q35SmramAtDefaultSmbase = (BOOLEAN)(CtlRegVal ==
|
||||
MCH_DEFAULT_SMBASE_IN_RAM);
|
||||
DEBUG ((
|
||||
DEBUG_INFO,
|
||||
"%a: SMRAM at default SMBASE %a\n",
|
||||
__func__,
|
||||
PlatformInfoHob->Q35SmramAtDefaultSmbase ? "found" : "not found"
|
||||
));
|
||||
|
||||
PcdStatus = PcdSetBoolS (
|
||||
PcdQ35SmramAtDefaultSmbase,
|
||||
|
|
|
@ -133,7 +133,6 @@
|
|||
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSnpSecretsSize
|
||||
|
||||
[FeaturePcd]
|
||||
gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable
|
||||
gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
|
||||
|
||||
[Ppis]
|
||||
|
|
Loading…
Reference in New Issue