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UefiCpuPkg/AcpiCpuData.h: Support >4GB MMIO address 

The current CPU_REGISTER_TABLE_ENTRY structure only defined UINT32 Index to
indicate MSR/MMIO address. It's ok for MSR because MSR address is UINT32 type
actually. But for MMIO address, UINT32 limits MMIO address exceeds 4GB.

This update on CPU_REGISTER_TABLE_ENTRY is to add additional UINT32 field
HighIndex to indicate the high 32bit MMIO address and original Index still
indicate the low 32bit MMIO address.

This update makes use of original padding space between ValidBitLength and
Value to add HighIndex.

Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
This commit is contained in:
Jeff Fan 2017-03-23 13:19:49 +08:00
parent 98387f54ae
commit 30b7a50bac
4 changed files with 12 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
UefiCpuPkg/Include/AcpiCpuData.h
View File

@ -29,11 +29,13 @@ typedef enum {
// Element of register table entry
//
typedef struct {
REGISTER_TYPE RegisterType;
UINT32 Index;
UINT8 ValidBitStart;
UINT8 ValidBitLength;
UINT64 Value;
REGISTER_TYPE RegisterType; // offset 0 - 3
UINT32 Index; // offset 4 - 7
UINT8 ValidBitStart; // offset 8
UINT8 ValidBitLength; // offset 9
UINT16 Reserved; // offset 10 - 11
UINT32 HighIndex; // offset 12-15, only valid for MemoryMapped
UINT64 Value; // offset 16-23
} CPU_REGISTER_TABLE_ENTRY;
//

6
UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
View File

@ -370,9 +370,9 @@ DumpRegisterTableOnProcessor (
case MemoryMapped:
DEBUG ((
DebugPrintErrorLevel,
"Processor: %d: MMIO: %x, Bit Start: %d, Bit Length: %d, Value: %lx\r\n",
"Processor: %d: MMIO: %lx, Bit Start: %d, Bit Length: %d, Value: %lx\r\n",
ProcessorNumber,
RegisterTableEntry->Index,
RegisterTableEntry->Index | LShiftU64 (RegisterTableEntry->HighIndex, 32),
RegisterTableEntry->ValidBitStart,
RegisterTableEntry->ValidBitLength,
RegisterTableEntry->Value
@ -628,7 +628,7 @@ ProgramProcessorRegister (
case MemoryMapped:
AcquireSpinLock (&CpuFeaturesData->MemoryMappedLock);
MmioBitFieldWrite32 (
RegisterTableEntry->Index,
(UINTN)(RegisterTableEntry->Index | LShiftU64 (RegisterTableEntry->HighIndex, 32)),
RegisterTableEntry->ValidBitStart,
RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
(UINT32)RegisterTableEntry->Value

1
UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c
View File

@ -551,6 +551,7 @@ CpuRegisterTableWriteWorker (
RegisterTableEntry = (CPU_REGISTER_TABLE_ENTRY *) (UINTN) RegisterTable->RegisterTableEntry;
RegisterTableEntry[RegisterTable->TableLength].RegisterType = RegisterType;
RegisterTableEntry[RegisterTable->TableLength].Index = (UINT32) Index;
RegisterTableEntry[RegisterTable->TableLength].HighIndex = (UINT32) RShiftU64 (Index, 32);
RegisterTableEntry[RegisterTable->TableLength].ValidBitStart = ValidBitStart;
RegisterTableEntry[RegisterTable->TableLength].ValidBitLength = ValidBitLength;
RegisterTableEntry[RegisterTable->TableLength].Value = Value;

2
UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
View File

@ -315,7 +315,7 @@ SetProcessorRegister (
case MemoryMapped:
AcquireSpinLock (mMemoryMappedLock);
MmioBitFieldWrite32 (
RegisterTableEntry->Index,
(UINTN)(RegisterTableEntry->Index | LShiftU64 (RegisterTableEntry->HighIndex, 32)),
RegisterTableEntry->ValidBitStart,
RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
(UINT32)RegisterTableEntry->Value