mirror of https://github.com/acidanthera/audk.git
Enhanced the PCI Bus DXE module
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@4844 6f19259b-4bc3-4df7-8a09-765794883524
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@ -490,6 +490,12 @@ Returns:
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} else {
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} else {
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PciIoDevice->Decodes |= EFI_BRIDGE_IO16_DECODE_SUPPORTED;
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PciIoDevice->Decodes |= EFI_BRIDGE_IO16_DECODE_SUPPORTED;
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}
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}
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//
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// changed to support En1K for IO Bridge Device
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//
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if( (Value & 0x0c) == 0x0c ){
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PciIoDevice->Decodes |= EFI_BRIDGE_IOEN1K_DECODE_SUPPORTED;
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}
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}
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}
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Status = BarExisted (
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Status = BarExisted (
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@ -653,6 +653,13 @@ Returns:
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Node->PciDev = PciDev;
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Node->PciDev = PciDev;
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Node->Length = Length;
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Node->Length = Length;
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Node->Alignment = Alignment;
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Node->Alignment = Alignment;
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if(((ResType == PciBarTypeIo16) || (ResType == PciBarTypeIo32)) && ( Alignment == 0x0FFF))
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{
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if((PciDev->Decodes & EFI_BRIDGE_IOEN1K_DECODE_SUPPORTED) == EFI_BRIDGE_IOEN1K_DECODE_SUPPORTED)
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Node->Alignment = 0x3FF;
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else
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Node->Alignment = 0xFFF;
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}
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Node->Bar = Bar;
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Node->Bar = Bar;
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Node->ResType = ResType;
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Node->ResType = ResType;
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Node->Reserved = FALSE;
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Node->Reserved = FALSE;
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@ -1013,7 +1020,10 @@ Returns:
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//
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//
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// if no PMem32 request, still keep PMem64. Otherwise degrade to PMem32
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// if no PMem32 request, still keep PMem64. Otherwise degrade to PMem32
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//
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//
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if (PMem32Node != NULL) {
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if (PMem32Node != NULL && PMem32Node->Length != 0 && Bridge->Parent != NULL ) {
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//
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// Fixed the issue that there is no resource for 64-bit (above 4G)
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//
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MergeResourceTree (
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MergeResourceTree (
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PMem32Node,
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PMem32Node,
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PMem64Node,
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PMem64Node,
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@ -110,6 +110,7 @@ typedef struct {
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#define EFI_BRIDGE_PMEM_MEM_COMBINE_SUPPORTED 0x0010
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#define EFI_BRIDGE_PMEM_MEM_COMBINE_SUPPORTED 0x0010
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#define EFI_BRIDGE_MEM64_DECODE_SUPPORTED 0x0020
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#define EFI_BRIDGE_MEM64_DECODE_SUPPORTED 0x0020
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#define EFI_BRIDGE_MEM32_DECODE_SUPPORTED 0x0040
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#define EFI_BRIDGE_MEM32_DECODE_SUPPORTED 0x0040
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#define EFI_BRIDGE_IOEN1K_DECODE_SUPPORTED 0x0080
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#define PCI_MAX_HOST_BRIDGE_NUM 0x0010
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#define PCI_MAX_HOST_BRIDGE_NUM 0x0010
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//
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//
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