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Add type cast on variable before operation. 

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Eric Dong <Eric.Dong@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15777 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Jeff Fan 2014-08-08 05:51:21 +00:00 committed by vanjeff
parent 2ca7b36631
commit 31fc7b4d6a
1 changed files with 7 additions and 7 deletions
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14
SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/DebugAgent.c
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@ -153,7 +153,7 @@ CalculateCrc16 (
UINTN BitIndex; UINTN BitIndex;
for (Index = 0; Index < DataSize; Index++) { for (Index = 0; Index < DataSize; Index++) {
Crc ^= Data[Index]; Crc ^= (UINT16)Data[Index];
for (BitIndex = 0; BitIndex < 8; BitIndex++) { for (BitIndex = 0; BitIndex < 8; BitIndex++) {
if ((Crc & 0x8000) != 0) { if ((Crc & 0x8000) != 0) {
Crc <<= 1; Crc <<= 1;
@ -747,11 +747,11 @@ SetDebugRegister (
// //
// Enable Gx, Lx // Enable Gx, Lx
// //
Dr7Value |= 0x3 << (RegisterIndex * 2); Dr7Value |= (UINTN) (0x3 << (RegisterIndex * 2));
// //
// Set RWx and Lenx // Set RWx and Lenx
// //
Dr7Value &= ~(0xf << (16 + RegisterIndex * 4)); Dr7Value &= (UINTN) (~(0xf << (16 + RegisterIndex * 4)));
Dr7Value |= (UINTN) ((SetHwBreakpoint->Type.Length << 2) | SetHwBreakpoint->Type.Access) << (16 + RegisterIndex * 4); Dr7Value |= (UINTN) ((SetHwBreakpoint->Type.Length << 2) | SetHwBreakpoint->Type.Access) << (16 + RegisterIndex * 4);
// //
// Enable GE, LE // Enable GE, LE
@ -776,19 +776,19 @@ ClearDebugRegister (
{ {
if ((ClearHwBreakpoint->IndexMask & BIT0) != 0) { if ((ClearHwBreakpoint->IndexMask & BIT0) != 0) {
CpuContext->Dr0 = 0; CpuContext->Dr0 = 0;
CpuContext->Dr7 &= ~(0x3 << 0); CpuContext->Dr7 &= (UINTN)(~(0x3 << 0));
} }
if ((ClearHwBreakpoint->IndexMask & BIT1) != 0) { if ((ClearHwBreakpoint->IndexMask & BIT1) != 0) {
CpuContext->Dr1 = 0; CpuContext->Dr1 = 0;
CpuContext->Dr7 &= ~(0x3 << 2); CpuContext->Dr7 &= (UINTN)(~(0x3 << 2));
} }
if ((ClearHwBreakpoint->IndexMask & BIT2) != 0) { if ((ClearHwBreakpoint->IndexMask & BIT2) != 0) {
CpuContext->Dr2 = 0; CpuContext->Dr2 = 0;
CpuContext->Dr7 &= ~(0x3 << 4); CpuContext->Dr7 &= (UINTN)(~(0x3 << 4));
} }
if ((ClearHwBreakpoint->IndexMask & BIT3) != 0) { if ((ClearHwBreakpoint->IndexMask & BIT3) != 0) {
CpuContext->Dr3 = 0; CpuContext->Dr3 = 0;
CpuContext->Dr7 &= ~(0x3 << 6); CpuContext->Dr7 &= (UINTN)(~(0x3 << 6));
} }
} }