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Clean up hard-coded offsets and other utter bogosity in Thunk16.S 

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15028 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
David Woodhouse 2013-12-30 01:12:10 +00:00 committed by lgao4
parent efd6b412c6
commit 321c89c208
1 changed files with 71 additions and 50 deletions
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115
MdePkg/Library/BaseLib/Ia32/Thunk16.S
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@ -24,6 +24,28 @@
ASM_GLOBAL ASM_PFX(m16Start), ASM_PFX(m16Size), ASM_PFX(mThunk16Attr), ASM_PFX(m16Gdt), ASM_PFX(m16GdtrBase), ASM_PFX(mTransition) ASM_GLOBAL ASM_PFX(m16Start), ASM_PFX(m16Size), ASM_PFX(mThunk16Attr), ASM_PFX(m16Gdt), ASM_PFX(m16GdtrBase), ASM_PFX(mTransition)
ASM_GLOBAL ASM_PFX(InternalAsmThunk16) ASM_GLOBAL ASM_PFX(InternalAsmThunk16)
# define the structure of IA32_REGS
.set _EDI, 0 #size 4
.set _ESI, 4 #size 4
.set _EBP, 8 #size 4
.set _ESP, 12 #size 4
.set _EBX, 16 #size 4
.set _EDX, 20 #size 4
.set _ECX, 24 #size 4
.set _EAX, 28 #size 4
.set _DS, 32 #size 2
.set _ES, 34 #size 2
.set _FS, 36 #size 2
.set _GS, 38 #size 2
.set _EFLAGS, 40 #size 4
.set _EIP, 44 #size 4
.set _CS, 48 #size 2
.set _SS, 50 #size 2
.set IA32_REGS_SIZE, 52
.text
.code16
ASM_PFX(m16Start): ASM_PFX(m16Start):
SavedGdt: .space 6 SavedGdt: .space 6
@ -31,21 +53,22 @@ SavedGdt: .space 6
ASM_PFX(BackFromUserCode): ASM_PFX(BackFromUserCode):
push %ss push %ss
push %cs push %cs
.byte 0x66
call L_Base1 # push eip calll L_Base1 # push eip
L_Base1: L_Base1:
pushfw # pushfd actually pushfl
cli # disable interrupts cli # disable interrupts
push %gs push %gs
push %fs push %fs
push %es push %es
push %ds push %ds
pushaw # pushad actually pushal
.byte 0x66, 0xba # mov edx, imm32 .byte 0x66, 0xba # mov edx, imm32
ASM_PFX(ThunkAttr): .space 4 ASM_PFX(ThunkAttr): .space 4
testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl
jz 1f jz 1f
movl $0x15cd2401, %eax # mov ax, 2401h & int 15h movw $0x2401, %ax
int $0x15
cli # disable interrupts cli # disable interrupts
jnc 2f jnc 2f
1: 1:
@ -55,17 +78,17 @@ ASM_PFX(ThunkAttr): .space 4
orb $2, %al orb $2, %al
outb %al, $0x92 # deactivate A20M# outb %al, $0x92 # deactivate A20M#
2: 2:
xorw %ax, %ax # xor eax, eax xorl %eax, %eax
movl %ss, %eax # mov ax, ss movw %ss, %ax
.byte 0x67, 0x66, 0x8d, 0x6c, 0x24, 0x34, 0x66 leal IA32_REGS_SIZE(%esp), %ebp
mov %ebp, 0xffffffd8(%esi) mov %ebp, (_ESP - IA32_REGS_SIZE)(%bp)
mov 0xfffffff8(%esi), %ebx mov (_EIP - IA32_REGS_SIZE)(%bp), %bx
shlw $4, %ax # shl eax, 4 shll $4, %eax
addw %ax, %bp # add ebp, eax addl %eax, %ebp
.byte 0x66, 0xb8 # mov eax, imm32 .byte 0x66, 0xb8 # mov eax, imm32
SavedCr4: .space 4 SavedCr4: .space 4
movl %eax, %cr4 movl %eax, %cr4
lgdtw %cs:0xfffffff2(%edi) lgdtl %cs:(SavedGdt - L_Base1)(%bx)
.byte 0x66, 0xb8 # mov eax, imm32 .byte 0x66, 0xb8 # mov eax, imm32
SavedCr0: .space 4 SavedCr0: .space 4
movl %eax, %cr0 movl %eax, %cr0
@ -74,8 +97,7 @@ SavedSs: .space 2
movl %eax, %ss movl %eax, %ss
.byte 0x66, 0xbc # mov esp, imm32 .byte 0x66, 0xbc # mov esp, imm32
SavedEsp: .space 4 SavedEsp: .space 4
.byte 0x66 lretl # return to protected mode
lret # return to protected mode
_EntryPoint: .long ASM_PFX(ToUserCode) - ASM_PFX(m16Start) _EntryPoint: .long ASM_PFX(ToUserCode) - ASM_PFX(m16Start)
.word 0x8 .word 0x8
@ -85,37 +107,35 @@ _16Gdtr: .word GdtEnd - _NullSegDesc - 1
_16GdtrBase: .long _NullSegDesc _16GdtrBase: .long _NullSegDesc
ASM_PFX(ToUserCode): ASM_PFX(ToUserCode):
movl %ss, %edx movw %ss, %dx
movl %ecx, %ss # set new segment selectors movw %cx, %ss # set new segment selectors
movl %ecx, %ds movw %cx, %ds
movl %ecx, %es movw %cx, %es
movl %ecx, %fs movw %cx, %fs
movl %ecx, %gs movw %cx, %gs
movl %eax, %cr0 movl %eax, %cr0
movl %ebp, %cr4 # real mode starts at next instruction movl %ebp, %cr4 # real mode starts at next instruction
movl %esi, %ss # set up 16-bit stack segment movw %si, %ss # set up 16-bit stack segment
xchgw %bx, %sp # set up 16-bit stack pointer xchgl %ebx, %esp # set up 16-bit stack pointer
.byte 0x66 calll L_Base # push eip
call L_Base # push eip
L_Base: L_Base:
popw %bp # ebp <- offset L_Base popl %ebp # ebp <- offset L_Base
.byte 0x67; # address size override push (IA32_REGS_SIZE + 2)(%esp)
push 54(%esp) lea (L_RealMode - L_Base)(%bp), %ax
lea 0xc(%esi), %eax push %ax
push %eax
lret lret
L_RealMode: L_RealMode:
mov %edx, %cs:0xffffffc5(%esi) mov %dx, %cs:(SavedSs - L_Base)(%bp)
mov %bx, %cs:0xffffffcb(%esi) mov %ebx, %cs:(SavedEsp - L_Base)(%bp)
lidtw %cs:0xffffffd7(%esi) lidtl %cs:(_16Idtr - L_Base)(%bp)
popaw # popad actually popal
pop %ds pop %ds
pop %es pop %es
pop %fs pop %fs
pop %gs pop %gs
popfw # popfd popfl
lretw # transfer control to user code lretl # transfer control to user code
_NullSegDesc: .quad 0 _NullSegDesc: .quad 0
_16CsDesc: _16CsDesc:
@ -134,6 +154,7 @@ _16DsDesc:
.byte 0 .byte 0
GdtEnd: GdtEnd:
.code32
# #
# @param RegSet The pointer to a IA32_DWORD_REGS structure # @param RegSet The pointer to a IA32_DWORD_REGS structure
# @param Transition The pointer to the transition code # @param Transition The pointer to the transition code
@ -149,41 +170,41 @@ ASM_PFX(InternalAsmThunk16):
push %fs push %fs
push %gs push %gs
movl 36(%esp), %esi # esi <- RegSet movl 36(%esp), %esi # esi <- RegSet
movzwl 0x32(%esi), %edx movzwl _SS(%esi), %edx
mov 0xc(%esi), %edi mov _ESP(%esi), %edi
add $0xffffffc8, %edi add $(-(IA32_REGS_SIZE + 4)), %edi
movl %edi, %ebx # ebx <- stack offset movl %edi, %ebx # ebx <- stack offset
imul $0x10, %edx, %eax imul $0x10, %edx, %eax
push $0xd push $(IA32_REGS_SIZE / 4)
addl %eax, %edi # edi <- linear address of 16-bit stack addl %eax, %edi # edi <- linear address of 16-bit stack
pop %ecx pop %ecx
rep rep
movsl # copy RegSet movsl # copy RegSet
movl 40(%esp), %eax # eax <- address of transition code movl 40(%esp), %eax # eax <- address of transition code
movl %edx, %esi # esi <- 16-bit stack segment movl %edx, %esi # esi <- 16-bit stack segment
lea 0x61(%eax), %edx lea (SavedCr0 - ASM_PFX(m16Start))(%eax), %edx
movl %eax, %ecx movl %eax, %ecx
andl $0xf, %ecx andl $0xf, %ecx
shll $12, %eax shll $12, %eax
lea 0x6(%ecx), %ecx lea (ASM_PFX(BackFromUserCode) - ASM_PFX(m16Start))(%ecx), %ecx
movw %cx, %ax movw %cx, %ax
stosl # [edi] <- return address of user code stosl # [edi] <- return address of user code
sgdtl 0xffffff9f(%edx) sgdtl (SavedGdt - SavedCr0)(%edx)
sidtl 0x24(%esp) sidtl 0x24(%esp)
movl %cr0, %eax movl %cr0, %eax
movl %eax, (%edx) # save CR0 in SavedCr0 movl %eax, (%edx) # save CR0 in SavedCr0
andl $0x7ffffffe, %eax # clear PE, PG bits andl $0x7ffffffe, %eax # clear PE, PG bits
movl %cr4, %ebp movl %cr4, %ebp
mov %ebp, 0xfffffff1(%edx) mov %ebp, (SavedCr4 - SavedCr0)(%edx)
andl $0xffffffcf, %ebp # clear PAE, PSE bits andl $0xffffffcf, %ebp # clear PAE, PSE bits
pushl $0x10 pushl $0x10
pop %ecx # ecx <- selector for data segments pop %ecx # ecx <- selector for data segments
lgdtl 0x20(%edx) lgdtl (_16Gdtr - SavedCr0)(%edx)
pushfl pushfl
lcall *0x14(%edx) lcall *(_EntryPoint - SavedCr0)(%edx)
popfl popfl
lidtl 0x24(%esp) lidtl 0x24(%esp)
lea 0xffffffcc(%ebp), %eax lea -IA32_REGS_SIZE(%ebp), %eax
pop %gs pop %gs
pop %fs pop %fs
pop %es pop %es