mirror of https://github.com/acidanthera/audk.git
OvmfPkg/PlatformPei: eliminate unchecked PcdSetXX() calls
These are deprecated / disabled under the DISABLE_NEW_DEPRECATED_INTERFACES feature test macro. Introduce a variable called PcdStatus, and use it to assert the success of these operations (there is no reason for them to fail here). Cc: Anthony PERARD <anthony.perard@citrix.com> Cc: Gary Lin <glin@suse.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=166 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Gary Lin <glin@suse.com> Tested-by: Gary Lin <glin@suse.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
This commit is contained in:
Laszlo Ersek
parent
4d1362e1f9
commit
32e083c71d
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@ -107,6 +107,7 @@ GetFirstNonAddress (
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FIRMWARE_CONFIG_ITEM FwCfgItem;
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UINTN FwCfgSize;
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UINT64 HotPlugMemoryEnd;
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RETURN_STATUS PcdStatus;
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FirstNonAddress = BASE_4GB + GetSystemMemorySizeAbove4gb ();
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@ -154,7 +155,8 @@ GetFirstNonAddress (
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if (mBootMode != BOOT_ON_S3_RESUME) {
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DEBUG ((EFI_D_INFO, "%a: disabling 64-bit PCI host aperture\n",
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__FUNCTION__));
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PcdSet64 (PcdPciMmio64Size, 0);
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PcdStatus = PcdSet64S (PcdPciMmio64Size, 0);
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ASSERT_RETURN_ERROR (PcdStatus);
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}
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//
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@ -202,8 +204,11 @@ GetFirstNonAddress (
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// the GCD memory space map through our PciHostBridgeLib instance; here we
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// only need to set the PCDs.
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//
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PcdSet64 (PcdPciMmio64Base, Pci64Base);
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PcdSet64 (PcdPciMmio64Size, Pci64Size);
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PcdStatus = PcdSet64S (PcdPciMmio64Base, Pci64Base);
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ASSERT_RETURN_ERROR (PcdStatus);
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PcdStatus = PcdSet64S (PcdPciMmio64Size, Pci64Size);
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ASSERT_RETURN_ERROR (PcdStatus);
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DEBUG ((EFI_D_INFO, "%a: Pci64Base=0x%Lx Pci64Size=0x%Lx\n",
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__FUNCTION__, Pci64Base, Pci64Size));
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}
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@ -156,8 +156,9 @@ MemMapInitialization (
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VOID
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)
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{
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UINT64 PciIoBase;
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UINT64 PciIoSize;
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UINT64 PciIoBase;
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UINT64 PciIoSize;
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RETURN_STATUS PcdStatus;
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PciIoBase = 0xC000;
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PciIoSize = 0x4000;
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@ -212,8 +213,11 @@ MemMapInitialization (
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//
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PciSize = 0xFC000000 - PciBase;
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AddIoMemoryBaseSizeHob (PciBase, PciSize);
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PcdSet64 (PcdPciMmio32Base, PciBase);
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PcdSet64 (PcdPciMmio32Size, PciSize);
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PcdStatus = PcdSet64S (PcdPciMmio32Base, PciBase);
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ASSERT_RETURN_ERROR (PcdStatus);
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PcdStatus = PcdSet64S (PcdPciMmio32Size, PciSize);
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ASSERT_RETURN_ERROR (PcdStatus);
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AddIoMemoryBaseSizeHob (0xFEC00000, SIZE_4KB);
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AddIoMemoryBaseSizeHob (0xFED00000, SIZE_1KB);
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if (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
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@ -266,8 +270,10 @@ MemMapInitialization (
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PciIoBase,
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PciIoSize
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);
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PcdSet64 (PcdPciIoBase, PciIoBase);
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PcdSet64 (PcdPciIoSize, PciIoSize);
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PcdStatus = PcdSet64S (PcdPciIoBase, PciIoBase);
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ASSERT_RETURN_ERROR (PcdStatus);
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PcdStatus = PcdSet64S (PcdPciIoSize, PciIoSize);
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ASSERT_RETURN_ERROR (PcdStatus);
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}
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EFI_STATUS
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@ -316,11 +322,13 @@ GetNamedFwCfgBoolean (
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#define UPDATE_BOOLEAN_PCD_FROM_FW_CFG(TokenName) \
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do { \
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BOOLEAN Setting; \
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BOOLEAN Setting; \
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RETURN_STATUS PcdStatus; \
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\
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if (!EFI_ERROR (GetNamedFwCfgBoolean ( \
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"opt/ovmf/" #TokenName, &Setting))) { \
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PcdSetBool (TokenName, Setting); \
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PcdStatus = PcdSetBoolS (TokenName, Setting); \
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ASSERT_RETURN_ERROR (PcdStatus); \
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} \
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} while (0)
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@ -379,12 +387,13 @@ MiscInitialization (
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VOID
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)
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{
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UINTN PmCmd;
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UINTN Pmba;
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UINT32 PmbaAndVal;
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UINT32 PmbaOrVal;
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UINTN AcpiCtlReg;
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UINT8 AcpiEnBit;
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UINTN PmCmd;
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UINTN Pmba;
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UINT32 PmbaAndVal;
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UINT32 PmbaOrVal;
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UINTN AcpiCtlReg;
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UINT8 AcpiEnBit;
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RETURN_STATUS PcdStatus;
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//
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// Disable A20 Mask
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@ -424,7 +433,8 @@ MiscInitialization (
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ASSERT (FALSE);
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return;
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}
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PcdSet16 (PcdOvmfHostBridgePciDevId, mHostBridgeDevId);
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PcdStatus = PcdSet16S (PcdOvmfHostBridgePciDevId, mHostBridgeDevId);
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ASSERT_RETURN_ERROR (PcdStatus);
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//
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// If the appropriate IOspace enable bit is set, assume the ACPI PMBA
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@ -491,6 +501,7 @@ ReserveEmuVariableNvStore (
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)
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{
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EFI_PHYSICAL_ADDRESS VariableStore;
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RETURN_STATUS PcdStatus;
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//
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// Allocate storage for NV variables early on so it will be
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@ -509,7 +520,8 @@ ReserveEmuVariableNvStore (
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VariableStore,
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(2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize)) / 1024
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));
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PcdSet64 (PcdEmuVariableNvStoreReserved, VariableStore);
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PcdStatus = PcdSet64S (PcdEmuVariableNvStoreReserved, VariableStore);
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ASSERT_RETURN_ERROR (PcdStatus);
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}
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@ -210,6 +210,8 @@ InitializeXen (
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VOID
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)
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{
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RETURN_STATUS PcdStatus;
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if (mXenLeaf == 0) {
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return EFI_NOT_FOUND;
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}
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@ -222,7 +224,8 @@ InitializeXen (
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//
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AddReservedMemoryBaseSizeHob (0xFC000000, 0x1000000, FALSE);
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PcdSetBool (PcdPciDisableBusEnumeration, TRUE);
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PcdStatus = PcdSetBoolS (PcdPciDisableBusEnumeration, TRUE);
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ASSERT_RETURN_ERROR (PcdStatus);
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return EFI_SUCCESS;
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}
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