mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg/CpuCommonFeaturesLib: Remove redundant definition.
The EnumProcTraceMemDisable/OutputSchemeInvalid are redundant definitions. These definitions can be handled by other code, so remove them. V2: Change enum members name. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
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@ -30,10 +30,9 @@
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/// Processor trace output scheme selection.
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/// Processor trace output scheme selection.
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///
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///
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typedef enum {
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typedef enum {
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OutputSchemeSingleRange = 0,
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RtitOutputSchemeSingleRange = 0,
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OutputSchemeToPA,
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RtitOutputSchemeToPA
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OutputSchemeInvalid
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} RTIT_OUTPUT_SCHEME;
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} PROC_TRACE_OUTPUT_SCHEME;
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typedef struct {
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typedef struct {
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BOOLEAN ProcTraceSupported;
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BOOLEAN ProcTraceSupported;
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@ -122,7 +121,7 @@ ProcTraceSupport (
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//
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//
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ProcTraceData = (PROC_TRACE_DATA *) ConfigData;
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ProcTraceData = (PROC_TRACE_DATA *) ConfigData;
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if ((ProcTraceData->ProcTraceMemSize > RtitTopaMemorySize128M) ||
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if ((ProcTraceData->ProcTraceMemSize > RtitTopaMemorySize128M) ||
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(ProcTraceData->ProcTraceOutputScheme > ProcTraceOutputSchemeToPA)) {
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(ProcTraceData->ProcTraceOutputScheme > RtitOutputSchemeToPA)) {
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return FALSE;
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return FALSE;
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}
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}
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@ -138,8 +137,8 @@ ProcTraceSupport (
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AsmCpuidEx (CPUID_INTEL_PROCESSOR_TRACE, CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF, NULL, NULL, &Ecx.Uint32, NULL);
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AsmCpuidEx (CPUID_INTEL_PROCESSOR_TRACE, CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF, NULL, NULL, &Ecx.Uint32, NULL);
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ProcTraceData->ProcessorData[ProcessorNumber].TopaSupported = (BOOLEAN) (Ecx.Bits.RTIT == 1);
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ProcTraceData->ProcessorData[ProcessorNumber].TopaSupported = (BOOLEAN) (Ecx.Bits.RTIT == 1);
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ProcTraceData->ProcessorData[ProcessorNumber].SingleRangeSupported = (BOOLEAN) (Ecx.Bits.SingleRangeOutput == 1);
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ProcTraceData->ProcessorData[ProcessorNumber].SingleRangeSupported = (BOOLEAN) (Ecx.Bits.SingleRangeOutput == 1);
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if (ProcTraceData->ProcessorData[ProcessorNumber].TopaSupported ||
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if ((ProcTraceData->ProcessorData[ProcessorNumber].TopaSupported && (ProcTraceData->ProcTraceOutputScheme == RtitOutputSchemeToPA)) ||
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ProcTraceData->ProcessorData[ProcessorNumber].SingleRangeSupported) {
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(ProcTraceData->ProcessorData[ProcessorNumber].SingleRangeSupported && (ProcTraceData->ProcTraceOutputScheme == RtitOutputSchemeSingleRange))) {
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return TRUE;
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return TRUE;
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}
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}
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@ -291,7 +290,7 @@ ProcTraceInitialize (
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// Single Range output scheme
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// Single Range output scheme
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//
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//
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if (ProcTraceData->ProcessorData[ProcessorNumber].SingleRangeSupported &&
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if (ProcTraceData->ProcessorData[ProcessorNumber].SingleRangeSupported &&
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(ProcTraceData->ProcTraceOutputScheme == OutputSchemeSingleRange)) {
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(ProcTraceData->ProcTraceOutputScheme == RtitOutputSchemeSingleRange)) {
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if (FirstIn) {
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if (FirstIn) {
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DEBUG ((DEBUG_INFO, "ProcTrace: Enabling Single Range Output scheme \n"));
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DEBUG ((DEBUG_INFO, "ProcTrace: Enabling Single Range Output scheme \n"));
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}
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}
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@ -337,7 +336,7 @@ ProcTraceInitialize (
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// ToPA(Table of physical address) scheme
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// ToPA(Table of physical address) scheme
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//
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//
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if (ProcTraceData->ProcessorData[ProcessorNumber].TopaSupported &&
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if (ProcTraceData->ProcessorData[ProcessorNumber].TopaSupported &&
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(ProcTraceData->ProcTraceOutputScheme == OutputSchemeToPA)) {
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(ProcTraceData->ProcTraceOutputScheme == RtitOutputSchemeToPA)) {
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//
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//
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// Create ToPA structure aligned at 4KB for each logical thread
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// Create ToPA structure aligned at 4KB for each logical thread
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// with at least 2 entries by 8 bytes size each. The first entry
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// with at least 2 entries by 8 bytes size each. The first entry
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