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ArmPkg/ArmGic: Move remaining shared code into ArmGicDxe
Move the remaining ArmGicLib code that is shared between the v2 and v3 GIC DXE drivers into ArmGicCommonDxe.c Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
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@ -199,3 +199,46 @@ InstallAndRegisterInterruptService (
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return Status;
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}
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/**
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Return the GIC CPU Interrupt Interface ID.
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@param GicInterruptInterfaceBase Base address of the GIC Interrupt Interface.
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@retval CPU Interface Identification information.
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**/
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UINT32
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EFIAPI
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ArmGicGetInterfaceIdentification (
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IN UINTN GicInterruptInterfaceBase
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)
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{
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// Read the GIC Identification Register
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return MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIIDR);
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}
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UINTN
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EFIAPI
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ArmGicGetMaxNumInterrupts (
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IN UINTN GicDistributorBase
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)
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{
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UINTN ItLines;
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ItLines = MmioRead32 (GicDistributorBase + ARM_GIC_ICDICTR) & 0x1F;
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//
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// Interrupt ID 1020-1023 are reserved.
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//
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return (ItLines == 0x1f) ? 1020 : 32 * (ItLines + 1);
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}
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VOID
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EFIAPI
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ArmGicDisableDistributor (
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IN UINTN GicDistributorBase
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)
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{
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// Disable Gic Distributor
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MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x0);
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}
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@ -75,4 +75,22 @@ GicGetDistributorIcfgBaseAndBit (
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OUT UINTN *Config1Bit
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);
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UINT32
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EFIAPI
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ArmGicGetInterfaceIdentification (
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IN UINTN GicInterruptInterfaceBase
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);
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VOID
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EFIAPI
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ArmGicDisableDistributor (
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IN UINTN GicDistributorBase
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);
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UINTN
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EFIAPI
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ArmGicGetMaxNumInterrupts (
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IN UINTN GicDistributorBase
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);
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#endif // ARM_GIC_DXE_H_
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@ -1,57 +0,0 @@
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/** @file
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*
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* Copyright (c) 2011-2023, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-2-Clause-Patent
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*
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**/
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#include <Base.h>
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#include <Library/ArmGicLib.h>
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#include <Library/ArmLib.h>
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#include <Library/DebugLib.h>
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#include <Library/IoLib.h>
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#include <Library/PcdLib.h>
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/**
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Return the GIC CPU Interrupt Interface ID.
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@param GicInterruptInterfaceBase Base address of the GIC Interrupt Interface.
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@retval CPU Interface Identification information.
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**/
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UINT32
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EFIAPI
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ArmGicGetInterfaceIdentification (
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IN UINTN GicInterruptInterfaceBase
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)
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{
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// Read the GIC Identification Register
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return MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIIDR);
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}
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UINTN
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EFIAPI
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ArmGicGetMaxNumInterrupts (
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IN UINTN GicDistributorBase
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)
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{
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UINTN ItLines;
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ItLines = MmioRead32 (GicDistributorBase + ARM_GIC_ICDICTR) & 0x1F;
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//
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// Interrupt ID 1020-1023 are reserved.
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//
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return (ItLines == 0x1f) ? 1020 : 32 * (ItLines + 1);
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}
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VOID
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EFIAPI
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ArmGicDisableDistributor (
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IN UINTN GicDistributorBase
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)
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{
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// Disable Gic Distributor
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MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x0);
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}
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@ -14,8 +14,6 @@
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LIBRARY_CLASS = ArmGicLib
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[Sources]
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ArmGicLib.c
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GicV2/ArmGicV2Lib.c
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GicV2/ArmGicV2NonSecLib.c
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@ -110,24 +110,6 @@
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// Bit Mask for
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#define ARM_GIC_ICCIAR_ACKINTID 0x3FF
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UINT32
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EFIAPI
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ArmGicGetInterfaceIdentification (
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IN UINTN GicInterruptInterfaceBase
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);
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VOID
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EFIAPI
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ArmGicDisableDistributor (
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IN UINTN GicDistributorBase
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);
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UINTN
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EFIAPI
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ArmGicGetMaxNumInterrupts (
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IN UINTN GicDistributorBase
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);
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// GIC revision 2 specific declarations
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// Interrupts from 1020 to 1023 are considered as special interrupts
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