mirror of https://github.com/acidanthera/audk.git
ArmPlatformPkg: Add SP805 Watchdog support
- Create SP805 Watchdog timer - Enable this new driver on VExpress Cortex-A9x4 Core tile git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11794 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
parent
0f4386e775
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33e7c2abf4
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@ -490,6 +490,7 @@
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ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
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ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf
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ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
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ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
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#
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# Semi-hosting filesystem
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@ -162,6 +162,7 @@ READ_LOCK_STATUS = TRUE
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INF ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf
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INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
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INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
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INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
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#
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# Semi-hosting filesystem
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@ -106,6 +106,10 @@
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//#define PL111_CLCD_BASE PL111_CLCD_MOTHERBOARD_BASE
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#define PL111_CLCD_BASE PL111_CLCD_CORE_TILE_BASE
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// Specify which Watchdog to use
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#define SP805_WDOG_BASE SP805_WDOG_MOTHERBOARD_BASE
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//#define SP805_WDOG_BASE SP805_WDOG_CORE_TILE_BASE
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/***********************************************************************************
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Peripherals' misc settings
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************************************************************************************/
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@ -129,6 +133,9 @@
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// PL031 RTC - Other settings
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#define PL031_PPM_ACCURACY 300000000
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// SP805 Watchdog - Other settings
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#define SP805_CLOCK_FREQUENCY 32000
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#define SP805_MAX_TICKS 0xFFFFFFFF
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// PL111 Lcd
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#define PL111_CLCD_CORE_TILE_VIDEO_MODE_OSC_ID 1
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@ -0,0 +1,450 @@
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/** @file
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*
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* Copyright (c) 2011, ARM Limited. All rights reserved.
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*
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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*
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**/
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#include <PiDxe.h>
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#include <Library/BaseLib.h>
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#include <Library/DebugLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Library/UefiRuntimeServicesTableLib.h>
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#include <Library/UefiLib.h>
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#include <Library/IoLib.h>
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#include <Protocol/WatchdogTimer.h>
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#include <ArmPlatform.h>
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#include <Drivers/SP805Watchdog.h>
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/**
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Interface structure for the Watchdog Architectural Protocol.
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@par Protocol Description:
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This protocol provides a service to set the amount of time to wait
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before firing the watchdog timer, and it also provides a service to
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register a handler that is invoked when the watchdog timer fires.
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@par When the watchdog timer fires, control will be passed to a handler
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if one has been registered. If no handler has been registered,
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or the registered handler returns, then the system will be
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reset by calling the Runtime Service ResetSystem().
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@param RegisterHandler
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Registers a handler that will be called each time the
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watchdogtimer interrupt fires. TimerPeriod defines the minimum
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time between timer interrupts, so TimerPeriod will also
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be the minimum time between calls to the registered
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handler.
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NOTE: If the watchdog resets the system in hardware, then
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this function will not have any chance of executing.
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@param SetTimerPeriod
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Sets the period of the timer interrupt in 100 nS units.
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This function is optional, and may return EFI_UNSUPPORTED.
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If this function is supported, then the timer period will
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be rounded up to the nearest supported timer period.
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@param GetTimerPeriod
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Retrieves the period of the timer interrupt in 100 nS units.
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**/
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EFI_WATCHDOG_TIMER_ARCH_PROTOCOL gWatchdogTimer = {
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(EFI_WATCHDOG_TIMER_REGISTER_HANDLER) SP805RegisterHandler,
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(EFI_WATCHDOG_TIMER_SET_TIMER_PERIOD) SP805SetTimerPeriod,
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(EFI_WATCHDOG_TIMER_GET_TIMER_PERIOD) SP805GetTimerPeriod
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};
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EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;
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BOOLEAN mSP805Initialized = FALSE;
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EFI_STATUS
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SP805Identify (
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VOID
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)
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{
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// Check if this is a PrimeCell Peripheral
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if( ( MmioRead8( SP805_WDOG_PCELL_ID0 ) != 0x0D )
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|| ( MmioRead8( SP805_WDOG_PCELL_ID1 ) != 0xF0 )
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|| ( MmioRead8( SP805_WDOG_PCELL_ID2 ) != 0x05 )
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|| ( MmioRead8( SP805_WDOG_PCELL_ID3 ) != 0xB1 ) ) {
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return EFI_NOT_FOUND;
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}
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// Check if this PrimeCell Peripheral is the SP805 Watchdog Timer
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if( ( MmioRead8( SP805_WDOG_PERIPH_ID0 ) != 0x05 )
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|| ( MmioRead8( SP805_WDOG_PERIPH_ID1 ) != 0x18 )
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|| (( MmioRead8( SP805_WDOG_PERIPH_ID2 ) & 0x0000000F) != 0x04 )
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|| ( MmioRead8( SP805_WDOG_PERIPH_ID3 ) != 0x00 ) ) {
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return EFI_NOT_FOUND;
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}
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return EFI_SUCCESS;
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}
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/**
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Make sure the SP805 registers are unlocked for writing.
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Note: The SP805 Watchdog Timer supports locking of its registers,
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i.e. it inhibits all writes to avoid rogue software accidentally
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corrupting their contents.
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**/
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inline
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VOID
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SP805Unlock (
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VOID
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)
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{
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if( MmioRead32(SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_LOCKED ) {
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MmioWrite32(SP805_WDOG_LOCK_REG, SP805_WDOG_SPECIAL_UNLOCK_CODE);
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}
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}
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/**
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Make sure the SP805 registers are locked and can not be overwritten.
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Note: The SP805 Watchdog Timer supports locking of its registers,
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i.e. it inhibits all writes to avoid rogue software accidentally
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corrupting their contents.
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**/
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inline
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VOID
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SP805Lock (
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VOID
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)
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{
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if( MmioRead32(SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_UNLOCKED ) {
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// To lock it, just write in any number (except the special unlock code).
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MmioWrite32(SP805_WDOG_LOCK_REG, SP805_WDOG_LOCK_IS_LOCKED);
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}
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}
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/**
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Stop the SP805 watchdog timer from counting down by disabling interrupts.
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**/
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inline
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VOID
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SP805Stop (
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VOID
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)
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{
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// Disable interrupts
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if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) != 0 ) {
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MmioAnd32(SP805_WDOG_CONTROL_REG, ~SP805_WDOG_CTRL_INTEN);
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}
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}
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/**
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Starts the SP805 counting down by enabling interrupts.
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The count down will start from the value stored in the Load register,
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not from the value where it was previously stopped.
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**/
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inline
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VOID
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SP805Start (
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VOID
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)
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{
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// Enable interrupts
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if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0 ) {
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MmioOr32(SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_INTEN);
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}
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}
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/**
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On exiting boot services we must make sure the SP805 Watchdog Timer
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is stopped.
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**/
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VOID
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EFIAPI
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ExitBootServicesEvent (
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IN EFI_EVENT Event,
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IN VOID *Context
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)
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{
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SP805Unlock();
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SP805Stop();
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SP805Lock();
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}
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/**
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This function registers the handler NotifyFunction so it is called every time
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the watchdog timer expires. It also passes the amount of time since the last
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handler call to the NotifyFunction.
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If NotifyFunction is not NULL and a handler is not already registered,
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then the new handler is registered and EFI_SUCCESS is returned.
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If NotifyFunction is NULL, and a handler is already registered,
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then that handler is unregistered.
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If an attempt is made to register a handler when a handler is already registered,
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then EFI_ALREADY_STARTED is returned.
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If an attempt is made to unregister a handler when a handler is not registered,
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then EFI_INVALID_PARAMETER is returned.
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@param This The EFI_TIMER_ARCH_PROTOCOL instance.
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@param NotifyFunction The function to call when a timer interrupt fires. This
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function executes at TPL_HIGH_LEVEL. The DXE Core will
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register a handler for the timer interrupt, so it can know
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how much time has passed. This information is used to
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signal timer based events. NULL will unregister the handler.
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@retval EFI_SUCCESS The watchdog timer handler was registered.
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@retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler is already
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registered.
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@retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not
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previously registered.
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**/
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EFI_STATUS
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EFIAPI
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SP805RegisterHandler (
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IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
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IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction
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)
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{
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// ERROR: This function is not supported.
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// The hardware watchdog will reset the board
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return EFI_INVALID_PARAMETER;
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}
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/**
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This function adjusts the period of timer interrupts to the value specified
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by TimerPeriod. If the timer period is updated, then the selected timer
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period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If
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the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.
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If an error occurs while attempting to update the timer period, then the
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timer hardware will be put back in its state prior to this call, and
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EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt
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is disabled. This is not the same as disabling the CPU's interrupts.
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Instead, it must either turn off the timer hardware, or it must adjust the
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interrupt controller so that a CPU interrupt is not generated when the timer
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interrupt fires.
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@param This The EFI_TIMER_ARCH_PROTOCOL instance.
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@param TimerPeriod The rate to program the timer interrupt in 100 nS units. If
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the timer hardware is not programmable, then EFI_UNSUPPORTED is
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returned. If the timer is programmable, then the timer period
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will be rounded up to the nearest timer period that is supported
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by the timer hardware. If TimerPeriod is set to 0, then the
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timer interrupts will be disabled.
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@retval EFI_SUCCESS The timer period was changed.
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@retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt.
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@retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error.
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**/
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EFI_STATUS
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EFIAPI
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SP805SetTimerPeriod (
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IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
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IN UINT64 TimerPeriod // In 100ns units
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)
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{
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EFI_STATUS Status = EFI_SUCCESS;
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UINT64 Ticks64bit;
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// Initialize the hardware if not already done
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if( !mSP805Initialized ) {
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Status = SP805Initialize();
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if (EFI_ERROR(Status)) {
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goto EXIT;
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}
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}
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SP805Unlock();
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if( TimerPeriod == 0 ) {
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// This is a watchdog stop request
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SP805Stop();
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goto EXIT;
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} else {
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// Calculate the Watchdog ticks required for a delay of (TimerTicks * 100) nanoseconds
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// The SP805 will count down to ZERO once, generate an interrupt and
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// then it will again reload the initial value and start again.
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// On the second time when it reaches ZERO, it will actually reset the board.
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// Therefore, we need to load half the required delay.
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//
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// WatchdogTicks = ((TimerPeriod * 100 * SP805_CLOCK_FREQUENCY) / 1GHz) / 2 ;
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//
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// i.e.:
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//
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// WatchdogTicks = (TimerPeriod * SP805_CLOCK_FREQUENCY) / 20 MHz ;
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Ticks64bit = DivU64x32( MultU64x32( TimerPeriod, SP805_CLOCK_FREQUENCY ), 20000000 );
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// The registers in the SP805 are only 32 bits
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if( Ticks64bit > SP805_MAX_TICKS ) {
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// We could load the watchdog with the maximum supported value but
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// if a smaller value was requested, this could have the watchdog
|
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// triggering before it was intended.
|
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// Better generate an error to let the caller know.
|
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Status = EFI_DEVICE_ERROR;
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goto EXIT;
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}
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// Update the watchdog with a 32-bit value.
|
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MmioWrite32(SP805_WDOG_LOAD_REG, (UINT32)Ticks64bit);
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// Start the watchdog
|
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SP805Start();
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}
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EXIT:
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// Ensure the watchdog is locked before exiting.
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SP805Lock();
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return Status;
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}
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/**
|
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This function retrieves the period of timer interrupts in 100 ns units,
|
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returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod
|
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is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is
|
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returned, then the timer is currently disabled.
|
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|
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@param This The EFI_TIMER_ARCH_PROTOCOL instance.
|
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@param TimerPeriod A pointer to the timer period to retrieve in 100 ns units. If
|
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0 is returned, then the timer is currently disabled.
|
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|
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|
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@retval EFI_SUCCESS The timer period was returned in TimerPeriod.
|
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@retval EFI_INVALID_PARAMETER TimerPeriod is NULL.
|
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|
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**/
|
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EFI_STATUS
|
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EFIAPI
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SP805GetTimerPeriod (
|
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IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
|
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OUT UINT64 *TimerPeriod
|
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)
|
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{
|
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EFI_STATUS Status = EFI_SUCCESS;
|
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UINT64 ReturnValue;
|
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|
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if (TimerPeriod == NULL) {
|
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return EFI_INVALID_PARAMETER;
|
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}
|
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|
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// Initialize the hardware if not already done
|
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if( !mSP805Initialized ) {
|
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Status = SP805Initialize();
|
||||
if (EFI_ERROR(Status)) {
|
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goto EXIT;
|
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}
|
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}
|
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|
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// Check if the watchdog is stopped
|
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if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0 ) {
|
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// It is stopped, so return zero.
|
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ReturnValue = 0;
|
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} else {
|
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// Convert the Watchdog ticks into TimerPeriod
|
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// Ensure 64bit arithmetic throughout because the Watchdog ticks may already
|
||||
// be at the maximum 32 bit value and we still need to multiply that by 600.
|
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ReturnValue = MultU64x32( MmioRead32(SP805_WDOG_LOAD_REG), 600 );
|
||||
}
|
||||
|
||||
*TimerPeriod = ReturnValue;
|
||||
|
||||
EXIT:
|
||||
return Status;
|
||||
}
|
||||
|
||||
/**
|
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Initialize the state information for the Watchdog Timer Architectural Protocol.
|
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|
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@param ImageHandle of the loaded driver
|
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@param SystemTable Pointer to the System Table
|
||||
|
||||
@retval EFI_SUCCESS Protocol registered
|
||||
@retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure
|
||||
@retval EFI_DEVICE_ERROR Hardware problems
|
||||
|
||||
**/
|
||||
EFI_STATUS
|
||||
SP805Initialize (
|
||||
VOID
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
|
||||
// Check if the SP805 hardware watchdog module exists on board
|
||||
Status = SP805Identify();
|
||||
if (EFI_ERROR( Status )) {
|
||||
Status = EFI_DEVICE_ERROR;
|
||||
goto EXIT;
|
||||
}
|
||||
|
||||
// Unlock access to the SP805 registers
|
||||
SP805Unlock();
|
||||
|
||||
// Stop the watchdog from triggering unexpectedly
|
||||
SP805Stop();
|
||||
|
||||
// Set the watchdog to reset the board when triggered
|
||||
if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_RESEN) == 0 ) {
|
||||
MmioOr32(SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_RESEN);
|
||||
}
|
||||
|
||||
// Prohibit any rogue access to SP805 registers
|
||||
SP805Lock();
|
||||
|
||||
mSP805Initialized = TRUE;
|
||||
|
||||
EXIT:
|
||||
return Status;
|
||||
}
|
||||
|
||||
EFI_STATUS
|
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EFIAPI
|
||||
SP805InstallProtocol (
|
||||
IN EFI_HANDLE ImageHandle,
|
||||
IN EFI_SYSTEM_TABLE *SystemTable
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
EFI_HANDLE Handle;
|
||||
|
||||
//
|
||||
// Make sure the Watchdog Timer Architectural Protocol has not been installed in the system yet.
|
||||
// This will avoid conflicts with the universal watchdog
|
||||
//
|
||||
ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiWatchdogTimerArchProtocolGuid);
|
||||
|
||||
// Register for an ExitBootServicesEvent
|
||||
Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent);
|
||||
if (EFI_ERROR(Status)) {
|
||||
Status = EFI_OUT_OF_RESOURCES;
|
||||
goto EXIT;
|
||||
}
|
||||
|
||||
// Install the Timer Architectural Protocol onto a new handle
|
||||
Handle = NULL;
|
||||
Status = gBS->InstallMultipleProtocolInterfaces(
|
||||
&Handle,
|
||||
&gEfiWatchdogTimerArchProtocolGuid, &gWatchdogTimer,
|
||||
NULL
|
||||
);
|
||||
if (EFI_ERROR(Status)) {
|
||||
Status = EFI_OUT_OF_RESOURCES;
|
||||
goto EXIT;
|
||||
}
|
||||
|
||||
EXIT:
|
||||
if(EFI_ERROR(Status)) {
|
||||
// The watchdog failed to initialize
|
||||
ASSERT(FALSE);
|
||||
}
|
||||
return Status;
|
||||
}
|
|
@ -0,0 +1,50 @@
|
|||
/** @file
|
||||
*
|
||||
* Copyright (c) 2011, ARM Limited. All rights reserved.
|
||||
*
|
||||
* This program and the accompanying materials
|
||||
* are licensed and made available under the terms and conditions of the BSD License
|
||||
* which accompanies this distribution. The full text of the license may be found at
|
||||
* http://opensource.org/licenses/bsd-license.php
|
||||
*
|
||||
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
*
|
||||
**/
|
||||
|
||||
[Defines]
|
||||
INF_VERSION = 0x00010005
|
||||
BASE_NAME = SP805WatchdogDxe
|
||||
FILE_GUID = ebd705fb-fa92-46a7-b32b-7f566d944614
|
||||
MODULE_TYPE = DXE_DRIVER
|
||||
VERSION_STRING = 1.0
|
||||
|
||||
ENTRY_POINT = SP805InstallProtocol
|
||||
|
||||
[Sources.common]
|
||||
SP805Watchdog.c
|
||||
|
||||
[Packages]
|
||||
MdePkg/MdePkg.dec
|
||||
EmbeddedPkg/EmbeddedPkg.dec
|
||||
ArmPkg/ArmPkg.dec
|
||||
ArmPlatformPkg/ArmPlatformPkg.dec
|
||||
|
||||
[LibraryClasses]
|
||||
BaseLib
|
||||
UefiRuntimeServicesTableLib
|
||||
UefiLib
|
||||
UefiBootServicesTableLib
|
||||
BaseMemoryLib
|
||||
DebugLib
|
||||
UefiDriverEntryPoint
|
||||
IoLib
|
||||
|
||||
[Guids]
|
||||
|
||||
[Protocols]
|
||||
gEfiWatchdogTimerArchProtocolGuid
|
||||
|
||||
|
||||
[Depex]
|
||||
TRUE
|
|
@ -0,0 +1,92 @@
|
|||
/** @file
|
||||
*
|
||||
* Copyright (c) 2011, ARM Limited. All rights reserved.
|
||||
*
|
||||
* This program and the accompanying materials
|
||||
* are licensed and made available under the terms and conditions of the BSD License
|
||||
* which accompanies this distribution. The full text of the license may be found at
|
||||
* http://opensource.org/licenses/bsd-license.php
|
||||
*
|
||||
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
*
|
||||
**/
|
||||
|
||||
|
||||
#ifndef __SP805_WATCHDOG_H__
|
||||
#define __SP805_WATCHDOG_H__
|
||||
|
||||
#include <Base.h>
|
||||
#include <ArmPlatform.h>
|
||||
|
||||
// SP805 Watchdog Registers
|
||||
#define SP805_WDOG_LOAD_REG (SP805_WDOG_BASE + 0x000)
|
||||
#define SP805_WDOG_CURRENT_REG (SP805_WDOG_BASE + 0x004)
|
||||
#define SP805_WDOG_CONTROL_REG (SP805_WDOG_BASE + 0x008)
|
||||
#define SP805_WDOG_INT_CLR_REG (SP805_WDOG_BASE + 0x00C)
|
||||
#define SP805_WDOG_RAW_INT_STS_REG (SP805_WDOG_BASE + 0x010)
|
||||
#define SP805_WDOG_MSK_INT_STS_REG (SP805_WDOG_BASE + 0x014)
|
||||
#define SP805_WDOG_LOCK_REG (SP805_WDOG_BASE + 0xC00)
|
||||
|
||||
#define SP805_WDOG_PERIPH_ID0 (SP805_WDOG_BASE + 0xFE0)
|
||||
#define SP805_WDOG_PERIPH_ID1 (SP805_WDOG_BASE + 0xFE4)
|
||||
#define SP805_WDOG_PERIPH_ID2 (SP805_WDOG_BASE + 0xFE8)
|
||||
#define SP805_WDOG_PERIPH_ID3 (SP805_WDOG_BASE + 0xFEC)
|
||||
|
||||
#define SP805_WDOG_PCELL_ID0 (SP805_WDOG_BASE + 0xFF0)
|
||||
#define SP805_WDOG_PCELL_ID1 (SP805_WDOG_BASE + 0xFF4)
|
||||
#define SP805_WDOG_PCELL_ID2 (SP805_WDOG_BASE + 0xFF8)
|
||||
#define SP805_WDOG_PCELL_ID3 (SP805_WDOG_BASE + 0xFFC)
|
||||
|
||||
// Timer control register bit definitions
|
||||
#define SP805_WDOG_CTRL_INTEN BIT0
|
||||
#define SP805_WDOG_CTRL_RESEN BIT1
|
||||
#define SP805_WDOG_RAW_INT_STS_WDOGRIS BIT0
|
||||
#define SP805_WDOG_MSK_INT_STS_WDOGMIS BIT0
|
||||
|
||||
#define SP805_WDOG_LOCK_IS_UNLOCKED 0x00000000
|
||||
#define SP805_WDOG_LOCK_IS_LOCKED 0x00000001
|
||||
#define SP805_WDOG_SPECIAL_UNLOCK_CODE 0x1ACCE551
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
ExitBootServicesEvent (
|
||||
IN EFI_EVENT Event,
|
||||
IN VOID *Context
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
SP805SetTimerPeriod (
|
||||
IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
|
||||
IN UINT64 TimerPeriod // In 100ns units
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
SP805GetTimerPeriod (
|
||||
IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
|
||||
OUT UINT64 *TimerPeriod
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
SP805RegisterHandler (
|
||||
IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
|
||||
IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
SP805Initialize (
|
||||
VOID
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
SP805InstallProtocol (
|
||||
IN EFI_HANDLE ImageHandle,
|
||||
IN EFI_SYSTEM_TABLE *SystemTable
|
||||
);
|
||||
|
||||
|
||||
#endif // __SP805_WATCHDOG_H__
|
Loading…
Reference in New Issue