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Ovmf/PlatformPei: Use host-provided GPA end if available 

Read the "hardware-info" item from fw-cfg to extract specifications
of PCI host bridges and analyze the 64-bit apertures of them to
find out the highest 64-bit MMIO address required which determines
the address space required by the guest, and, consequently, the
FirstNonAddress used to calculate size of physical addresses.

Using the static PeiHardwareInfoLib, read the fw-cfg file of
hardware information to extract, one by one, all the host
bridges. Find the last 64-bit MMIO address of each host bridge,
using the HardwareInfoPciHostBridgeLib API, and compare it to an
accumulate value to discover the highest address used, which
corresponds to the highest value that must be included in the
guest's physical address space.

Given that platforms with multiple host bridges may provide the PCI
apertures' addresses, the memory detection logic must take into
account that, if the host provided the MMIO windows that can and must
be used, the guest needs to take those values. Therefore, if the
MMIO windows are found in the host-provided fw-cfg file, skip all the
logic calculating the physical address size and just use the value
provided. Since each PCI host bridge corresponds to an element in
the information provided by the host, each of these must be analyzed
looking for the highest address used.

Cc: Alexander Graf <graf@amazon.de>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Nicolas Ojeda Leon <ncoleon@amazon.com>
This commit is contained in:
Nicolas Ojeda Leon 2022-01-19 15:48:33 +01:00 committed by mergify[bot]
parent a1bd79c514
commit 3497fd5c26
2 changed files with 142 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

148
OvmfPkg/Library/PlatformInitLib/MemDetect.c
View File

@ -27,6 +27,7 @@ Module Name:
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/HardwareInfoLib.h>
#include <Library/HobLib.h>
#include <Library/IoLib.h>
#include <Library/MemEncryptSevLib.h>
@ -527,6 +528,126 @@ PlatformAddressWidthFromCpuid (
));
}
/**
Iterate over the PCI host bridges resources information optionally provided
in fw-cfg and find the highest address contained in the PCI MMIO windows. If
the information is found, return the exclusive end; one past the last usable
address.
@param[out] PciMmioAddressEnd Pointer to one-after End Address updated with
information extracted from host-provided data
or zero if no information available or an
error happened
@retval EFI_SUCCESS PCI information was read and the output
parameter updated with the last valid
address in the 64-bit MMIO range.
@retval EFI_INVALID_PARAMETER Pointer parameter is invalid
@retval EFI_INCOMPATIBLE_VERSION Hardware information found in fw-cfg
has an incompatible format
@retval EFI_UNSUPPORTED Fw-cfg is not supported, thus host
provided information, if any, cannot be
read
@retval EFI_NOT_FOUND No PCI host bridge information provided
by the host.
**/
STATIC
EFI_STATUS
PlatformScanHostProvided64BitPciMmioEnd (
OUT UINT64 *PciMmioAddressEnd
)
{
EFI_STATUS Status;
HOST_BRIDGE_INFO HostBridge;
FIRMWARE_CONFIG_ITEM FwCfgItem;
UINTN FwCfgSize;
UINTN FwCfgReadIndex;
UINTN ReadDataSize;
UINT64 Above4GMmioEnd;
if (PciMmioAddressEnd == NULL) {
return EFI_INVALID_PARAMETER;
}
*PciMmioAddressEnd = 0;
Above4GMmioEnd = 0;
Status = QemuFwCfgFindFile ("etc/hardware-info", &FwCfgItem, &FwCfgSize);
if (EFI_ERROR (Status)) {
return Status;
}
QemuFwCfgSelectItem (FwCfgItem);
FwCfgReadIndex = 0;
while (FwCfgReadIndex < FwCfgSize) {
Status = QemuFwCfgReadNextHardwareInfoByType (
HardwareInfoTypeHostBridge,
sizeof (HostBridge),
FwCfgSize,
&HostBridge,
&ReadDataSize,
&FwCfgReadIndex
);
if (Status != EFI_SUCCESS) {
//
// No more data available to read in the file, break
// loop and finish process
//
break;
}
Status = HardwareInfoPciHostBridgeLastMmioAddress (
&HostBridge,
ReadDataSize,
TRUE,
&Above4GMmioEnd
);
if (Status != EFI_SUCCESS) {
//
// Error parsing MMIO apertures and extracting last MMIO
// address, reset PciMmioAddressEnd as if no information was
// found, to avoid moving forward with incomplete data, and
// bail out
//
DEBUG ((
DEBUG_ERROR,
"%a: ignoring malformed hardware information from fw_cfg\n",
__FUNCTION__
));
*PciMmioAddressEnd = 0;
return Status;
}
if (Above4GMmioEnd > *PciMmioAddressEnd) {
*PciMmioAddressEnd = Above4GMmioEnd;
}
}
if (*PciMmioAddressEnd > 0) {
//
// Host-provided PCI information was found and a MMIO window end
// derived from it.
// Increase the End address by one to have the output pointing to
// one after the address in use (exclusive end).
//
*PciMmioAddressEnd += 1;
DEBUG ((
DEBUG_INFO,
"%a: Pci64End=0x%Lx\n",
__FUNCTION__,
*PciMmioAddressEnd
));
return EFI_SUCCESS;
}
return EFI_NOT_FOUND;
}
/**
Initialize the PhysMemAddressWidth field in PlatformInfoHob based on guest RAM size.
**/
@ -536,8 +657,9 @@ PlatformAddressWidthInitialization (
IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob
)
{
UINT64 FirstNonAddress;
UINT8 PhysMemAddressWidth;
UINT64 FirstNonAddress;
UINT8 PhysMemAddressWidth;
EFI_STATUS Status;
if (PlatformInfoHob->HostBridgeDevId == 0xffff /* microvm */) {
PlatformAddressWidthFromCpuid (PlatformInfoHob);
@ -545,12 +667,24 @@ PlatformAddressWidthInitialization (
}
//
// As guest-physical memory size grows, the permanent PEI RAM requirements
// are dominated by the identity-mapping page tables built by the DXE IPL.
// The DXL IPL keys off of the physical address bits advertized in the CPU
// HOB. To conserve memory, we calculate the minimum address width here.
// First scan host-provided hardware information to assess if the address
// space is already known. If so, guest must use those values.
//
FirstNonAddress = PlatformGetFirstNonAddress (PlatformInfoHob);
Status = PlatformScanHostProvided64BitPciMmioEnd (&FirstNonAddress);
if (EFI_ERROR (Status)) {
//
// If the host did not provide valid hardware information leading to a
// hard-defined 64-bit MMIO end, fold back to calculating the minimum range
// needed.
// As guest-physical memory size grows, the permanent PEI RAM requirements
// are dominated by the identity-mapping page tables built by the DXE IPL.
// The DXL IPL keys off of the physical address bits advertized in the CPU
// HOB. To conserve memory, we calculate the minimum address width here.
//
FirstNonAddress = PlatformGetFirstNonAddress (PlatformInfoHob);
}
PhysMemAddressWidth = (UINT8)HighBitSet64 (FirstNonAddress);
//

1
OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf
View File

@ -50,6 +50,7 @@
MtrrLib
PcdLib
PciLib
PeiHardwareInfoLib
[LibraryClasses.X64]
TdxLib