mirror of https://github.com/acidanthera/audk.git
INF file verified, and Coding Style reviewed.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7232 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
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#/** @file
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# Instance of Cache Maintenance Library using Base Library services.
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# Instance of Cache Maintenance Library using Base Library services.
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#
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# Cache Maintenance Library that uses Base Library services to maintain caches.
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# Cache Maintenance Library that uses Base Library services to maintain caches.
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# This library assumes there are no chipset dependencies required to maintain caches.
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#
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# Copyright (c) 2007 - 2008, Intel Corporation
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# Copyright (c) 2007 - 2008, Intel Corporation
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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#/** @file
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# Instance of CPU Library for various architecture.
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# Instance of CPU Library for various architecture.
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#
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# CPU Library implemented using ASM functions for IA-32 and X64,
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# PAL CALLs for IPF, and empty functions for EBC.
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# CPU Library implemented using ASM functions for IA-32 and X64,
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# PAL CALLs for IPF, and empty functions for EBC.
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#
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# Copyright (c) 2007 - 2008, Intel Corporation.
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# Copyright (c) 2007 - 2008, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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#/** @file
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# Debug Library with empty functions.
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# Debug Library with empty functions.
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#
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# Copyright (c) 2007 - 2008, Intel Corporation.
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# Copyright (c) 2007 - 2008, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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#/** @file
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# Instance of I/O Library using compiler intrinsics.
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# Instance of I/O Library using compiler intrinsics.
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#
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# I/O Library that uses compiler intrinsics to perform IN and OUT instructions
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# for IA-32 and x64. On IPF, I/O port requests are translated into MMIO requests.
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# MMIO requests are forwarded directly to memory.
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# I/O Library that uses compiler intrinsics to perform IN and OUT instructions
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# for IA-32 and x64. On IPF, I/O port requests are translated into MMIO requests.
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# MMIO requests are forwarded directly to memory.
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#
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# Copyright (c) 2007 - 2008, Intel Corporation.
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# Copyright (c) 2007 - 2008, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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#/** @file
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# Base Library implementation.
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# Base Library implementation.
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#
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# Copyright (c) 2007 - 2008, Intel Corporation.
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# Copyright (c) 2007 - 2008, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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#/** @file
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# Instance of Base Memory Library without assembly.
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# Instance of Base Memory Library without assembly.
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#
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# Base Memory Library implementation - no ASM.
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# Base Memory Library implementation - no ASM.
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#
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# Copyright (c) 2007 - 2008, Intel Corporation
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# Copyright (c) 2007 - 2008, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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#/** @file
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# Instance of Base Memory Library using MMX registers.
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# Instance of Base Memory Library using MMX registers.
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#
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# Base Memory Library that uses MMX registers for high performance.
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# Base Memory Library that uses MMX registers for high performance.
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# Optimized for use in DXE.
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#
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# Copyright (c) 2006 - 2008, Intel Corporation
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# Copyright (c) 2006 - 2008, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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#/** @file
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# Instance of Base Memory Library optimized for use in DXE phase.
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# Instance of Base Memory Library optimized for use in DXE phase.
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#
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# Base Memory Library that is optimized for use in DXE phase.
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# Uses REP, MMX, XMM registers as required for best performance.
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# Base Memory Library that is optimized for use in DXE phase.
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# Uses REP, MMX, XMM registers as required for best performance.
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#
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# Copyright (c) 2007 - 2008, Intel Corporation
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# Copyright (c) 2007 - 2008, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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#/** @file
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# Instance of Base Memory Library optimized for use in PEI phase.
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# Instance of Base Memory Library optimized for use in PEI phase.
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#
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# Base Memory Library that is optimized for use in PEI phase.
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# Uses REP, MMX, XMM registers as required for best performance.
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# Base Memory Library that is optimized for use in PEI phase.
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# Uses REP, MMX, XMM registers as required for best performance.
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#
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# Copyright (c) 2007 - 2008, Intel Corporation
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# Copyright (c) 2007 - 2008, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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#/** @file
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# Instance of Base Memory Library using REP string instructions.
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# Instance of Base Memory Library using REP string instructions.
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#
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# Base Memory Library that uses REP string instructions for
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# Base Memory Library that uses REP string instructions for
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# high performance and small size. Optimized for use in PEI.
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#
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# Copyright (c) 2007 - 2008, Intel Corporation
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# Copyright (c) 2007 - 2008, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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#/** @file
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# Instance of Base Memory Library using XMM registers.
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# Instance of Base Memory Library using XMM registers.
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#
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# Base Memory Library that uses XMM registers for high performance.
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# Base Memory Library that uses XMM registers for high performance.
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# Optimized for use in DXE.
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#
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# Copyright (c) 2007 - 2008, Intel Corporation
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# Copyright (c) 2007 - 2008, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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#/** @file
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# Null instance of PAL Library with empty functions.
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# Null instance of PAL Library with empty functions.
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#
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# Copyright (c) 2007 - 2008, Intel Corporation.
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# Copyright (c) 2007 - 2008, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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#/** @file
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# Instance of PCD Library without support of dynamic PCD entries.
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# Instance of PCD Library without support of dynamic PCD entries.
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#
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# PCD Library that only provides access to Feature Flag, Fixed At Build,
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# and Binary Patch typed PCD entries. Access to Dynamic PCD entries is ignored.
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# PCD Library that only provides access to Feature Flag, Fixed At Build,
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# and Binary Patch typed PCD entries. Access to Dynamic PCD entries is ignored.
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#
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# Copyright (c) 2007 - 2008, Intel Corporation.
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# Copyright (c) 2007 - 2008, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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#/** @file
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# Instance of PCI CF8 Library using I/O ports 0xCF8 and 0xCFC.
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# Instance of PCI CF8 Library using I/O ports 0xCF8 and 0xCFC.
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#
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# PCI CF8 Library that uses I/O ports 0xCF8 and 0xCFC to perform PCI Configuration cycles.
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# PCI CF8 Library that uses I/O ports 0xCF8 and 0xCFC to perform PCI Configuration cycles.
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# Layers on top of an I/O Library instance.
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#
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# Copyright (c) 2007 - 2008, Intel Corporation.
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# Copyright (c) 2007 - 2008, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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#/** @file
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# Instance of PCI Express Library using the 256 MB PCI Express MMIO window.
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# Instance of PCI Express Library using the 256 MB PCI Express MMIO window.
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#
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# PCI Express Library that uses the 256 MB PCI Express MMIO window to perform
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# PCI Express Library that uses the 256 MB PCI Express MMIO window to perform
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# PCI Configuration cycles. Layers on top of an I/O Library instance.
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#
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# Copyright (c) 2007 - 2008, Intel Corporation.
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# Copyright (c) 2007 - 2008, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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#/** @file
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# Instance of PCI Library based on PCI CF8 Library.
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# Instance of PCI Library based on PCI CF8 Library.
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#
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# PCI Library that uses I/O ports 0xCF8 and 0xCFC to perform
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# PCI Library that uses I/O ports 0xCF8 and 0xCFC to perform
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# PCI Configuration cycles. Layers on top of one PCI CF8 Library instance.
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#
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# Copyright (c) 2007 - 2008, Intel Corporation.
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# Copyright (c) 2007 - 2008, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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#/** @file
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# Instance of PCI Library based on PCI Express Library.
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# Instance of PCI Library based on PCI Express Library.
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#
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# PCI Library that uses the 256 MB PCI Express MMIO window to perform PCI
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# PCI Library that uses the 256 MB PCI Express MMIO window to perform PCI
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# Configuration cycles. Layers on one PCI Express Library instance.
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#
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# Copyright (c) 2007 - 2008, Intel Corporation.
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# Copyright (c) 2007 - 2008, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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#/** @file
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# PE/COFF Entry Point Library implementation.
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# PE/COFF Entry Point Library implementation.
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#
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# Copyright (c) 2007 - 2008, Intel Corporation.
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# Copyright (c) 2007 - 2008, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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#/** @file
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# PE/COFF Loader Library implementation.
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# PE/COFF Loader Library implementation.
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#
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# Copyright (c) 2006 - 2008, Intel Corporation.
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# Copyright (c) 2006 - 2008, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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#/** @file
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# Instance of Performance Library based on Base Library.
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# Instance of Performance Library based on Base Library.
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#
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# Performance Library that layers on top of the Base Library to measure start
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# Performance Library that layers on top of the Base Library to measure start
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# and end times using CPU specific timer services if they are available.
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#
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# Copyright (c) 2007 - 2008, Intel Corporation.
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# Copyright (c) 2007 - 2008, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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#/** @file
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# Instance of Post Code Library based on Debug Library.
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# Instance of Post Code Library based on Debug Library.
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#
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# Post Code Library that layers on top of a Debug Library instance.
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# Post Code Library that layers on top of a Debug Library instance.
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#
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# Copyright (c) 2007 - 2008, Intel Corporation.
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# Copyright (c) 2007 - 2008, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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#/** @file
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# Instance of Post Code Library using I/O port 0x80.
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# Instance of Post Code Library using I/O port 0x80.
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#
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# Post Code Library that writes post code values to I/O port 0x80.
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# Post Code Library that writes post code values to I/O port 0x80.
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#
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# Copyright (c) 2007 - 2008, Intel Corporation.
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# Copyright (c) 2007 - 2008, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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#/** @file
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# Print Library implementation.
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# Print Library implementation.
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#
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# Copyright (c) 2007 - 2008, Intel Corporation.
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# Copyright (c) 2007 - 2008, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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#/** @file
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# NULL instance of Timer Library as a template.
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# NULL instance of Timer Library as a template.
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#
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# A non-functional instance of the Timer Library that can be used as a template
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# A non-functional instance of the Timer Library that can be used as a template
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# for the implementation of a functional timer library instance. This library instance can
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# also be used to test build DXE, Runtime, DXE SAL, and DXE SMM modules that require timer
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# services as well as EBC modules that require timer services.
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#
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# Copyright (c) 2007 - 2008, Intel Corporation.
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# Copyright (c) 2007 - 2008, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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}
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for (Index = 0; Index < NumOfChar; Index++) {
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ASSERT (BitLen[Index] != 0);
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Count[BitLen[Index]]++;
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}
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#/** @file
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# UEFI Decompress Library implementation.
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# UEFI Decompress Library implementation.
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#
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# Copyright (c) 2007 - 2008, Intel Corporation.
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# Copyright (c) 2007 - 2008, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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