mirror of https://github.com/acidanthera/audk.git
Update SMBIOS.h to SMBIOS 2.6.1 version.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9892 6f19259b-4bc3-4df7-8a09-765794883524
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li-elvin
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@ -1,7 +1,7 @@
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/** @file
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Industry Standard Definitions of SMBIOS Table Specification v2.6
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Industry Standard Definitions of SMBIOS Table Specification v2.6.1
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Copyright (c) 2006 - 2009, Intel Corporation All rights
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Copyright (c) 2006 - 2010, Intel Corporation All rights
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reserved. This program and the accompanying materials are
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licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -409,6 +409,10 @@ typedef enum {
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ProcessorFamilyPowerPC620 = 0x25,
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ProcessorFamilyPowerPCx704 = 0x26,
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ProcessorFamilyPowerPC750 = 0x27,
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ProcessorFamilyIntelCoreDuo = 0x28,
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ProcessorFamilyIntelCoreDuoMobile = 0x29,
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ProcessorFamilyIntelCoreSoloMobile = 0x2A,
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ProcessorFamilyIntelAtom = 0x2B,
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ProcessorFamilyAlpha3 = 0x30,
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ProcessorFamilyAlpha21064 = 0x31,
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ProcessorFamilyAlpha21066 = 0x32,
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@ -451,6 +455,12 @@ typedef enum {
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ProcessorFamilyDualCoreAmdOpteron = 0x87,
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ProcessorFamilyAmdAthlon64X2DualCore = 0x88,
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ProcessorFamilyAmdTurion64X2Mobile = 0x89,
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ProcessorFamilyQuadCoreAmdOpteron = 0x8A,
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ProcessorFamilyThirdGenerationAmdOpteron = 0x8B,
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ProcessorFamilyAmdPhenomFxQuadCore = 0x8C,
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ProcessorFamilyAmdPhenomX4QuadCore = 0x8D,
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ProcessorFamilyAmdPhenomX2DualCore = 0x8E,
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ProcessorFamilyAmdAthlonX2DualCore = 0x8F,
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ProcessorFamilyPARISC = 0x90,
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ProcessorFamilyPaRisc8500 = 0x91,
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ProcessorFamilyPaRisc8000 = 0x92,
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@ -459,6 +469,21 @@ typedef enum {
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ProcessorFamilyPaRisc7100LC = 0x95,
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ProcessorFamilyPaRisc7100 = 0x96,
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ProcessorFamilyV30 = 0xA0,
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ProcessorFamilyQuadCoreIntelXeon3200Series = 0xA1,
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ProcessorFamilyDualCoreIntelXeon3000Series = 0xA2,
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ProcessorFamilyQuadCoreIntelXeon5300Series = 0xA3,
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ProcessorFamilyDualCoreIntelXeon5100Series = 0xA4,
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ProcessorFamilyDualCoreIntelXeon5000Series = 0xA5,
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ProcessorFamilyDualCoreIntelXeonLV = 0xA6,
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ProcessorFamilyDualCoreIntelXeonULV = 0xA7,
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ProcessorFamilyDualCoreIntelXeon7100Series = 0xA8,
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ProcessorFamilyQuadCoreIntelXeon5400Series = 0xA9,
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ProcessorFamilyQuadCoreIntelXeon = 0xAA,
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ProcessorFamilyDualCoreIntelXeon5200Series = 0xAB,
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ProcessorFamilyDualCoreIntelXeon7200Series = 0xAC,
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ProcessorFamilyQuadCoreIntelXeon7300Series = 0xAD,
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ProcessorFamilyQuadCoreIntelXeon7400Series = 0xAE,
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ProcessorFamilyMultiCoreIntelXeon7400Series = 0xAF,
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ProcessorFamilyPentiumIIIXeon = 0xB0,
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ProcessorFamilyPentiumIIISpeedStep = 0xB1,
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ProcessorFamilyPentium4 = 0xB2,
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@ -475,6 +500,14 @@ typedef enum {
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ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 correct this value
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ProcessorFamilyReserved = 0xBE,
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ProcessorFamilyIntelCore2 = 0xBF,
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ProcessorFamilyIntelCore2Solo = 0xC0,
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ProcessorFamilyIntelCore2Extreme = 0xC1,
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ProcessorFamilyIntelCore2Quad = 0xC2,
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ProcessorFamilyIntelCore2ExtremeMobile = 0xC3,
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ProcessorFamilyIntelCore2DuoMobile = 0xC4,
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ProcessorFamilyIntelCore2SoloMobile = 0xC5,
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ProcessorFamilyIntelCoreI7 = 0xC6,
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ProcessorFamilyDualCoreIntelCeleron = 0xC7,
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ProcessorFamilyIBM390 = 0xC8,
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ProcessorFamilyG4 = 0xC9,
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ProcessorFamilyG5 = 0xCA,
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@ -484,6 +517,20 @@ typedef enum {
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ProcessorFamilyViaC7D = 0xD3,
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ProcessorFamilyViaC7 = 0xD4,
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ProcessorFamilyViaEden = 0xD5,
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ProcessorFamilyMultiCoreIntelXeon = 0xD6,
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ProcessorFamilyDualCoreIntelXeon3Series = 0xD7,
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ProcessorFamilyQuadCoreIntelXeon3Series = 0xD8,
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ProcessorFamilyDualCoreIntelXeon5Series = 0xDA,
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ProcessorFamilyQuadCoreIntelXeon5Series = 0xDB,
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ProcessorFamilyDualCoreIntelXeon7Series = 0xDD,
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ProcessorFamilyQuadCoreIntelXeon7Series = 0xDE,
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ProcessorFamilyMultiCoreIntelXeon7Series = 0xDF,
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ProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6,
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ProcessorFamilyAmdPhenomTripleCore = 0xE7,
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ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8,
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ProcessorFamilyAmdTurionDualCoreMobile = 0xE9,
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ProcessorFamilyAmdAthlonDualCore = 0xEA,
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ProcessorFamilyAmdSempronSI = 0xEB,
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ProcessorFamilyi860 = 0xFA,
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ProcessorFamilyi960 = 0xFB,
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ProcessorFamilyIndicatorFamily2 = 0xFE,
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@ -529,7 +576,8 @@ typedef enum {
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ProcessorUpgradeSocketLGA775 = 0x15,
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ProcessorUpgradeSocketS1 = 0x16,
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ProcessorUpgradeAM2 = 0x17,
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ProcessorUpgradeF1207 = 0x18
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ProcessorUpgradeF1207 = 0x18,
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ProcessorSocketLGA1366 = 0x19
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} PROCESSOR_UPGRADE;
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///
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@ -802,7 +850,11 @@ typedef enum {
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CacheAssociativityFully = 0x06,
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CacheAssociativity8Way = 0x07,
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CacheAssociativity16Way = 0x08,
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CacheAssociativity24Way = 0x09
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CacheAssociativity12Way = 0x09,
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CacheAssociativity24Way = 0x0A,
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CacheAssociativity32Way = 0x0B,
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CacheAssociativity48Way = 0x0C,
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CacheAssociativity64Way = 0x0D
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} CACHE_ASSOCIATIVITY_DATA;
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///
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@ -963,7 +1015,13 @@ typedef enum {
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SlotTypePciExpressX2 = 0xA7,
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SlotTypePciExpressX4 = 0xA8,
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SlotTypePciExpressX8 = 0xA9,
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SlotTypePciExpressX16 = 0xAA
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SlotTypePciExpressX16 = 0xAA,
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SlotTypePciExpressGen2 = 0xAB,
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SlotTypePciExpressGen2X1 = 0xAC,
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SlotTypePciExpressGen2X2 = 0xAD,
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SlotTypePciExpressGen2X4 = 0xAE,
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SlotTypePciExpressGen2X8 = 0xAF,
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SlotTypePciExpressGen2X16 = 0xB0
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} MISC_SLOT_TYPE;
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///
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@ -1330,7 +1388,9 @@ typedef enum {
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MemoryTypeRdram = 0x11,
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MemoryTypeDdr = 0x12,
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MemoryTypeDdr2 = 0x13,
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MemoryTypeDdr2FbDimm = 0x14
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MemoryTypeDdr2FbDimm = 0x14,
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MemoryTypeDdr3 = 0x18,
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MemoryTypeFbd2 = 0x19
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} MEMORY_DEVICE_TYPE;
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typedef struct {
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