mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg/CpuExceptionHandlerLib: Avoid calling PEI services from AP
When an exception happens in AP, system hangs at
GetPeiServicesTablePointer(), complaining the PeiServices retrieved
from memory before IDT is NULL.
Due to the following commit:
c563077a38
* UefiCpuPkg/MpInitLib: Avoid calling PEI services from AP
the IDT used by AP no longer preserve PeiServices pointer in the
very beginning.
But the implementation of PeiExceptionHandlerLib still assumes
the PeiServices pointer is there, so the assertion happens.
The patch fixes the exception handler library to not call
PEI services from AP.
The patch duplicates the #0 exception stub header in an allocated
pool but with extra 4-byte/8-byte to store the exception handler
data which was originally stored in HOB.
When AP exception happens, the code gets the exception handler data
from the exception handler for #0.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Fan Jeff <vanjeff_919@hotmail.com>
This commit is contained in:
parent
87a9dd0d15
commit
374168ae65
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@ -1,7 +1,7 @@
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/** @file
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Common header file for CPU Exception Handler Library.
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Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2012 - 2018, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -43,11 +43,6 @@
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#include "ArchInterruptDefs.h"
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#define CPU_EXCEPTION_HANDLER_LIB_HOB_GUID \
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{ \
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0xb21d9148, 0x9211, 0x4d8f, { 0xad, 0xd3, 0x66, 0xb1, 0x89, 0xc9, 0x2c, 0x83 } \
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}
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#define CPU_STACK_SWITCH_EXCEPTION_NUMBER \
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FixedPcdGetSize (PcdCpuStackSwitchExceptionList)
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@ -1,7 +1,7 @@
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/** @file
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CPU exception handler library implementation for PEIM module.
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Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials are licensed and made available under
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the terms and conditions of the BSD License that accompanies this distribution.
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The full text of the license may be found at
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@ -20,10 +20,17 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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CONST UINTN mDoFarReturnFlag = 0;
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EFI_GUID mCpuExceptrionHandlerLibHobGuid = CPU_EXCEPTION_HANDLER_LIB_HOB_GUID;
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typedef struct {
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UINT8 ExceptionStubHeader[HOOKAFTER_STUB_SIZE];
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EXCEPTION_HANDLER_DATA *ExceptionHandlerData;
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} EXCEPTION0_STUB_HEADER;
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/**
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Get exception handler data pointer from GUIDed HOb.
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Get exception handler data pointer from IDT[0].
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The exception #0 stub header is duplicated in an allocated pool with extra 4-byte/8-byte to store the
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exception handler data. The new allocated memory layout follows structure EXCEPTION0_STUB_HEADER.
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The code assumes that all processors uses the same exception handler for #0 exception.
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@return pointer to exception handler data.
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**/
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@ -32,18 +39,50 @@ GetExceptionHandlerData (
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VOID
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)
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{
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EFI_HOB_GUID_TYPE *GuidHob;
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VOID *DataInHob;
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EXCEPTION_HANDLER_DATA *ExceptionHandlerData;
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IA32_DESCRIPTOR IdtDescriptor;
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IA32_IDT_GATE_DESCRIPTOR *IdtTable;
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EXCEPTION0_STUB_HEADER *Exception0StubHeader;
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ExceptionHandlerData = NULL;
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GuidHob = GetFirstGuidHob (&mCpuExceptrionHandlerLibHobGuid);
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if (GuidHob != NULL) {
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DataInHob = GET_GUID_HOB_DATA (GuidHob);
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ExceptionHandlerData = (EXCEPTION_HANDLER_DATA *)(*(UINTN *)DataInHob);
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}
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ASSERT (ExceptionHandlerData != NULL);
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return ExceptionHandlerData;
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AsmReadIdtr (&IdtDescriptor);
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IdtTable = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor.Base;
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Exception0StubHeader = (EXCEPTION0_STUB_HEADER *)ArchGetIdtHandler (&IdtTable[0]);
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return Exception0StubHeader->ExceptionHandlerData;
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}
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/**
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Set exception handler data pointer to IDT[0].
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The exception #0 stub header is duplicated in an allocated pool with extra 4-byte/8-byte to store the
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exception handler data. The new allocated memory layout follows structure EXCEPTION0_STUB_HEADER.
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The code assumes that all processors uses the same exception handler for #0 exception.
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@param pointer to exception handler data.
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**/
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VOID
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SetExceptionHandlerData (
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IN EXCEPTION_HANDLER_DATA *ExceptionHandlerData
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)
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{
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EXCEPTION0_STUB_HEADER *Exception0StubHeader;
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IA32_DESCRIPTOR IdtDescriptor;
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IA32_IDT_GATE_DESCRIPTOR *IdtTable;
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//
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// Duplicate the exception #0 stub header in pool and cache the ExceptionHandlerData just after the stub header.
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// So AP can get the ExceptionHandlerData by reading the IDT[0].
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//
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AsmReadIdtr (&IdtDescriptor);
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IdtTable = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor.Base;
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Exception0StubHeader = AllocatePool (sizeof (*Exception0StubHeader));
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ASSERT (Exception0StubHeader != NULL);
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CopyMem (
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Exception0StubHeader->ExceptionStubHeader,
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(VOID *)ArchGetIdtHandler (&IdtTable[0]),
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sizeof (Exception0StubHeader->ExceptionStubHeader)
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);
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Exception0StubHeader->ExceptionHandlerData = ExceptionHandlerData;
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ArchUpdateIdtEntry (&IdtTable[0], (UINTN)Exception0StubHeader->ExceptionStubHeader);
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}
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/**
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@ -109,15 +148,7 @@ InitializeCpuExceptionHandlers (
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return Status;
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}
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//
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// Build location of CPU MP DATA buffer in HOB
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//
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BuildGuidDataHob (
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&mCpuExceptrionHandlerLibHobGuid,
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(VOID *)&ExceptionHandlerData,
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sizeof(UINT64)
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);
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SetExceptionHandlerData (ExceptionHandlerData);
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return EFI_SUCCESS;
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}
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