From 38c8be123aced4cc8ad5c7e0da9121a181b94251 Mon Sep 17 00:00:00 2001 From: Dandan Bi Date: Fri, 12 Mar 2021 10:26:10 +0800 Subject: [PATCH] MdePkg/IoLib: Filter/trace port IO/MMIO access REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3246 Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Signed-off-by: Dandan Bi Reviewed-by: Michael D Kinney Reviewed-by: Liming Gao Acked-by: Ard Biesheuvel --- .../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 3 +- .../BaseIoLibIntrinsicArmVirt.inf | 3 +- .../BaseIoLibIntrinsicInternal.h | 3 +- .../BaseIoLibIntrinsicSev.inf | 3 +- MdePkg/Library/BaseIoLibIntrinsic/IoLib.c | 95 ++++++++++++++----- .../Library/BaseIoLibIntrinsic/IoLibArmVirt.c | 82 ++++++++++++++-- MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c | 58 +++++++++-- MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c | 81 ++++++++++++---- MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c | 74 +++++++++++++-- 9 files changed, 329 insertions(+), 73 deletions(-) diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf index 690b95d440..97eeada065 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf +++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf @@ -7,7 +7,7 @@ # ASSERT(). For ARM, AARCH64 and RISCV64, this I/O library only provides non I/O # read and write. # -# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
+# Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
# Copyright (c) 2017, AMD Incorporated. All rights reserved.
# Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.
@@ -66,4 +66,5 @@ [LibraryClasses] DebugLib BaseLib + RegisterFilterLib diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf index ad68f841fb..cea6857926 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf +++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf @@ -1,7 +1,7 @@ ## @file # Instance of I/O Library using KVM/ARM safe assembler routines # -# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.
+# Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
# Copyright (c) 2017, AMD Incorporated. All rights reserved.
# Copyright (c) 2018, Linaro, Ltd. All rights reserved.
@@ -44,3 +44,4 @@ [LibraryClasses] DebugLib BaseLib + RegisterFilterLib diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicInternal.h b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicInternal.h index 1aae45fa8a..79b2eb3e7b 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicInternal.h +++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicInternal.h @@ -3,7 +3,7 @@ This file includes package header files, dependent library classes. - Copyright (c) 2007 - 2008, Intel Corporation. All rights reserved.
+ Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -17,5 +17,6 @@ #include #include #include +#include #endif diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicSev.inf b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicSev.inf index 86a07e60f8..34f9d1d106 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicSev.inf +++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicSev.inf @@ -4,7 +4,7 @@ # I/O Library that uses compiler intrinsics to perform IN and OUT instructions # for IA-32 and x64. # -# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
+# Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
# Copyright (c) 2017, AMD Incorporated. All rights reserved.
# @@ -49,4 +49,5 @@ [LibraryClasses] DebugLib BaseLib + RegisterFilterLib diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c index a6bbc92546..d0d7044f09 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c @@ -1,7 +1,7 @@ /** @file Common I/O Library routines. - Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -82,10 +82,15 @@ MmioRead8 ( ) { UINT8 Value; + BOOLEAN Flag; - MemoryFence (); - Value = *(volatile UINT8*)Address; - MemoryFence (); + Flag = FilterBeforeMmIoRead (FilterWidth8, Address, &Value); + if (Flag) { + MemoryFence (); + Value = *(volatile UINT8*)Address; + MemoryFence (); + } + FilterAfterMmIoRead (FilterWidth8, Address, &Value); return Value; } @@ -112,9 +117,15 @@ MmioWrite8 ( IN UINT8 Value ) { - MemoryFence (); - *(volatile UINT8*)Address = Value; - MemoryFence (); + BOOLEAN Flag; + + Flag = FilterBeforeMmIoWrite (FilterWidth8, Address, &Value); + if (Flag) { + MemoryFence (); + *(volatile UINT8*)Address = Value; + MemoryFence (); + } + FilterAfterMmIoWrite (FilterWidth8, Address, &Value); return Value; } @@ -141,12 +152,16 @@ MmioRead16 ( ) { UINT16 Value; + BOOLEAN Flag; ASSERT ((Address & 1) == 0); - - MemoryFence (); - Value = *(volatile UINT16*)Address; - MemoryFence (); + Flag = FilterBeforeMmIoRead (FilterWidth16, Address, &Value); + if (Flag) { + MemoryFence (); + Value = *(volatile UINT16*)Address; + MemoryFence (); + } + FilterAfterMmIoRead (FilterWidth16, Address, &Value); return Value; } @@ -174,11 +189,17 @@ MmioWrite16 ( IN UINT16 Value ) { + BOOLEAN Flag; + ASSERT ((Address & 1) == 0); - MemoryFence (); - *(volatile UINT16*)Address = Value; - MemoryFence (); + Flag = FilterBeforeMmIoWrite (FilterWidth16, Address, &Value); + if (Flag) { + MemoryFence (); + *(volatile UINT16*)Address = Value; + MemoryFence (); + } + FilterAfterMmIoWrite (FilterWidth16, Address, &Value); return Value; } @@ -205,12 +226,17 @@ MmioRead32 ( ) { UINT32 Value; + BOOLEAN Flag; ASSERT ((Address & 3) == 0); - MemoryFence (); - Value = *(volatile UINT32*)Address; - MemoryFence (); + Flag = FilterBeforeMmIoRead (FilterWidth32, Address, &Value); + if (Flag) { + MemoryFence (); + Value = *(volatile UINT32*)Address; + MemoryFence (); + } + FilterAfterMmIoRead (FilterWidth32, Address, &Value); return Value; } @@ -238,11 +264,17 @@ MmioWrite32 ( IN UINT32 Value ) { + BOOLEAN Flag; + ASSERT ((Address & 3) == 0); - MemoryFence (); - *(volatile UINT32*)Address = Value; - MemoryFence (); + Flag = FilterBeforeMmIoWrite (FilterWidth32, Address, &Value); + if (Flag) { + MemoryFence (); + *(volatile UINT32*)Address = Value; + MemoryFence (); + } + FilterAfterMmIoWrite (FilterWidth32, Address, &Value); return Value; } @@ -269,12 +301,17 @@ MmioRead64 ( ) { UINT64 Value; + BOOLEAN Flag; ASSERT ((Address & 7) == 0); - MemoryFence (); - Value = *(volatile UINT64*)Address; - MemoryFence (); + Flag = FilterBeforeMmIoRead (FilterWidth64, Address, &Value); + if (Flag) { + MemoryFence (); + Value = *(volatile UINT64*)Address; + MemoryFence (); + } + FilterAfterMmIoRead (FilterWidth64, Address, &Value); return Value; } @@ -300,11 +337,17 @@ MmioWrite64 ( IN UINT64 Value ) { + BOOLEAN Flag; + ASSERT ((Address & 7) == 0); - MemoryFence (); - *(volatile UINT64*)Address = Value; - MemoryFence (); + Flag = FilterBeforeMmIoWrite (FilterWidth64, Address, &Value); + if (Flag) { + MemoryFence (); + *(volatile UINT64*)Address = Value; + MemoryFence (); + } + FilterAfterMmIoWrite (FilterWidth64, Address, &Value); return Value; } diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArmVirt.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArmVirt.c index 9715705ee0..6140840769 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArmVirt.c +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArmVirt.c @@ -1,7 +1,7 @@ /** @file I/O Library for ARM. - Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.
+ Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
Copyright (c) 2017, AMD Incorporated. All rights reserved.
Copyright (c) 2018, Linaro, Ltd. All rights reserved.
@@ -546,7 +546,16 @@ MmioRead8 ( IN UINTN Address ) { - return MmioRead8Internal (Address); + UINT8 Value; + BOOLEAN Flag; + + Flag = FilterBeforeMmIoRead (FilterWidth8, Address, &Value); + if (Flag) { + Value = MmioRead8Internal (Address); + } + FilterAfterMmIoRead (FilterWidth8, Address, &Value); + + return Value; } /** @@ -569,7 +578,14 @@ MmioWrite8 ( IN UINT8 Value ) { - MmioWrite8Internal (Address, Value); + BOOLEAN Flag; + + Flag = FilterBeforeMmIoWrite (FilterWidth8, Address, &Value); + if (Flag) { + MmioWrite8Internal (Address, Value); + } + FilterAfterMmIoWrite (FilterWidth8, Address, &Value); + return Value; } @@ -593,9 +609,18 @@ MmioRead16 ( IN UINTN Address ) { + BOOLEAN Flag; + UINT16 Value; + ASSERT ((Address & 1) == 0); - return MmioRead16Internal (Address); + Flag = FilterBeforeMmIoRead (FilterWidth16, Address, &Value); + if (Flag) { + Value = MmioRead16Internal (Address); + } + FilterAfterMmIoRead (FilterWidth16, Address, &Value); + + return Value; } /** @@ -618,9 +643,16 @@ MmioWrite16 ( IN UINT16 Value ) { + BOOLEAN Flag; + ASSERT ((Address & 1) == 0); - MmioWrite16Internal (Address, Value); + Flag = FilterBeforeMmIoWrite (FilterWidth16, Address, &Value); + if (Flag) { + MmioWrite16Internal (Address, Value); + } + FilterAfterMmIoWrite (FilterWidth16, Address, &Value); + return Value; } @@ -644,9 +676,18 @@ MmioRead32 ( IN UINTN Address ) { + BOOLEAN Flag; + UINT32 Value; + ASSERT ((Address & 3) == 0); - return MmioRead32Internal (Address); + Flag = FilterBeforeMmIoRead (FilterWidth32, Address, &Value); + if (Flag) { + Value = MmioRead32Internal (Address); + } + FilterAfterMmIoRead (FilterWidth32, Address, &Value); + + return Value; } /** @@ -669,9 +710,16 @@ MmioWrite32 ( IN UINT32 Value ) { + BOOLEAN Flag; + ASSERT ((Address & 3) == 0); - MmioWrite32Internal (Address, Value); + Flag = FilterBeforeMmIoWrite (FilterWidth32, Address, &Value); + if (Flag) { + MmioWrite32Internal (Address, Value); + } + FilterAfterMmIoWrite (FilterWidth32, Address, &Value); + return Value; } @@ -695,9 +743,18 @@ MmioRead64 ( IN UINTN Address ) { + BOOLEAN Flag; + UINT64 Value; + ASSERT ((Address & 7) == 0); - return MmioRead64Internal (Address); + Flag = FilterBeforeMmIoRead (FilterWidth64, Address, &Value); + if (Flag) { + Value = MmioRead64Internal (Address); + } + FilterAfterMmIoRead (FilterWidth64, Address, &Value); + + return Value; } /** @@ -720,8 +777,15 @@ MmioWrite64 ( IN UINT64 Value ) { + BOOLEAN Flag; + ASSERT ((Address & 7) == 0); - MmioWrite64Internal (Address, Value); + Flag = FilterBeforeMmIoWrite (FilterWidth64, Address, &Value); + if (Flag) { + MmioWrite64Internal (Address, Value); + } + FilterAfterMmIoWrite (FilterWidth64, Address, &Value); + return Value; } diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c index b3a1a20256..ecf9ed6191 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c @@ -10,7 +10,7 @@ We don't advocate putting compiler specifics in libraries or drivers but there is no other way to make this work. - Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -39,8 +39,14 @@ IoRead8 ( ) { UINT8 Data; + BOOLEAN Flag; + + Flag = FilterBeforeIoRead (FilterWidth8, Port, &Data); + if (Flag) { + __asm__ __volatile__ ("inb %w1,%b0" : "=a" (Data) : "d" ((UINT16)Port)); + } + FilterAfterIoRead (FilterWidth8, Port, &Data); - __asm__ __volatile__ ("inb %w1,%b0" : "=a" (Data) : "d" ((UINT16)Port)); return Data; } @@ -66,7 +72,14 @@ IoWrite8 ( IN UINT8 Value ) { - __asm__ __volatile__ ("outb %b0,%w1" : : "a" (Value), "d" ((UINT16)Port)); + BOOLEAN Flag; + + Flag = FilterBeforeIoWrite (FilterWidth8, Port, &Value); + if (Flag) { + __asm__ __volatile__ ("outb %b0,%w1" : : "a" (Value), "d" ((UINT16)Port)); + } + FilterAfterIoWrite (FilterWidth8, Port, &Value); + return Value;; } @@ -92,9 +105,16 @@ IoRead16 ( ) { UINT16 Data; + BOOLEAN Flag; ASSERT ((Port & 1) == 0); - __asm__ __volatile__ ("inw %w1,%w0" : "=a" (Data) : "d" ((UINT16)Port)); + + Flag = FilterBeforeIoRead (FilterWidth16, Port, &Data); + if (Flag) { + __asm__ __volatile__ ("inw %w1,%w0" : "=a" (Data) : "d" ((UINT16)Port)); + } + FilterAfterIoRead (FilterWidth16, Port, &Data); + return Data; } @@ -121,8 +141,17 @@ IoWrite16 ( IN UINT16 Value ) { + + BOOLEAN Flag; + ASSERT ((Port & 1) == 0); - __asm__ __volatile__ ("outw %w0,%w1" : : "a" (Value), "d" ((UINT16)Port)); + + Flag = FilterBeforeIoWrite (FilterWidth16, Port, &Value); + if (Flag) { + __asm__ __volatile__ ("outw %w0,%w1" : : "a" (Value), "d" ((UINT16)Port)); + } + FilterAfterIoWrite (FilterWidth16, Port, &Value); + return Value;; } @@ -148,9 +177,16 @@ IoRead32 ( ) { UINT32 Data; + BOOLEAN Flag; ASSERT ((Port & 3) == 0); - __asm__ __volatile__ ("inl %w1,%0" : "=a" (Data) : "d" ((UINT16)Port)); + + Flag = FilterBeforeIoRead (FilterWidth32, Port, &Data); + if (Flag) { + __asm__ __volatile__ ("inl %w1,%0" : "=a" (Data) : "d" ((UINT16)Port)); + } + FilterAfterIoRead (FilterWidth32, Port, &Data); + return Data; } @@ -177,8 +213,16 @@ IoWrite32 ( IN UINT32 Value ) { + BOOLEAN Flag; + ASSERT ((Port & 3) == 0); - __asm__ __volatile__ ("outl %0,%w1" : : "a" (Value), "d" ((UINT16)Port)); + + Flag = FilterBeforeIoWrite (FilterWidth32, Port, &Value); + if (Flag) { + __asm__ __volatile__ ("outl %0,%w1" : : "a" (Value), "d" ((UINT16)Port)); + } + FilterAfterIoWrite (FilterWidth32, Port, &Value); + return Value; } diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c index 769dddfce2..d2bc5f527c 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c @@ -8,7 +8,7 @@ We don't advocate putting compiler specifics in libraries or drivers but there is no other way to make this work. - Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -66,10 +66,16 @@ IoRead8 ( ) { UINT8 Value; + BOOLEAN Flag; + + Flag = FilterBeforeIoRead (FilterWidth8, Port, &Value); + if (Flag) { + _ReadWriteBarrier (); + Value = (UINT8)_inp ((UINT16)Port); + _ReadWriteBarrier (); + } + FilterAfterIoRead (FilterWidth8, Port, &Value); - _ReadWriteBarrier (); - Value = (UINT8)_inp ((UINT16)Port); - _ReadWriteBarrier (); return Value; } @@ -95,9 +101,16 @@ IoWrite8 ( IN UINT8 Value ) { - _ReadWriteBarrier (); - (UINT8)_outp ((UINT16)Port, Value); - _ReadWriteBarrier (); + BOOLEAN Flag; + + Flag = FilterBeforeIoWrite(FilterWidth8, Port, &Value); + if (Flag) { + _ReadWriteBarrier (); + (UINT8)_outp ((UINT16)Port, Value); + _ReadWriteBarrier (); + } + FilterAfterIoWrite (FilterWidth8, Port, &Value); + return Value; } @@ -123,11 +136,18 @@ IoRead16 ( ) { UINT16 Value; + BOOLEAN Flag; ASSERT ((Port & 1) == 0); - _ReadWriteBarrier (); - Value = _inpw ((UINT16)Port); - _ReadWriteBarrier (); + + Flag = FilterBeforeIoRead (FilterWidth16, Port, &Value); + if (Flag) { + _ReadWriteBarrier (); + Value = _inpw ((UINT16)Port); + _ReadWriteBarrier (); + } + FilterBeforeIoRead (FilterWidth16, Port, &Value); + return Value; } @@ -154,10 +174,18 @@ IoWrite16 ( IN UINT16 Value ) { + BOOLEAN Flag; + ASSERT ((Port & 1) == 0); - _ReadWriteBarrier (); - _outpw ((UINT16)Port, Value); - _ReadWriteBarrier (); + + Flag = FilterBeforeIoWrite(FilterWidth16, Port, &Value); + if (Flag) { + _ReadWriteBarrier (); + _outpw ((UINT16)Port, Value); + _ReadWriteBarrier (); + } + FilterAfterIoWrite (FilterWidth16, Port, &Value); + return Value; } @@ -183,11 +211,18 @@ IoRead32 ( ) { UINT32 Value; + BOOLEAN Flag; ASSERT ((Port & 3) == 0); - _ReadWriteBarrier (); - Value = _inpd ((UINT16)Port); - _ReadWriteBarrier (); + + Flag = FilterBeforeIoRead(FilterWidth32, Port, &Value); + if (Flag) { + _ReadWriteBarrier (); + Value = _inpd ((UINT16)Port); + _ReadWriteBarrier (); + } + FilterAfterIoRead (FilterWidth32, Port, &Value); + return Value; } @@ -214,9 +249,17 @@ IoWrite32 ( IN UINT32 Value ) { + BOOLEAN Flag; + ASSERT ((Port & 3) == 0); - _ReadWriteBarrier (); - _outpd ((UINT16)Port, Value); - _ReadWriteBarrier (); + + Flag = FilterBeforeIoWrite(FilterWidth32, Port, &Value); + if (Flag) { + _ReadWriteBarrier (); + _outpd ((UINT16)Port, Value); + _ReadWriteBarrier (); + } + FilterAfterIoWrite (FilterWidth32, Port, &Value); + return Value; } diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c index a107136a74..291cd86eaa 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c @@ -2,7 +2,7 @@ I/O library for non I/O read and write access (memory map I/O read and write only) architecture, such as ARM and RISC-V processor. - Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
Copyright (c) 2017, AMD Incorporated. All rights reserved.
Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.
@@ -408,8 +408,14 @@ MmioRead8 ( ) { UINT8 Value; + BOOLEAN Flag; + + Flag = FilterBeforeMmIoRead (FilterWidth8, Address, &Value); + if (Flag) { + Value = *(volatile UINT8*)Address; + } + FilterAfterMmIoRead (FilterWidth8, Address, &Value); - Value = *(volatile UINT8*)Address; return Value; } @@ -433,7 +439,14 @@ MmioWrite8 ( IN UINT8 Value ) { - *(volatile UINT8*)Address = Value; + BOOLEAN Flag; + + Flag = FilterBeforeMmIoWrite (FilterWidth8, Address, &Value); + if (Flag) { + *(volatile UINT8*)Address = Value; + } + FilterAfterMmIoWrite (FilterWidth8, Address, &Value); + return Value; } @@ -458,9 +471,16 @@ MmioRead16 ( ) { UINT16 Value; + BOOLEAN Flag; ASSERT ((Address & 1) == 0); - Value = *(volatile UINT16*)Address; + + Flag = FilterBeforeMmIoRead (FilterWidth16, Address, &Value); + if (Flag) { + Value = *(volatile UINT16*)Address; + } + FilterAfterMmIoRead (FilterWidth16, Address, &Value); + return Value; } @@ -484,8 +504,16 @@ MmioWrite16 ( IN UINT16 Value ) { + BOOLEAN Flag; + ASSERT ((Address & 1) == 0); - *(volatile UINT16*)Address = Value; + + Flag = FilterBeforeMmIoWrite (FilterWidth16, Address, &Value); + if (Flag) { + *(volatile UINT16*)Address = Value; + } + FilterAfterMmIoWrite (FilterWidth16, Address, &Value); + return Value; } @@ -510,9 +538,16 @@ MmioRead32 ( ) { UINT32 Value; + BOOLEAN Flag; ASSERT ((Address & 3) == 0); - Value = *(volatile UINT32*)Address; + + Flag = FilterBeforeMmIoRead (FilterWidth32, Address, &Value); + if (Flag) { + Value = *(volatile UINT32*)Address; + } + FilterAfterMmIoRead (FilterWidth32, Address, &Value); + return Value; } @@ -536,8 +571,16 @@ MmioWrite32 ( IN UINT32 Value ) { + BOOLEAN Flag; + ASSERT ((Address & 3) == 0); + + Flag = FilterBeforeMmIoWrite (FilterWidth32, Address, &Value); + if (Flag) { *(volatile UINT32*)Address = Value; + } + FilterAfterMmIoWrite (FilterWidth32, Address, &Value); + return Value; } @@ -562,9 +605,16 @@ MmioRead64 ( ) { UINT64 Value; + BOOLEAN Flag; ASSERT ((Address & 7) == 0); - Value = *(volatile UINT64*)Address; + + Flag = FilterBeforeMmIoRead (FilterWidth64, Address, &Value); + if (Flag) { + Value = *(volatile UINT64*)Address; + } + FilterAfterMmIoRead (FilterWidth64, Address, &Value); + return Value; } @@ -588,8 +638,16 @@ MmioWrite64 ( IN UINT64 Value ) { + BOOLEAN Flag; + ASSERT ((Address & 7) == 0); - *(volatile UINT64*)Address = Value; + + Flag = FilterBeforeMmIoWrite (FilterWidth64, Address, &Value); + if (Flag) { + *(volatile UINT64*)Address = Value; + } + FilterAfterMmIoWrite (FilterWidth64, Address, &Value); + return Value; }