mirror of https://github.com/acidanthera/audk.git
ArmPkg/ArmGic: Make the GicDxe driver depends on ArmGicLib (cont)
... and also rename the ArmGicLib sources to use an explicit 'Lib' suffix. The renaming did not work well with SVN. Files were missing from the initial commit. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15622 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Olivier Martin
oliviermartin
parent
e700a1fc91
commit
397bdc990b
|
|
@ -1,59 +0,0 @@
|
|||
/** @file
|
||||
*
|
||||
* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
|
||||
*
|
||||
* This program and the accompanying materials
|
||||
* are licensed and made available under the terms and conditions of the BSD License
|
||||
* which accompanies this distribution. The full text of the license may be found at
|
||||
* http://opensource.org/licenses/bsd-license.php
|
||||
*
|
||||
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
*
|
||||
**/
|
||||
|
||||
#include <Uefi.h>
|
||||
#include <Library/IoLib.h>
|
||||
#include <Library/ArmGicLib.h>
|
||||
#include <Library/PcdLib.h>
|
||||
|
||||
UINTN
|
||||
EFIAPI
|
||||
ArmGicGetMaxNumInterrupts (
|
||||
IN INTN GicDistributorBase
|
||||
)
|
||||
{
|
||||
return 32 * ((MmioRead32 (GicDistributorBase + ARM_GIC_ICDICTR) & 0x1F) + 1);
|
||||
}
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
ArmGicSendSgiTo (
|
||||
IN INTN GicDistributorBase,
|
||||
IN INTN TargetListFilter,
|
||||
IN INTN CPUTargetList,
|
||||
IN INTN SgiId
|
||||
)
|
||||
{
|
||||
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16) | SgiId);
|
||||
}
|
||||
|
||||
UINTN
|
||||
EFIAPI
|
||||
ArmGicAcknowledgeInterrupt (
|
||||
IN UINTN GicInterruptInterfaceBase
|
||||
)
|
||||
{
|
||||
// Read the Interrupt Acknowledge Register
|
||||
return MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
|
||||
}
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
ArmGicEndOfInterrupt (
|
||||
IN UINTN GicInterruptInterfaceBase,
|
||||
IN UINTN Source
|
||||
)
|
||||
{
|
||||
MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, Source);
|
||||
}
|
||||
|
|
@ -0,0 +1,122 @@
|
|||
/** @file
|
||||
*
|
||||
* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
|
||||
*
|
||||
* This program and the accompanying materials
|
||||
* are licensed and made available under the terms and conditions of the BSD License
|
||||
* which accompanies this distribution. The full text of the license may be found at
|
||||
* http://opensource.org/licenses/bsd-license.php
|
||||
*
|
||||
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
*
|
||||
**/
|
||||
|
||||
#include <Uefi.h>
|
||||
#include <Library/IoLib.h>
|
||||
#include <Library/ArmGicLib.h>
|
||||
#include <Library/PcdLib.h>
|
||||
|
||||
UINTN
|
||||
EFIAPI
|
||||
ArmGicGetInterfaceIdentification (
|
||||
IN INTN GicInterruptInterfaceBase
|
||||
)
|
||||
{
|
||||
// Read the GIC Identification Register
|
||||
return MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIIDR);
|
||||
}
|
||||
|
||||
UINTN
|
||||
EFIAPI
|
||||
ArmGicGetMaxNumInterrupts (
|
||||
IN INTN GicDistributorBase
|
||||
)
|
||||
{
|
||||
return 32 * ((MmioRead32 (GicDistributorBase + ARM_GIC_ICDICTR) & 0x1F) + 1);
|
||||
}
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
ArmGicSendSgiTo (
|
||||
IN INTN GicDistributorBase,
|
||||
IN INTN TargetListFilter,
|
||||
IN INTN CPUTargetList,
|
||||
IN INTN SgiId
|
||||
)
|
||||
{
|
||||
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16) | SgiId);
|
||||
}
|
||||
|
||||
UINTN
|
||||
EFIAPI
|
||||
ArmGicAcknowledgeInterrupt (
|
||||
IN UINTN GicInterruptInterfaceBase
|
||||
)
|
||||
{
|
||||
// Read the Interrupt Acknowledge Register
|
||||
return MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
|
||||
}
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
ArmGicEndOfInterrupt (
|
||||
IN UINTN GicInterruptInterfaceBase,
|
||||
IN UINTN Source
|
||||
)
|
||||
{
|
||||
MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, Source);
|
||||
}
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
ArmGicEnableInterrupt (
|
||||
IN UINTN GicDistributorBase,
|
||||
IN UINTN Source
|
||||
)
|
||||
{
|
||||
UINT32 RegOffset;
|
||||
UINTN RegShift;
|
||||
|
||||
// Calculate enable register offset and bit position
|
||||
RegOffset = Source / 32;
|
||||
RegShift = Source % 32;
|
||||
|
||||
// Write set-enable register
|
||||
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset), 1 << RegShift);
|
||||
}
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
ArmGicDisableInterrupt (
|
||||
IN UINTN GicDistributorBase,
|
||||
IN UINTN Source
|
||||
)
|
||||
{
|
||||
UINT32 RegOffset;
|
||||
UINTN RegShift;
|
||||
|
||||
// Calculate enable register offset and bit position
|
||||
RegOffset = Source / 32;
|
||||
RegShift = Source % 32;
|
||||
|
||||
// Write clear-enable register
|
||||
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDICER + (4 * RegOffset), 1 << RegShift);
|
||||
}
|
||||
|
||||
BOOLEAN
|
||||
EFIAPI
|
||||
ArmGicIsInterruptEnabled (
|
||||
IN UINTN GicDistributorBase,
|
||||
IN UINTN Source
|
||||
)
|
||||
{
|
||||
UINT32 RegOffset;
|
||||
UINTN RegShift;
|
||||
|
||||
// Calculate enable register offset and bit position
|
||||
RegOffset = Source / 32;
|
||||
RegShift = Source % 32;
|
||||
|
||||
return ((MmioRead32 (GicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset)) & (1 << RegShift)) != 0);
|
||||
}
|
||||
|
|
@ -1,6 +1,6 @@
|
|||
/** @file
|
||||
*
|
||||
* Copyright (c) 2011, ARM Limited. All rights reserved.
|
||||
* Copyright (c) 2014, ARM Limited. All rights reserved.
|
||||
*
|
||||
* This program and the accompanying materials
|
||||
* are licensed and made available under the terms and conditions of the BSD License
|
||||
|
|
@ -30,6 +30,17 @@ ArmGicEnableInterruptInterface (
|
|||
MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, 0x1);
|
||||
}
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
ArmGicDisableInterruptInterface (
|
||||
IN INTN GicInterruptInterfaceBase
|
||||
)
|
||||
{
|
||||
// Disable Gic Interface
|
||||
MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, 0x0);
|
||||
MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0x0);
|
||||
}
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
ArmGicEnableDistributor (
|
||||
|
|
@ -42,3 +53,13 @@ ArmGicEnableDistributor (
|
|||
*/
|
||||
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x1);
|
||||
}
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
ArmGicDisableDistributor (
|
||||
IN INTN GicDistributorBase
|
||||
)
|
||||
{
|
||||
// Disable Gic Distributor
|
||||
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x0);
|
||||
}
|
||||
Loading…
Reference in New Issue