mirror of https://github.com/acidanthera/audk.git
Merge branch 'master' of https://github.com/tianocore/edk2
This commit is contained in:
Jaben Carsey
commit
3a01358bdb
|
|
@ -1,291 +0,0 @@
|
|||
#
|
||||
# Copyright (c) 2013-2015, ARM Limited. All rights reserved.
|
||||
# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Defines Section - statements that will be processed to create a Makefile.
|
||||
#
|
||||
################################################################################
|
||||
[Defines]
|
||||
PLATFORM_NAME = ArmJuno
|
||||
PLATFORM_GUID = ca0722fd-7d3d-45ea-948c-d62b2199807d
|
||||
PLATFORM_VERSION = 0.1
|
||||
DSC_SPECIFICATION = 0x00010005
|
||||
OUTPUT_DIRECTORY = Build/ArmJuno
|
||||
SUPPORTED_ARCHITECTURES = AARCH64|ARM
|
||||
BUILD_TARGETS = DEBUG|RELEASE
|
||||
SKUID_IDENTIFIER = DEFAULT
|
||||
FLASH_DEFINITION = ArmPlatformPkg/ArmJunoPkg/ArmJuno.fdf
|
||||
|
||||
# On RTSM, most peripherals are VExpress Motherboard peripherals
|
||||
!include ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc
|
||||
|
||||
[LibraryClasses.common]
|
||||
ArmPlatformLib|ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/ArmJunoLib.inf
|
||||
ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
|
||||
|
||||
ArmPlatformSysConfigLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf
|
||||
NorFlashPlatformLib|ArmPlatformPkg/ArmJunoPkg/Library/NorFlashJunoLib/NorFlashJunoLib.inf
|
||||
EfiResetSystemLib|ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.inf
|
||||
|
||||
TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
|
||||
|
||||
# USB Requirements
|
||||
UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf
|
||||
|
||||
[LibraryClasses.ARM]
|
||||
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
|
||||
|
||||
[LibraryClasses.AARCH64]
|
||||
ArmLib|ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf
|
||||
|
||||
[LibraryClasses.common.SEC]
|
||||
PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
|
||||
ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
|
||||
LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
|
||||
MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf
|
||||
HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf
|
||||
PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
|
||||
PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf
|
||||
PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf
|
||||
|
||||
[LibraryClasses.common.SEC, LibraryClasses.common.PEIM]
|
||||
MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf
|
||||
|
||||
[LibraryClasses.common.UEFI_DRIVER, LibraryClasses.common.UEFI_APPLICATION, LibraryClasses.common.DXE_RUNTIME_DRIVER, LibraryClasses.common.DXE_DRIVER]
|
||||
PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
|
||||
|
||||
[BuildOptions]
|
||||
*_*_*_PLATFORM_FLAGS == -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmJunoPkg/Include
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Pcd Section - list of all EDK II PCD Entries defined by this Platform
|
||||
#
|
||||
################################################################################
|
||||
|
||||
[PcdsFeatureFlag.common]
|
||||
gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|TRUE
|
||||
|
||||
## If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe.
|
||||
# It could be set FALSE to save size.
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
|
||||
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE
|
||||
|
||||
[PcdsFixedAtBuild.common]
|
||||
gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM Juno"
|
||||
gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"ArmJuno"
|
||||
|
||||
#
|
||||
# NV Storage PCDs. Use base of 0x08000000 for NOR0
|
||||
#
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x0BFC0000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x00010000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x0BFD0000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x00010000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x0BFE0000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000
|
||||
|
||||
# System Memory (2GB - 16MB of Trusted DRAM at the top of the 32bit address space)
|
||||
gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000
|
||||
gArmTokenSpaceGuid.PcdSystemMemorySize|0x7F000000
|
||||
|
||||
# Juno Dual-Cluster profile
|
||||
gArmPlatformTokenSpaceGuid.PcdCoreCount|6
|
||||
gArmPlatformTokenSpaceGuid.PcdClusterCount|2
|
||||
|
||||
gArmTokenSpaceGuid.PcdVFPEnabled|1
|
||||
|
||||
#
|
||||
# ARM PrimeCell
|
||||
#
|
||||
|
||||
## PL011 - Serial Terminal
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x7FF80000
|
||||
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
|
||||
gArmPlatformTokenSpaceGuid.PL011UartInteger|4
|
||||
gArmPlatformTokenSpaceGuid.PL011UartFractional|0
|
||||
|
||||
## PL031 RealTimeClock
|
||||
gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C170000
|
||||
|
||||
# LAN9118 Ethernet Driver
|
||||
gEmbeddedTokenSpaceGuid.PcdLan9118DxeBaseAddress|0x18000000
|
||||
gEmbeddedTokenSpaceGuid.PcdLan9118DefaultMacAddress|0x1215161822242628
|
||||
|
||||
#
|
||||
# ARM General Interrupt Controller
|
||||
#
|
||||
gArmTokenSpaceGuid.PcdGicDistributorBase|0x2C010000
|
||||
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x2C02F000
|
||||
|
||||
#
|
||||
# PLDA PCI Root Complex
|
||||
#
|
||||
gArmPlatformTokenSpaceGuid.PcdPciBusMax|255
|
||||
gArmPlatformTokenSpaceGuid.PcdPciIoBase|0x5f800000
|
||||
gArmPlatformTokenSpaceGuid.PcdPciIoSize|0x00800000
|
||||
gArmPlatformTokenSpaceGuid.PcdPciMmio32Base|0x50000000
|
||||
gArmPlatformTokenSpaceGuid.PcdPciMmio32Size|0x08000000
|
||||
gArmPlatformTokenSpaceGuid.PcdPciMmio64Base|0x4000000000
|
||||
gArmPlatformTokenSpaceGuid.PcdPciMmio64Size|0x100000000
|
||||
|
||||
# List of Device Paths that support BootMonFs
|
||||
gArmPlatformTokenSpaceGuid.PcdBootMonFsSupportedDevicePaths|L"VenHw(E7223039-5836-41E1-B542-D7EC736C5E59)"
|
||||
|
||||
#
|
||||
# ARM OS Loader
|
||||
#
|
||||
# Support the Linux EFI stub by default
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription|L"EFI Linux from NOR Flash"
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath|L"VenHw(E7223039-5836-41E1-B542-D7EC736C5E59)/Image"
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument|L"console=ttyAMA0,115200 earlycon=pl011,0x7ff80000 root=/dev/sda1 rootwait verbose debug"
|
||||
|
||||
# Use the serial console (ConIn & ConOut) and the Graphic driver (ConOut)
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(115200,8,N,1)/VenPcAnsi();VenHw(CE660500-824D-11E0-AC72-0002A5D5C51B)"
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(115200,8,N,1)/VenPcAnsi()"
|
||||
|
||||
#
|
||||
# ARM Architectural Timer Frequency
|
||||
#
|
||||
gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|50000000
|
||||
gEmbeddedTokenSpaceGuid.PcdMetronomeTickPeriod|1000
|
||||
|
||||
[PcdsPatchableInModule]
|
||||
# Console Resolution (Full HD)
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|1920
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|1080
|
||||
|
||||
[PcdsDynamicDefault.common]
|
||||
#
|
||||
# The size of a dynamic PCD of the (VOID*) type can not be increased at run
|
||||
# time from its size at build time. Set the "PcdFdtDevicePaths" PCD to a 128
|
||||
# character "empty" string, to allow to be able to set FDT text device paths
|
||||
# up to 128 characters long.
|
||||
#
|
||||
gEmbeddedTokenSpaceGuid.PcdFdtDevicePaths|L" "
|
||||
|
||||
# Not all Juno platforms support PCI. This dynamic PCD disables or enable
|
||||
# PCI support.
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|TRUE
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Components Section - list of all EDK II Modules needed by this Platform
|
||||
#
|
||||
################################################################################
|
||||
[Components.common]
|
||||
#
|
||||
# PEI Phase modules
|
||||
#
|
||||
ArmPlatformPkg/PrePi/PeiMPCore.inf
|
||||
|
||||
#
|
||||
# DXE
|
||||
#
|
||||
MdeModulePkg/Core/Dxe/DxeMain.inf {
|
||||
<LibraryClasses>
|
||||
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
|
||||
NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
|
||||
}
|
||||
|
||||
#
|
||||
# Architectural Protocols
|
||||
#
|
||||
ArmPkg/Drivers/CpuDxe/CpuDxe.inf
|
||||
MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
|
||||
MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
|
||||
MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
|
||||
MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
|
||||
EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
|
||||
EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
|
||||
EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
|
||||
|
||||
MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
|
||||
MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
|
||||
MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
|
||||
MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
|
||||
MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
|
||||
|
||||
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
|
||||
<LibraryClasses>
|
||||
NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
|
||||
}
|
||||
MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
|
||||
|
||||
#
|
||||
# ACPI Support
|
||||
#
|
||||
MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
|
||||
ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiTables.inf
|
||||
|
||||
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
|
||||
|
||||
ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
|
||||
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
|
||||
ArmPkg/Drivers/TimerDxe/TimerDxe.inf
|
||||
ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
|
||||
|
||||
#
|
||||
# Semi-hosting filesystem
|
||||
#
|
||||
ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
|
||||
|
||||
#
|
||||
# FAT filesystem + GPT/MBR partitioning
|
||||
#
|
||||
MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
|
||||
MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
|
||||
MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
|
||||
|
||||
# Required by PCI
|
||||
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
|
||||
|
||||
#
|
||||
# PCI Support
|
||||
#
|
||||
MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
|
||||
ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf
|
||||
|
||||
#
|
||||
# SATA Controller
|
||||
#
|
||||
MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
|
||||
EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132Dxe.inf
|
||||
|
||||
#
|
||||
# Networking stack
|
||||
#
|
||||
EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.inf
|
||||
|
||||
#
|
||||
# Usb Support
|
||||
#
|
||||
MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
|
||||
MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
|
||||
MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
|
||||
MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
|
||||
MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
|
||||
|
||||
#
|
||||
# Juno platform driver
|
||||
#
|
||||
ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.inf
|
||||
|
||||
#
|
||||
# Bds
|
||||
#
|
||||
MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
|
||||
ArmPlatformPkg/Bds/Bds.inf
|
||||
|
||||
|
|
@ -1,365 +0,0 @@
|
|||
#
|
||||
# Copyright (c) 2013-2015, ARM Limited. All rights reserved.
|
||||
# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# FD Section
|
||||
# The [FD] Section is made up of the definition statements and a
|
||||
# description of what goes into the Flash Device Image. Each FD section
|
||||
# defines one flash "device" image. A flash device image may be one of
|
||||
# the following: Removable media bootable image (like a boot floppy
|
||||
# image,) an Option ROM image (that would be "flashed" into an add-in
|
||||
# card,) a System "Flash" image (that would be burned into a system's
|
||||
# flash) or an Update ("Capsule") image that will be used to update and
|
||||
# existing system flash.
|
||||
#
|
||||
################################################################################
|
||||
|
||||
[FD.BL33_AP_UEFI]
|
||||
BaseAddress = 0xE0000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.
|
||||
Size = 0x000F0000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device
|
||||
ErasePolarity = 1
|
||||
|
||||
# This one is tricky, it must be: BlockSize * NumBlocks = Size
|
||||
BlockSize = 0x00001000
|
||||
NumBlocks = 0xF0
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Following are lists of FD Region layout which correspond to the locations of different
|
||||
# images within the flash device.
|
||||
#
|
||||
# Regions must be defined in ascending order and may not overlap.
|
||||
#
|
||||
# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
|
||||
# the pipe "|" character, followed by the size of the region, also in hex with the leading
|
||||
# "0x" characters. Like:
|
||||
# Offset|Size
|
||||
# PcdOffsetCName|PcdSizeCName
|
||||
# RegionType <FV, DATA, or FILE>
|
||||
#
|
||||
################################################################################
|
||||
|
||||
0x00000000|0x000F0000
|
||||
gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
|
||||
FV = FVMAIN_COMPACT
|
||||
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# FV Section
|
||||
#
|
||||
# [FV] section is used to define what components or modules are placed within a flash
|
||||
# device file. This section also defines order the components and modules are positioned
|
||||
# within the image. The [FV] section consists of define statements, set statements and
|
||||
# module statements.
|
||||
#
|
||||
################################################################################
|
||||
|
||||
[FV.FvMain]
|
||||
BlockSize = 0x40
|
||||
NumBlocks = 0 # This FV gets compressed so make it just big enough
|
||||
FvAlignment = 8 # FV alignment and FV attributes setting.
|
||||
ERASE_POLARITY = 1
|
||||
MEMORY_MAPPED = TRUE
|
||||
STICKY_WRITE = TRUE
|
||||
LOCK_CAP = TRUE
|
||||
LOCK_STATUS = TRUE
|
||||
WRITE_DISABLED_CAP = TRUE
|
||||
WRITE_ENABLED_CAP = TRUE
|
||||
WRITE_STATUS = TRUE
|
||||
WRITE_LOCK_CAP = TRUE
|
||||
WRITE_LOCK_STATUS = TRUE
|
||||
READ_DISABLED_CAP = TRUE
|
||||
READ_ENABLED_CAP = TRUE
|
||||
READ_STATUS = TRUE
|
||||
READ_LOCK_CAP = TRUE
|
||||
READ_LOCK_STATUS = TRUE
|
||||
FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092
|
||||
|
||||
APRIORI DXE {
|
||||
INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
|
||||
}
|
||||
|
||||
INF MdeModulePkg/Core/Dxe/DxeMain.inf
|
||||
INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
|
||||
|
||||
#
|
||||
# PI DXE Drivers producing Architectural Protocols (EFI Services)
|
||||
#
|
||||
INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
|
||||
INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
|
||||
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
|
||||
INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
|
||||
INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
|
||||
INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
|
||||
INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
|
||||
INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
|
||||
|
||||
INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
|
||||
INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
|
||||
|
||||
#
|
||||
# ACPI Support
|
||||
#
|
||||
INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
|
||||
INF RuleOverride=ACPITABLE ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiTables.inf
|
||||
|
||||
INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
|
||||
|
||||
#
|
||||
# Multiple Console IO support
|
||||
#
|
||||
INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
|
||||
INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
|
||||
INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
|
||||
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
|
||||
INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
|
||||
|
||||
INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
|
||||
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
|
||||
INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
|
||||
|
||||
# NOR Flash driver
|
||||
INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
|
||||
|
||||
# Versatile Express FileSystem
|
||||
INF ArmPlatformPkg/FileSystem/BootMonFs/BootMonFs.inf
|
||||
|
||||
#
|
||||
# FAT filesystem + GPT/MBR partitioning
|
||||
#
|
||||
INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
|
||||
INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
|
||||
INF FatBinPkg/EnhancedFatDxe/Fat.inf
|
||||
INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
|
||||
|
||||
# Required by PCI
|
||||
INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
|
||||
|
||||
# FV FileSystem
|
||||
INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf
|
||||
|
||||
#
|
||||
# Usb Support
|
||||
#
|
||||
INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
|
||||
INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
|
||||
INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
|
||||
INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
|
||||
INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
|
||||
|
||||
#
|
||||
# PCI Support
|
||||
#
|
||||
INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
|
||||
INF ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf
|
||||
|
||||
#
|
||||
# SATA Controller
|
||||
#
|
||||
INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
|
||||
INF EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132Dxe.inf
|
||||
|
||||
#
|
||||
# Networking stack
|
||||
#
|
||||
INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
|
||||
INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
|
||||
INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
|
||||
INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
|
||||
INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
|
||||
INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
|
||||
INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
|
||||
INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
|
||||
INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
|
||||
INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
|
||||
INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
|
||||
INF EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.inf
|
||||
|
||||
#
|
||||
# UEFI applications
|
||||
#
|
||||
INF ShellBinPkg/UefiShell/UefiShell.inf
|
||||
INF ArmPkg/Application/LinuxLoader/LinuxLoader.inf
|
||||
|
||||
#
|
||||
# Juno platform driver
|
||||
#
|
||||
INF ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.inf
|
||||
|
||||
#
|
||||
# Bds
|
||||
#
|
||||
INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
|
||||
INF ArmPlatformPkg/Bds/Bds.inf
|
||||
|
||||
#
|
||||
# FDT installation
|
||||
#
|
||||
# The UEFI driver is at the end of the list of the driver to be dispatched
|
||||
# after the device drivers (eg: Ethernet) to ensure we have support for them.
|
||||
INF EmbeddedPkg/Drivers/FdtPlatformDxe/FdtPlatformDxe.inf
|
||||
|
||||
[FV.FVMAIN_COMPACT]
|
||||
FvAlignment = 8
|
||||
ERASE_POLARITY = 1
|
||||
MEMORY_MAPPED = TRUE
|
||||
STICKY_WRITE = TRUE
|
||||
LOCK_CAP = TRUE
|
||||
LOCK_STATUS = TRUE
|
||||
WRITE_DISABLED_CAP = TRUE
|
||||
WRITE_ENABLED_CAP = TRUE
|
||||
WRITE_STATUS = TRUE
|
||||
WRITE_LOCK_CAP = TRUE
|
||||
WRITE_LOCK_STATUS = TRUE
|
||||
READ_DISABLED_CAP = TRUE
|
||||
READ_ENABLED_CAP = TRUE
|
||||
READ_STATUS = TRUE
|
||||
READ_LOCK_CAP = TRUE
|
||||
READ_LOCK_STATUS = TRUE
|
||||
|
||||
INF ArmPlatformPkg/PrePi/PeiMPCore.inf
|
||||
|
||||
FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
|
||||
SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
|
||||
SECTION FV_IMAGE = FVMAIN
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Rules are use with the [FV] section's module INF type to define
|
||||
# how an FFS file is created for a given INF file. The following Rule are the default
|
||||
# rules for the different module type. User can add the customized rules to define the
|
||||
# content of the FFS file.
|
||||
#
|
||||
################################################################################
|
||||
|
||||
|
||||
############################################################################
|
||||
# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #
|
||||
############################################################################
|
||||
#
|
||||
#[Rule.Common.DXE_DRIVER]
|
||||
# FILE DRIVER = $(NAMED_GUID) {
|
||||
# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
# COMPRESS PI_STD {
|
||||
# GUIDED {
|
||||
# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
# UI STRING="$(MODULE_NAME)" Optional
|
||||
# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
||||
# }
|
||||
# }
|
||||
# }
|
||||
#
|
||||
############################################################################
|
||||
|
||||
#
|
||||
# These SEC rules are used for ArmPlatformPkg/PrePi module.
|
||||
# ArmPlatformPkg/PrePi is declared as a SEC module to make GenFv patch the
|
||||
# UEFI Firmware to jump to ArmPlatformPkg/PrePi entrypoint
|
||||
#
|
||||
[Rule.ARM.SEC]
|
||||
FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
|
||||
TE TE Align = 32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
}
|
||||
|
||||
[Rule.AARCH64.SEC]
|
||||
FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED FIXED {
|
||||
TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
}
|
||||
|
||||
# A shim specific rule is required to ensure the alignment is 4K.
|
||||
# Otherwise BaseTools pick up the AArch32 alignment (ie: 32)
|
||||
[Rule.ARM.SEC.SHIM]
|
||||
FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
|
||||
TE TE Align = 4K $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
}
|
||||
|
||||
[Rule.Common.PEI_CORE]
|
||||
FILE PEI_CORE = $(NAMED_GUID) FIXED {
|
||||
TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING ="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.PEIM]
|
||||
FILE PEIM = $(NAMED_GUID) FIXED {
|
||||
PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.PEIM.TIANOCOMPRESSED]
|
||||
FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
|
||||
PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
}
|
||||
|
||||
[Rule.Common.DXE_CORE]
|
||||
FILE DXE_CORE = $(NAMED_GUID) {
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.UEFI_DRIVER]
|
||||
FILE DRIVER = $(NAMED_GUID) {
|
||||
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.DXE_DRIVER]
|
||||
FILE DRIVER = $(NAMED_GUID) {
|
||||
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.DXE_RUNTIME_DRIVER]
|
||||
FILE DRIVER = $(NAMED_GUID) {
|
||||
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.UEFI_APPLICATION]
|
||||
FILE APPLICATION = $(NAMED_GUID) {
|
||||
UI STRING ="$(MODULE_NAME)" Optional
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
}
|
||||
|
||||
[Rule.Common.UEFI_DRIVER.BINARY]
|
||||
FILE DRIVER = $(NAMED_GUID) {
|
||||
DXE_DEPEX DXE_DEPEX Optional |.depex
|
||||
PE32 PE32 |.efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
||||
}
|
||||
|
||||
[Rule.Common.UEFI_APPLICATION.BINARY]
|
||||
FILE APPLICATION = $(NAMED_GUID) {
|
||||
PE32 PE32 |.efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
||||
}
|
||||
|
||||
[Rule.Common.USER_DEFINED.ACPITABLE]
|
||||
FILE FREEFORM = $(NAMED_GUID) {
|
||||
RAW ACPI |.acpi
|
||||
RAW ASL |.aml
|
||||
}
|
||||
|
|
@ -1,285 +0,0 @@
|
|||
#
|
||||
# Copyright (c) 2012-2015, ARM Limited. All rights reserved.
|
||||
# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
#
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Defines Section - statements that will be processed to create a Makefile.
|
||||
#
|
||||
################################################################################
|
||||
[Defines]
|
||||
PLATFORM_NAME = ArmVExpressPkg-CTA15-A7
|
||||
PLATFORM_GUID = 0b511920-978d-4b34-acc0-3d9f8e6f9d81
|
||||
PLATFORM_VERSION = 0.1
|
||||
DSC_SPECIFICATION = 0x00010005
|
||||
OUTPUT_DIRECTORY = Build/ArmVExpress-CTA15-A7
|
||||
SUPPORTED_ARCHITECTURES = ARM
|
||||
BUILD_TARGETS = DEBUG|RELEASE
|
||||
SKUID_IDENTIFIER = DEFAULT
|
||||
FLASH_DEFINITION = ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA15-A7.fdf
|
||||
|
||||
DEFINE EDK2_SKIP_PEICORE = 1
|
||||
DEFINE ARM_BIGLITTLE_TC2 = 1 # We build for the TC2 hardware by default
|
||||
|
||||
!include ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc
|
||||
|
||||
[LibraryClasses.common]
|
||||
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
|
||||
ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/ArmVExpressLib.inf
|
||||
|
||||
ArmPlatformSysConfigLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf
|
||||
NorFlashPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf
|
||||
|
||||
#DebugAgentTimerLib|ArmPlatformPkg/ArmVExpressPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf
|
||||
|
||||
# ARM General Interrupt Driver in Secure and Non-secure
|
||||
ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf
|
||||
|
||||
LcdPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf
|
||||
|
||||
TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
|
||||
ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
|
||||
|
||||
[BuildOptions]
|
||||
!ifdef ARM_BIGLITTLE_TC2
|
||||
*_*_ARM_ARCHCC_FLAGS = -DARM_BIGLITTLE_TC2=1
|
||||
*_*_ARM_PP_FLAGS = -DARM_BIGLITTLE_TC2=1
|
||||
!endif
|
||||
|
||||
RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu Cortex-A15 -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA15-A7
|
||||
|
||||
GCC:*_*_ARM_PLATFORM_FLAGS == -mcpu=cortex-a15 -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA15-A7
|
||||
|
||||
XCODE:*_*_ARM_PLATFORM_FLAGS = -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA15-A7
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Pcd Section - list of all EDK II PCD Entries defined by this Platform
|
||||
#
|
||||
################################################################################
|
||||
|
||||
[PcdsFeatureFlag.common]
|
||||
gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|TRUE
|
||||
gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|TRUE
|
||||
|
||||
## If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe.
|
||||
# It could be set FALSE to save size.
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
|
||||
|
||||
[PcdsFixedAtBuild.common]
|
||||
gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM Versatile Express"
|
||||
gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"ArmVExpress-CTA15-A7"
|
||||
|
||||
gArmPlatformTokenSpaceGuid.PcdCoreCount|5
|
||||
|
||||
#
|
||||
# NV Storage PCDs. Use base of 0x0C000000 for NOR1
|
||||
#
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x0FFC0000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x00010000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x0FFD0000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x00010000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x0FFE0000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000
|
||||
|
||||
gArmTokenSpaceGuid.PcdVFPEnabled|1
|
||||
|
||||
# Stacks for MPCores in Secure World
|
||||
# SRAM (CS1) is only available between 0x14000000 and 0x14001000 on the model
|
||||
# ZBT SRAM is available between 0x2E000000 and 0x2E010000 on the model
|
||||
!ifdef ARM_BIGLITTLE_TC2
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0x17000000
|
||||
!else
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0x2E000000
|
||||
!endif
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x8000
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize|0x1000
|
||||
# Share Monitor stacks with Secure World
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0
|
||||
|
||||
# System Memory (1GB) - An additional 1GB will be added if UEFI is running on a 2GB Test Chip
|
||||
gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000
|
||||
gArmTokenSpaceGuid.PcdSystemMemorySize|0x40000000
|
||||
|
||||
!ifdef ARM_BIGLITTLE_TC2
|
||||
# TC2 Dual-Cluster profile
|
||||
gArmPlatformTokenSpaceGuid.PcdClusterCount|2
|
||||
|
||||
# Core Ids and Gic values
|
||||
# A15_0 = 0x000, GicCoreId = 0
|
||||
# A15_1 = 0x001, GicCoreId = 1
|
||||
# A7_0 = 0x100, GicCoreId = 2
|
||||
# A7_1 = 0x101, GicCoreId = 3
|
||||
# A7_2 = 0x102, GicCoreId = 4
|
||||
gArmTokenSpaceGuid.PcdArmPrimaryCore|0x100
|
||||
!endif
|
||||
|
||||
#
|
||||
# ARM PrimeCell
|
||||
#
|
||||
|
||||
## SP805 Watchdog - Motherboard Watchdog
|
||||
gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x1C0F0000
|
||||
|
||||
## PL011 - Serial Terminal
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x1C090000
|
||||
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|38400
|
||||
|
||||
## PL031 RealTimeClock
|
||||
gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C170000
|
||||
|
||||
!ifdef ARM_BIGLITTLE_TC2
|
||||
## PL111 Lcd & HdLcd
|
||||
gArmPlatformTokenSpaceGuid.PcdPL111LcdBase|0x1C1F0000
|
||||
gArmPlatformTokenSpaceGuid.PcdArmHdLcdBase|0x2B000000
|
||||
gArmVExpressTokenSpaceGuid.PcdHdLcdVideoModeOscId|5
|
||||
!endif
|
||||
|
||||
#
|
||||
# PL180 MMC/SD card controller
|
||||
#
|
||||
gArmPlatformTokenSpaceGuid.PcdPL180SysMciRegAddress|0x1C010048
|
||||
gArmPlatformTokenSpaceGuid.PcdPL180MciBaseAddress|0x1C050000
|
||||
|
||||
|
||||
#
|
||||
# ARM General Interrupt Controller
|
||||
#
|
||||
gArmTokenSpaceGuid.PcdGicDistributorBase|0x2C001000
|
||||
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x2C002000
|
||||
|
||||
# ISP1761 USB OTG Controller
|
||||
gEmbeddedTokenSpaceGuid.PcdIsp1761BaseAddress|0x1B000000
|
||||
|
||||
# Ethernet (SMSC LAN9118)
|
||||
gEmbeddedTokenSpaceGuid.PcdLan9118DxeBaseAddress|0x1A000000
|
||||
|
||||
#
|
||||
# Define the device path to the FDT for the platform
|
||||
#
|
||||
gEmbeddedTokenSpaceGuid.PcdFdtDevicePaths|L"VenHw(E7223039-5836-41E1-B542-D7EC736C5E59)/ca15a7"
|
||||
|
||||
#
|
||||
# ARM OS Loader
|
||||
#
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription|L"Linux from NorFlash"
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath|L"Fv(73DCB643-3862-4904-9076-A94AF1890243)/LinuxLoader.efi"
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument|L"VenHw(E7223039-5836-41E1-B542-D7EC736C5E59)/kernel -c \"console=ttyAMA0,38400 earlyprintk debug verbose\""
|
||||
|
||||
# Use the serial console (ConIn & ConOut) and the Graphic driver (ConOut)
|
||||
# PL111 - CLCD
|
||||
#gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(38400,8,N,1)/VenPcAnsi();VenHw(407B4008-BF5B-11DF-9547-CF16E0D72085)"
|
||||
# HDLCD
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(38400,8,N,1)/VenPcAnsi();VenHw(CE660500-824D-11E0-AC72-0002A5D5C51B)"
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(38400,8,N,1)/VenPcAnsi()"
|
||||
|
||||
#
|
||||
# ARM Architectural Timer Frequency
|
||||
#
|
||||
!ifdef ARM_BIGLITTLE_TC2
|
||||
gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|24000000
|
||||
!else
|
||||
gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|10000000
|
||||
!endif
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Components Section - list of all EDK II Modules needed by this Platform
|
||||
#
|
||||
################################################################################
|
||||
[Components.common]
|
||||
#
|
||||
# PEI Phase modules
|
||||
#
|
||||
ArmPlatformPkg/PrePi/PeiMPCore.inf {
|
||||
<LibraryClasses>
|
||||
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
|
||||
ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/ArmVExpressLib.inf
|
||||
}
|
||||
|
||||
#
|
||||
# DXE
|
||||
#
|
||||
MdeModulePkg/Core/Dxe/DxeMain.inf {
|
||||
<LibraryClasses>
|
||||
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
|
||||
NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
|
||||
}
|
||||
|
||||
#
|
||||
# Architectural Protocols
|
||||
#
|
||||
ArmPkg/Drivers/CpuDxe/CpuDxe.inf
|
||||
MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
|
||||
MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
|
||||
MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
|
||||
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
|
||||
<LibraryClasses>
|
||||
NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
|
||||
}
|
||||
MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
|
||||
MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
|
||||
EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
|
||||
EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
|
||||
EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
|
||||
|
||||
MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
|
||||
MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
|
||||
MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
|
||||
MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
|
||||
MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
|
||||
|
||||
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
|
||||
|
||||
ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
|
||||
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
|
||||
#ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
|
||||
ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/HdLcdGraphicsOutputDxe.inf
|
||||
ArmPkg/Drivers/TimerDxe/TimerDxe.inf
|
||||
ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
|
||||
|
||||
#
|
||||
# Platform
|
||||
#
|
||||
ArmPlatformPkg/ArmVExpressPkg/ArmVExpressDxe/ArmHwDxe.inf
|
||||
|
||||
#
|
||||
# Filesystems
|
||||
#
|
||||
!ifndef ARM_BIGLITTLE_TC2
|
||||
ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
|
||||
!endif
|
||||
|
||||
#
|
||||
# Multimedia Card Interface
|
||||
#
|
||||
EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
|
||||
ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf
|
||||
|
||||
# SMSC LAN 9118
|
||||
EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.inf
|
||||
|
||||
#
|
||||
# FAT filesystem + GPT/MBR partitioning
|
||||
#
|
||||
MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
|
||||
MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
|
||||
MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
|
||||
|
||||
MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
|
||||
|
||||
#
|
||||
# Bds
|
||||
#
|
||||
MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
|
||||
ArmPlatformPkg/Bds/Bds.inf
|
||||
|
|
@ -1,323 +0,0 @@
|
|||
#
|
||||
# Copyright (c) 2012-2015, ARM Limited. All rights reserved.
|
||||
# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# FD Section
|
||||
# The [FD] Section is made up of the definition statements and a
|
||||
# description of what goes into the Flash Device Image. Each FD section
|
||||
# defines one flash "device" image. A flash device image may be one of
|
||||
# the following: Removable media bootable image (like a boot floppy
|
||||
# image,) an Option ROM image (that would be "flashed" into an add-in
|
||||
# card,) a System "Flash" image (that would be burned into a system's
|
||||
# flash) or an Update ("Capsule") image that will be used to update and
|
||||
# existing system flash.
|
||||
#
|
||||
################################################################################
|
||||
|
||||
[FD.ARM_VEXPRESS_CTA15A7_EFI]
|
||||
BaseAddress = 0xB0000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in remapped DRAM.
|
||||
Size = 0x000C8000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device
|
||||
ErasePolarity = 1
|
||||
BlockSize = 0x00001000
|
||||
NumBlocks = 0xC8
|
||||
|
||||
0x00000000|0x000C8000
|
||||
gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
|
||||
FV = FVMAIN_COMPACT
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# FV Section
|
||||
#
|
||||
# [FV] section is used to define what components or modules are placed within a flash
|
||||
# device file. This section also defines order the components and modules are positioned
|
||||
# within the image. The [FV] section consists of define statements, set statements and
|
||||
# module statements.
|
||||
#
|
||||
################################################################################
|
||||
[FV.FvMain]
|
||||
BlockSize = 0x40
|
||||
NumBlocks = 0 # This FV gets compressed so make it just big enough
|
||||
FvAlignment = 8 # FV alignment and FV attributes setting.
|
||||
ERASE_POLARITY = 1
|
||||
MEMORY_MAPPED = TRUE
|
||||
STICKY_WRITE = TRUE
|
||||
LOCK_CAP = TRUE
|
||||
LOCK_STATUS = TRUE
|
||||
WRITE_DISABLED_CAP = TRUE
|
||||
WRITE_ENABLED_CAP = TRUE
|
||||
WRITE_STATUS = TRUE
|
||||
WRITE_LOCK_CAP = TRUE
|
||||
WRITE_LOCK_STATUS = TRUE
|
||||
READ_DISABLED_CAP = TRUE
|
||||
READ_ENABLED_CAP = TRUE
|
||||
READ_STATUS = TRUE
|
||||
READ_LOCK_CAP = TRUE
|
||||
READ_LOCK_STATUS = TRUE
|
||||
FvNameGuid = 73dcb643-3862-4904-9076-a94af1890243
|
||||
|
||||
INF MdeModulePkg/Core/Dxe/DxeMain.inf
|
||||
|
||||
#
|
||||
# PI DXE Drivers producing Architectural Protocols (EFI Services)
|
||||
#
|
||||
INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
|
||||
INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
|
||||
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
|
||||
INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
|
||||
INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
|
||||
INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
|
||||
INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
|
||||
INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
|
||||
INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
|
||||
INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
|
||||
|
||||
INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
|
||||
|
||||
#
|
||||
# Multiple Console IO support
|
||||
#
|
||||
INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
|
||||
INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
|
||||
INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
|
||||
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
|
||||
INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
|
||||
|
||||
INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
|
||||
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
|
||||
INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
|
||||
#INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
|
||||
INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/HdLcdGraphicsOutputDxe.inf
|
||||
INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
|
||||
|
||||
#
|
||||
# Platform
|
||||
#
|
||||
INF ArmPlatformPkg/ArmVExpressPkg/ArmVExpressDxe/ArmHwDxe.inf
|
||||
|
||||
#
|
||||
# Multimedia Card Interface
|
||||
#
|
||||
INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
|
||||
INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf
|
||||
|
||||
#
|
||||
# Filesystems
|
||||
#
|
||||
!ifndef $(ARM_BIGLITTLE_TC2)
|
||||
INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
|
||||
!endif
|
||||
|
||||
#
|
||||
# FAT filesystem + GPT/MBR partitioning
|
||||
#
|
||||
INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
|
||||
INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
|
||||
INF FatBinPkg/EnhancedFatDxe/Fat.inf
|
||||
INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
|
||||
|
||||
# Versatile Express FileSystem
|
||||
INF ArmPlatformPkg/FileSystem/BootMonFs/BootMonFs.inf
|
||||
|
||||
#
|
||||
# USB support
|
||||
#
|
||||
INF EmbeddedPkg/Drivers/Isp1761UsbDxe/Isp1761UsbDxe.inf
|
||||
|
||||
#
|
||||
# Android Fastboot
|
||||
#
|
||||
INF EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf
|
||||
INF EmbeddedPkg/Drivers/AndroidFastbootTransportUsbDxe/FastbootTransportUsbDxe.inf
|
||||
INF ArmPlatformPkg/ArmVExpressPkg/ArmVExpressFastBootDxe/ArmVExpressFastBootDxe.inf
|
||||
|
||||
# ACPI Support
|
||||
INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
|
||||
|
||||
#
|
||||
# Networking stack
|
||||
#
|
||||
INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
|
||||
INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
|
||||
INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
|
||||
INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
|
||||
INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
|
||||
INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
|
||||
INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
|
||||
INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
|
||||
INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
|
||||
INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
|
||||
INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
|
||||
INF EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.inf
|
||||
|
||||
#
|
||||
# UEFI application
|
||||
#
|
||||
INF ShellBinPkg/UefiShell/UefiShell.inf
|
||||
|
||||
#
|
||||
# Bds
|
||||
#
|
||||
INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
|
||||
INF ArmPlatformPkg/Bds/Bds.inf
|
||||
|
||||
# Legacy Linux Loader
|
||||
INF ArmPkg/Application/LinuxLoader/LinuxLoader.inf
|
||||
|
||||
# FV Filesystem
|
||||
INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf
|
||||
|
||||
#
|
||||
# FDT installation
|
||||
#
|
||||
# The UEFI driver is at the end of the list of the driver to be dispatched
|
||||
# after the device drivers (eg: Ethernet) to ensure we have support for them.
|
||||
INF EmbeddedPkg/Drivers/FdtPlatformDxe/FdtPlatformDxe.inf
|
||||
|
||||
# Example to add a Device Tree to the Firmware Volume
|
||||
#FILE FREEFORM = PCD(gArmVExpressTokenSpaceGuid.PcdFdtVExpressHwA15x2A7x3) {
|
||||
# SECTION RAW = ArmPlatformPkg/ArmVExpressPkg/Fdts/vexpress-v2p-ca15_a7.dtb
|
||||
#}
|
||||
|
||||
[FV.FVMAIN_COMPACT]
|
||||
FvBaseAddress = 0xB0000000
|
||||
FvForceRebase = TRUE
|
||||
FvAlignment = 8
|
||||
ERASE_POLARITY = 1
|
||||
MEMORY_MAPPED = TRUE
|
||||
STICKY_WRITE = TRUE
|
||||
LOCK_CAP = TRUE
|
||||
LOCK_STATUS = TRUE
|
||||
WRITE_DISABLED_CAP = TRUE
|
||||
WRITE_ENABLED_CAP = TRUE
|
||||
WRITE_STATUS = TRUE
|
||||
WRITE_LOCK_CAP = TRUE
|
||||
WRITE_LOCK_STATUS = TRUE
|
||||
READ_DISABLED_CAP = TRUE
|
||||
READ_ENABLED_CAP = TRUE
|
||||
READ_STATUS = TRUE
|
||||
READ_LOCK_CAP = TRUE
|
||||
READ_LOCK_STATUS = TRUE
|
||||
|
||||
INF ArmPlatformPkg/PrePi/PeiMPCore.inf
|
||||
|
||||
FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
|
||||
SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
|
||||
SECTION FV_IMAGE = FVMAIN
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Rules are use with the [FV] section's module INF type to define
|
||||
# how an FFS file is created for a given INF file. The following Rule are the default
|
||||
# rules for the different module type. User can add the customized rules to define the
|
||||
# content of the FFS file.
|
||||
#
|
||||
################################################################################
|
||||
|
||||
|
||||
############################################################################
|
||||
# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #
|
||||
############################################################################
|
||||
#
|
||||
#[Rule.Common.DXE_DRIVER]
|
||||
# FILE DRIVER = $(NAMED_GUID) {
|
||||
# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
# COMPRESS PI_STD {
|
||||
# GUIDED {
|
||||
# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
# UI STRING="$(MODULE_NAME)" Optional
|
||||
# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
||||
# }
|
||||
# }
|
||||
# }
|
||||
#
|
||||
############################################################################
|
||||
|
||||
[Rule.Common.SEC]
|
||||
FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
|
||||
TE TE Align = 32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
}
|
||||
|
||||
[Rule.Common.PEI_CORE]
|
||||
FILE PEI_CORE = $(NAMED_GUID) {
|
||||
TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING ="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.PEIM]
|
||||
FILE PEIM = $(NAMED_GUID) {
|
||||
PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.PEIM.TIANOCOMPRESSED]
|
||||
FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
|
||||
PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
}
|
||||
|
||||
[Rule.Common.DXE_CORE]
|
||||
FILE DXE_CORE = $(NAMED_GUID) {
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.UEFI_DRIVER]
|
||||
FILE DRIVER = $(NAMED_GUID) {
|
||||
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.DXE_DRIVER]
|
||||
FILE DRIVER = $(NAMED_GUID) {
|
||||
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.DXE_RUNTIME_DRIVER]
|
||||
FILE DRIVER = $(NAMED_GUID) {
|
||||
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.UEFI_APPLICATION]
|
||||
FILE APPLICATION = $(NAMED_GUID) {
|
||||
UI STRING ="$(MODULE_NAME)" Optional
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
}
|
||||
|
||||
[Rule.Common.UEFI_DRIVER.BINARY]
|
||||
FILE DRIVER = $(NAMED_GUID) {
|
||||
DXE_DEPEX DXE_DEPEX Optional |.depex
|
||||
PE32 PE32 |.efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
||||
}
|
||||
|
||||
[Rule.Common.UEFI_APPLICATION.BINARY]
|
||||
FILE APPLICATION = $(NAMED_GUID) {
|
||||
PE32 PE32 |.efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
||||
}
|
||||
|
|
@ -1,317 +0,0 @@
|
|||
#
|
||||
# Copyright (c) 2011-2015, ARM Limited. All rights reserved.
|
||||
# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
#
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Defines Section - statements that will be processed to create a Makefile.
|
||||
#
|
||||
################################################################################
|
||||
[Defines]
|
||||
PLATFORM_NAME = ArmVExpress-FVP-AArch64
|
||||
PLATFORM_GUID = 0de70077-9b3b-43bf-ba38-0ea37d77141b
|
||||
PLATFORM_VERSION = 0.1
|
||||
DSC_SPECIFICATION = 0x00010005
|
||||
OUTPUT_DIRECTORY = Build/ArmVExpress-FVP-AArch64
|
||||
SUPPORTED_ARCHITECTURES = AARCH64
|
||||
BUILD_TARGETS = DEBUG|RELEASE
|
||||
SKUID_IDENTIFIER = DEFAULT
|
||||
FLASH_DEFINITION = ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf
|
||||
|
||||
!ifndef ARM_FVP_RUN_NORFLASH
|
||||
DEFINE EDK2_SKIP_PEICORE=1
|
||||
!endif
|
||||
|
||||
|
||||
!include ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc
|
||||
|
||||
[LibraryClasses.common]
|
||||
ArmLib|ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf
|
||||
ArmCpuLib|ArmPkg/Drivers/ArmCpuLib/ArmCortexAEMv8Lib/ArmCortexAEMv8Lib.inf
|
||||
ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf
|
||||
|
||||
ArmPlatformSysConfigLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf
|
||||
NorFlashPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf
|
||||
LcdPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf
|
||||
|
||||
TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
|
||||
|
||||
# Virtio Support
|
||||
VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
|
||||
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
|
||||
|
||||
[LibraryClasses.common.SEC]
|
||||
ArmLib|ArmPkg/Library/ArmLib/AArch64/AArch64LibSec.inf
|
||||
ArmPlatformSecLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf
|
||||
ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLibSec.inf
|
||||
|
||||
[LibraryClasses.common.UEFI_DRIVER, LibraryClasses.common.UEFI_APPLICATION, LibraryClasses.common.DXE_RUNTIME_DRIVER, LibraryClasses.common.DXE_DRIVER]
|
||||
PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
|
||||
|
||||
[BuildOptions]
|
||||
GCC:*_*_AARCH64_PLATFORM_FLAGS == -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM
|
||||
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Pcd Section - list of all EDK II PCD Entries defined by this Platform
|
||||
#
|
||||
################################################################################
|
||||
|
||||
[PcdsFeatureFlag.common]
|
||||
|
||||
## If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe.
|
||||
# It could be set FALSE to save size.
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
|
||||
|
||||
[PcdsFixedAtBuild.common]
|
||||
gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM Fixed Virtual Platform"
|
||||
gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"ARM-FVP"
|
||||
|
||||
# Up to 8 cores on Base models. This works fine if model happens to have less.
|
||||
gArmPlatformTokenSpaceGuid.PcdCoreCount|8
|
||||
gArmPlatformTokenSpaceGuid.PcdClusterCount|2
|
||||
|
||||
#
|
||||
# NV Storage PCDs. Use base of 0x0C000000 for NOR1
|
||||
#
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x0FFC0000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x00010000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x0FFD0000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x00010000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x0FFE0000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000
|
||||
|
||||
gArmTokenSpaceGuid.PcdVFPEnabled|1
|
||||
|
||||
# FVP models can have 2 clusters with 4 cpus each
|
||||
# Stacks for MPCores in Secure World
|
||||
# Trusted SRAM (DRAM on Foundation model)
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0x04000000
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x1000
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize|0x800
|
||||
|
||||
# Stacks for MPCores in Normal World
|
||||
# Non-Trusted SRAM
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x2E000000
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000
|
||||
|
||||
# System Memory (2GB - 16MB of Trusted DRAM at the top of the 32bit address space)
|
||||
gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000
|
||||
gArmTokenSpaceGuid.PcdSystemMemorySize|0x7F000000
|
||||
|
||||
# Size of the region used by UEFI in permanent memory (Reserved 64MB)
|
||||
gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000
|
||||
|
||||
#
|
||||
# ARM Pcds
|
||||
#
|
||||
gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000040000000
|
||||
|
||||
## Trustzone enable (to make the transition from EL3 to NS EL2 in ArmPlatformPkg/Sec)
|
||||
gArmTokenSpaceGuid.PcdTrustzoneSupport|TRUE
|
||||
|
||||
#
|
||||
# ARM PrimeCell
|
||||
#
|
||||
|
||||
## SP805 Watchdog - Motherboard Watchdog at 24MHz
|
||||
gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x1C0F0000
|
||||
gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz|24000000
|
||||
|
||||
## PL011 - Serial Terminal
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x1c090000
|
||||
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|38400
|
||||
|
||||
## PL031 RealTimeClock
|
||||
gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C170000
|
||||
|
||||
## PL111 Versatile Express Motherboard controller
|
||||
gArmPlatformTokenSpaceGuid.PcdPL111LcdBase|0x1C1F0000
|
||||
|
||||
## PL180 MMC/SD card controller
|
||||
gArmPlatformTokenSpaceGuid.PcdPL180SysMciRegAddress|0x1C010048
|
||||
gArmPlatformTokenSpaceGuid.PcdPL180MciBaseAddress|0x1C050000
|
||||
|
||||
#
|
||||
# ARM General Interrupt Controller
|
||||
#
|
||||
!ifdef ARM_FVP_LEGACY_GICV2_LOCATION
|
||||
gArmTokenSpaceGuid.PcdGicDistributorBase|0x2C001000
|
||||
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x2C002000
|
||||
!else
|
||||
gArmTokenSpaceGuid.PcdGicDistributorBase|0x2f000000
|
||||
gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x2f100000
|
||||
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x2C000000
|
||||
!endif
|
||||
|
||||
#
|
||||
# ARM OS Loader
|
||||
#
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription|L"Linux from SemiHosting"
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath|L"Fv(87940482-FC81-41C3-87E6-399CF85AC8A0)/LinuxLoader.efi"
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument|L"VenHw(C5B9C74A-6D72-4719-99AB-C59F199091EB)/Image -f VenHw(C5B9C74A-6D72-4719-99AB-C59F199091EB)/filesystem.cpio.gz -c \"console=ttyAMA0 earlycon=pl011,0x1c090000 debug user_debug=31 loglevel=9\""
|
||||
|
||||
# Use the serial console (ConIn & ConOut) and the Graphic driver (ConOut)
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(38400,8,N,1)/VenPcAnsi();VenHw(407B4008-BF5B-11DF-9547-CF16E0D72085)"
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(38400,8,N,1)/VenPcAnsi()"
|
||||
|
||||
#
|
||||
# ARM Architectural Timer Frequency
|
||||
#
|
||||
# Set tick frequency value to 100Mhz
|
||||
gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|100000000
|
||||
|
||||
[PcdsDynamicDefault.common]
|
||||
#
|
||||
# The size of a dynamic PCD of the (VOID*) type can not be increased at run
|
||||
# time from its size at build time. Set the "PcdFdtDevicePaths" PCD to a 128
|
||||
# character "empty" string, to allow to be able to set FDT text device paths
|
||||
# up to 128 characters long.
|
||||
#
|
||||
gEmbeddedTokenSpaceGuid.PcdFdtDevicePaths|L" "
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Components Section - list of all EDK II Modules needed by this Platform
|
||||
#
|
||||
################################################################################
|
||||
[Components.common]
|
||||
|
||||
#
|
||||
# SEC
|
||||
#
|
||||
ArmPlatformPkg/Sec/Sec.inf {
|
||||
<LibraryClasses>
|
||||
# Use the implementation which set the Secure bits
|
||||
ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf
|
||||
}
|
||||
|
||||
#
|
||||
# PEI Phase modules
|
||||
#
|
||||
!ifdef EDK2_SKIP_PEICORE
|
||||
# UEFI is placed in RAM by bootloader
|
||||
ArmPlatformPkg/PrePi/PeiMPCore.inf {
|
||||
<LibraryClasses>
|
||||
ArmLib|ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf
|
||||
ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf
|
||||
}
|
||||
!else
|
||||
# UEFI lives in FLASH and copies itself to RAM
|
||||
ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
|
||||
MdeModulePkg/Core/Pei/PeiMain.inf
|
||||
MdeModulePkg/Universal/PCD/Pei/Pcd.inf {
|
||||
<LibraryClasses>
|
||||
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
|
||||
}
|
||||
ArmPlatformPkg/PlatformPei/PlatformPeim.inf
|
||||
ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
|
||||
ArmPkg/Drivers/CpuPei/CpuPei.inf
|
||||
IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
|
||||
Nt32Pkg/BootModePei/BootModePei.inf
|
||||
MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
|
||||
MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
|
||||
<LibraryClasses>
|
||||
NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
|
||||
}
|
||||
!endif
|
||||
|
||||
#
|
||||
# DXE
|
||||
#
|
||||
MdeModulePkg/Core/Dxe/DxeMain.inf {
|
||||
<LibraryClasses>
|
||||
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
|
||||
NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
|
||||
}
|
||||
|
||||
#
|
||||
# Architectural Protocols
|
||||
#
|
||||
ArmPkg/Drivers/CpuDxe/CpuDxe.inf
|
||||
MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
|
||||
!if $(SECURE_BOOT_ENABLE) == TRUE
|
||||
MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf {
|
||||
<LibraryClasses>
|
||||
NULL|SecurityPkg/Library/DxeImageVerificationLib/DxeImageVerificationLib.inf
|
||||
}
|
||||
SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
|
||||
!else
|
||||
MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
|
||||
!endif
|
||||
MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
|
||||
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
|
||||
<LibraryClasses>
|
||||
NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
|
||||
}
|
||||
MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
|
||||
MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
|
||||
EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
|
||||
EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
|
||||
EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
|
||||
|
||||
MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
|
||||
MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
|
||||
MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
|
||||
MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
|
||||
MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
|
||||
|
||||
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
|
||||
|
||||
ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
|
||||
!if $(SECURE_BOOT_ENABLE) == TRUE
|
||||
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashAuthenticatedDxe.inf
|
||||
!else
|
||||
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
|
||||
!endif
|
||||
ArmPkg/Drivers/TimerDxe/TimerDxe.inf
|
||||
ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
|
||||
ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
|
||||
|
||||
#
|
||||
# Semi-hosting filesystem
|
||||
#
|
||||
ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
|
||||
|
||||
#
|
||||
# Multimedia Card Interface
|
||||
#
|
||||
EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
|
||||
ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf
|
||||
|
||||
#
|
||||
# Platform Driver
|
||||
#
|
||||
ArmPlatformPkg/ArmVExpressPkg/ArmVExpressDxe/ArmFvpDxe.inf
|
||||
OvmfPkg/VirtioBlkDxe/VirtioBlk.inf
|
||||
|
||||
#
|
||||
# FAT filesystem + GPT/MBR partitioning
|
||||
#
|
||||
MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
|
||||
MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
|
||||
MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
|
||||
|
||||
#
|
||||
# Bds
|
||||
#
|
||||
MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
|
||||
!if $(USE_ARM_BDS) == TRUE
|
||||
ArmPlatformPkg/Bds/Bds.inf
|
||||
!else
|
||||
MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
|
||||
MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
|
||||
IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
|
||||
!endif
|
||||
|
|
@ -1,401 +0,0 @@
|
|||
#
|
||||
# Copyright (c) 2011 - 2015, ARM Limited. All rights reserved.
|
||||
# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# FD Section
|
||||
# The [FD] Section is made up of the definition statements and a
|
||||
# description of what goes into the Flash Device Image. Each FD section
|
||||
# defines one flash "device" image. A flash device image may be one of
|
||||
# the following: Removable media bootable image (like a boot floppy
|
||||
# image,) an Option ROM image (that would be "flashed" into an add-in
|
||||
# card,) a System "Flash" image (that would be burned into a system's
|
||||
# flash) or an Update ("Capsule") image that will be used to update and
|
||||
# existing system flash.
|
||||
#
|
||||
################################################################################
|
||||
|
||||
[FD.FVP_AARCH64_EFI_SEC]
|
||||
BaseAddress = 0x00000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in SecureROM.
|
||||
Size = 0x04000000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the device (64MiB).
|
||||
ErasePolarity = 1
|
||||
|
||||
# This one is tricky, it must be: BlockSize * NumBlocks = Size
|
||||
BlockSize = 0x00001000
|
||||
NumBlocks = 0x4000
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Following are lists of FD Region layout which correspond to the locations of different
|
||||
# images within the flash device.
|
||||
#
|
||||
# Regions must be defined in ascending order and may not overlap.
|
||||
#
|
||||
# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
|
||||
# the pipe "|" character, followed by the size of the region, also in hex with the leading
|
||||
# "0x" characters. Like:
|
||||
# Offset|Size
|
||||
# PcdOffsetCName|PcdSizeCName
|
||||
# RegionType <FV, DATA, or FILE>
|
||||
#
|
||||
################################################################################
|
||||
|
||||
0x00000000|0x00080000
|
||||
gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize
|
||||
FV = FVMAIN_SEC
|
||||
|
||||
[FD.FVP_AARCH64_EFI]
|
||||
!ifdef ARM_FVP_RUN_NORFLASH
|
||||
BaseAddress = 0x08000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in Flash0.
|
||||
!else
|
||||
BaseAddress = 0x88000000|gArmTokenSpaceGuid.PcdFdBaseAddress # UEFI in DRAM + 128MB.
|
||||
!endif
|
||||
Size = 0x04000000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the device (64MiB).
|
||||
ErasePolarity = 1
|
||||
|
||||
# This one is tricky, it must be: BlockSize * NumBlocks = Size
|
||||
BlockSize = 0x00001000
|
||||
NumBlocks = 0x4000
|
||||
|
||||
0x00000000|0x00280000
|
||||
gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
|
||||
FV = FVMAIN_COMPACT
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# FV Section
|
||||
#
|
||||
# [FV] section is used to define what components or modules are placed within a flash
|
||||
# device file. This section also defines order the components and modules are positioned
|
||||
# within the image. The [FV] section consists of define statements, set statements and
|
||||
# module statements.
|
||||
#
|
||||
################################################################################
|
||||
|
||||
[FV.FVMAIN_SEC]
|
||||
FvBaseAddress = 0x0 # Secure ROM
|
||||
FvForceRebase = TRUE
|
||||
FvAlignment = 16
|
||||
ERASE_POLARITY = 1
|
||||
MEMORY_MAPPED = TRUE
|
||||
STICKY_WRITE = TRUE
|
||||
LOCK_CAP = TRUE
|
||||
LOCK_STATUS = TRUE
|
||||
WRITE_DISABLED_CAP = TRUE
|
||||
WRITE_ENABLED_CAP = TRUE
|
||||
WRITE_STATUS = TRUE
|
||||
WRITE_LOCK_CAP = TRUE
|
||||
WRITE_LOCK_STATUS = TRUE
|
||||
READ_DISABLED_CAP = TRUE
|
||||
READ_ENABLED_CAP = TRUE
|
||||
READ_STATUS = TRUE
|
||||
READ_LOCK_CAP = TRUE
|
||||
READ_LOCK_STATUS = TRUE
|
||||
|
||||
INF ArmPlatformPkg/Sec/Sec.inf
|
||||
|
||||
|
||||
[FV.FvMain]
|
||||
BlockSize = 0x40
|
||||
NumBlocks = 0 # This FV gets compressed so make it just big enough
|
||||
FvAlignment = 16 # FV alignment and FV attributes setting.
|
||||
ERASE_POLARITY = 1
|
||||
MEMORY_MAPPED = TRUE
|
||||
STICKY_WRITE = TRUE
|
||||
LOCK_CAP = TRUE
|
||||
LOCK_STATUS = TRUE
|
||||
WRITE_DISABLED_CAP = TRUE
|
||||
WRITE_ENABLED_CAP = TRUE
|
||||
WRITE_STATUS = TRUE
|
||||
WRITE_LOCK_CAP = TRUE
|
||||
WRITE_LOCK_STATUS = TRUE
|
||||
READ_DISABLED_CAP = TRUE
|
||||
READ_ENABLED_CAP = TRUE
|
||||
READ_STATUS = TRUE
|
||||
READ_LOCK_CAP = TRUE
|
||||
READ_LOCK_STATUS = TRUE
|
||||
FvNameGuid = 87940482-fc81-41c3-87e6-399cf85ac8a0
|
||||
|
||||
APRIORI DXE {
|
||||
INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
|
||||
}
|
||||
|
||||
INF MdeModulePkg/Core/Dxe/DxeMain.inf
|
||||
INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
|
||||
|
||||
#
|
||||
# PI DXE Drivers producing Architectural Protocols (EFI Services)
|
||||
#
|
||||
INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
|
||||
INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
|
||||
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
|
||||
INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
|
||||
!if $(SECURE_BOOT_ENABLE) == TRUE
|
||||
INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
|
||||
!endif
|
||||
INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
|
||||
INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
|
||||
INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
|
||||
INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
|
||||
INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
|
||||
INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
|
||||
|
||||
INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
|
||||
|
||||
#
|
||||
# Multiple Console IO support
|
||||
#
|
||||
INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
|
||||
INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
|
||||
INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
|
||||
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
|
||||
INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
|
||||
|
||||
INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
|
||||
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
|
||||
!if $(SECURE_BOOT_ENABLE) == TRUE
|
||||
INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashAuthenticatedDxe.inf
|
||||
!else
|
||||
INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
|
||||
!endif
|
||||
INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
|
||||
INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
|
||||
|
||||
#
|
||||
# Semi-hosting filesystem
|
||||
#
|
||||
INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
|
||||
|
||||
#
|
||||
# FAT filesystem + GPT/MBR partitioning
|
||||
#
|
||||
INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
|
||||
INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
|
||||
INF FatBinPkg/EnhancedFatDxe/Fat.inf
|
||||
INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
|
||||
|
||||
#
|
||||
# Multimedia Card Interface
|
||||
#
|
||||
INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
|
||||
INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf
|
||||
|
||||
#
|
||||
# Platform Driver
|
||||
#
|
||||
INF ArmPlatformPkg/ArmVExpressPkg/ArmVExpressDxe/ArmFvpDxe.inf
|
||||
INF OvmfPkg/VirtioBlkDxe/VirtioBlk.inf
|
||||
|
||||
#
|
||||
# UEFI application (Shell Embedded Boot Loader)
|
||||
#
|
||||
INF ShellBinPkg/UefiShell/UefiShell.inf
|
||||
|
||||
#
|
||||
# Bds
|
||||
#
|
||||
INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
|
||||
!if $(USE_ARM_BDS) == TRUE
|
||||
INF ArmPlatformPkg/Bds/Bds.inf
|
||||
!else
|
||||
INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
|
||||
INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
|
||||
INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
|
||||
|
||||
#
|
||||
# TianoCore logo (splash screen)
|
||||
#
|
||||
FILE FREEFORM = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile) {
|
||||
SECTION RAW = MdeModulePkg/Logo/Logo.bmp
|
||||
}
|
||||
!endif
|
||||
|
||||
# Legacy Linux Loader
|
||||
INF ArmPkg/Application/LinuxLoader/LinuxLoader.inf
|
||||
|
||||
# FV Filesystem
|
||||
INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf
|
||||
|
||||
#
|
||||
# FDT installation
|
||||
#
|
||||
# The UEFI driver is at the end of the list of the driver to be dispatched
|
||||
# after the device drivers (eg: Ethernet) to ensure we have support for them.
|
||||
INF EmbeddedPkg/Drivers/FdtPlatformDxe/FdtPlatformDxe.inf
|
||||
|
||||
!ifdef $(DTB_DIR)
|
||||
#
|
||||
# Embed flattened device tree (FDT) images for all known
|
||||
# variants of this platform
|
||||
#
|
||||
FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpBaseAEMv8x4GicV2) {
|
||||
$(DTB_DIR)/fvp-base-gicv2-psci.dtb
|
||||
}
|
||||
FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpBaseAEMv8x4GicV2Legacy) {
|
||||
$(DTB_DIR)/fvp-base-gicv2legacy-psci.dtb
|
||||
}
|
||||
FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpBaseAEMv8x4GicV3) {
|
||||
$(DTB_DIR)/fvp-base-gicv3-psci.dtb
|
||||
}
|
||||
FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpFoundationGicV2) {
|
||||
$(DTB_DIR)/fvp-foundation-gicv2-psci.dtb
|
||||
}
|
||||
FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpFoundationGicV2Legacy) {
|
||||
$(DTB_DIR)/fvp-foundation-gicv2legacy-psci.dtb
|
||||
}
|
||||
FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpFoundationGicV3) {
|
||||
$(DTB_DIR)/fvp-foundation-gicv3-psci.dtb
|
||||
}
|
||||
!endif
|
||||
|
||||
[FV.FVMAIN_COMPACT]
|
||||
FvAlignment = 16
|
||||
ERASE_POLARITY = 1
|
||||
MEMORY_MAPPED = TRUE
|
||||
STICKY_WRITE = TRUE
|
||||
LOCK_CAP = TRUE
|
||||
LOCK_STATUS = TRUE
|
||||
WRITE_DISABLED_CAP = TRUE
|
||||
WRITE_ENABLED_CAP = TRUE
|
||||
WRITE_STATUS = TRUE
|
||||
WRITE_LOCK_CAP = TRUE
|
||||
WRITE_LOCK_STATUS = TRUE
|
||||
READ_DISABLED_CAP = TRUE
|
||||
READ_ENABLED_CAP = TRUE
|
||||
READ_STATUS = TRUE
|
||||
READ_LOCK_CAP = TRUE
|
||||
READ_LOCK_STATUS = TRUE
|
||||
|
||||
!if $(EDK2_SKIP_PEICORE) == 1
|
||||
INF ArmPlatformPkg/PrePi/PeiMPCore.inf
|
||||
!else
|
||||
INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
|
||||
INF MdeModulePkg/Core/Pei/PeiMain.inf
|
||||
INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
|
||||
INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
|
||||
INF ArmPkg/Drivers/CpuPei/CpuPei.inf
|
||||
INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
|
||||
INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
|
||||
INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
|
||||
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
|
||||
!endif
|
||||
|
||||
FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
|
||||
SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
|
||||
SECTION FV_IMAGE = FVMAIN
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Rules are use with the [FV] section's module INF type to define
|
||||
# how an FFS file is created for a given INF file. The following Rule are the default
|
||||
# rules for the different module type. User can add the customized rules to define the
|
||||
# content of the FFS file.
|
||||
#
|
||||
################################################################################
|
||||
|
||||
|
||||
############################################################################
|
||||
# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #
|
||||
############################################################################
|
||||
#
|
||||
#[Rule.Common.DXE_DRIVER]
|
||||
# FILE DRIVER = $(NAMED_GUID) {
|
||||
# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
# COMPRESS PI_STD {
|
||||
# GUIDED {
|
||||
# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
# UI STRING="$(MODULE_NAME)" Optional
|
||||
# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
||||
# }
|
||||
# }
|
||||
# }
|
||||
#
|
||||
############################################################################
|
||||
|
||||
[Rule.Common.SEC]
|
||||
FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED FIXED {
|
||||
TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
}
|
||||
|
||||
[Rule.Common.PEI_CORE]
|
||||
FILE PEI_CORE = $(NAMED_GUID) FIXED {
|
||||
TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING ="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.PEIM]
|
||||
FILE PEIM = $(NAMED_GUID) FIXED {
|
||||
PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.PEIM.TIANOCOMPRESSED]
|
||||
FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
|
||||
PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
}
|
||||
|
||||
[Rule.Common.DXE_CORE]
|
||||
FILE DXE_CORE = $(NAMED_GUID) {
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.UEFI_DRIVER]
|
||||
FILE DRIVER = $(NAMED_GUID) {
|
||||
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.DXE_DRIVER]
|
||||
FILE DRIVER = $(NAMED_GUID) {
|
||||
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.DXE_RUNTIME_DRIVER]
|
||||
FILE DRIVER = $(NAMED_GUID) {
|
||||
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.UEFI_APPLICATION]
|
||||
FILE APPLICATION = $(NAMED_GUID) {
|
||||
UI STRING ="$(MODULE_NAME)" Optional
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
}
|
||||
|
||||
[Rule.Common.UEFI_DRIVER.BINARY]
|
||||
FILE DRIVER = $(NAMED_GUID) {
|
||||
DXE_DEPEX DXE_DEPEX Optional |.depex
|
||||
PE32 PE32 |.efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
||||
}
|
||||
|
||||
[Rule.Common.UEFI_APPLICATION.BINARY]
|
||||
FILE APPLICATION = $(NAMED_GUID) {
|
||||
PE32 PE32 |.efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
||||
}
|
||||
|
|
@ -1,297 +0,0 @@
|
|||
#
|
||||
# Copyright (c) 2011-2015, ARM Limited. All rights reserved.
|
||||
# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
#
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Defines Section - statements that will be processed to create a Makefile.
|
||||
#
|
||||
################################################################################
|
||||
[Defines]
|
||||
PLATFORM_NAME = ArmVExpressPkg-RTSM-A15_MPCore
|
||||
PLATFORM_GUID = 3a91a0f8-3af4-409d-a71d-a199dc134357
|
||||
PLATFORM_VERSION = 0.1
|
||||
DSC_SPECIFICATION = 0x00010005
|
||||
OUTPUT_DIRECTORY = Build/ArmVExpress-RTSM-A15_MPCore
|
||||
SUPPORTED_ARCHITECTURES = ARM
|
||||
BUILD_TARGETS = DEBUG|RELEASE
|
||||
SKUID_IDENTIFIER = DEFAULT
|
||||
FLASH_DEFINITION = ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15_MPCore.fdf
|
||||
|
||||
!include ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc
|
||||
|
||||
[LibraryClasses.common]
|
||||
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
|
||||
ArmCpuLib|ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.inf
|
||||
ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf
|
||||
|
||||
ArmPlatformSysConfigLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf
|
||||
NorFlashPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf
|
||||
LcdPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf
|
||||
|
||||
#DebugAgentTimerLib|ArmPlatformPkg/ArmVExpressPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf
|
||||
|
||||
TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
|
||||
|
||||
# Virtio Support
|
||||
VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
|
||||
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
|
||||
|
||||
[LibraryClasses.common.SEC]
|
||||
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf
|
||||
ArmPlatformSecLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf
|
||||
ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLibSec.inf
|
||||
|
||||
[LibraryClasses.common.UEFI_DRIVER, LibraryClasses.common.UEFI_APPLICATION, LibraryClasses.common.DXE_RUNTIME_DRIVER, LibraryClasses.common.DXE_DRIVER]
|
||||
PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
|
||||
|
||||
[BuildOptions]
|
||||
RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu Cortex-A15 -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM
|
||||
|
||||
GCC:*_*_ARM_PLATFORM_FLAGS == -mcpu=cortex-a15 -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM
|
||||
|
||||
XCODE:*_*_ARM_PLATFORM_FLAGS = -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Pcd Section - list of all EDK II PCD Entries defined by this Platform
|
||||
#
|
||||
################################################################################
|
||||
|
||||
[PcdsFeatureFlag.common]
|
||||
!ifdef EDK2_SKIP_PEICORE
|
||||
gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|TRUE
|
||||
gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|TRUE
|
||||
!endif
|
||||
|
||||
## If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe.
|
||||
# It could be set FALSE to save size.
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
|
||||
|
||||
[PcdsFixedAtBuild.common]
|
||||
gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM Versatile Express"
|
||||
gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"ArmVExpress-RTSM"
|
||||
|
||||
gArmPlatformTokenSpaceGuid.PcdCoreCount|2
|
||||
|
||||
#
|
||||
# NV Storage PCDs. Use base of 0x0C000000 for NOR1
|
||||
#
|
||||
!if $(EDK2_ARMVE_SUPPORT_QEMU) == 1
|
||||
# QEMU only models a single flash block size, so use larger blocks
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x0FF00000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x00040000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x0FF40000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x00040000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x0FF80000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00040000
|
||||
!else
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x0FFC0000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x00010000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x0FFD0000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x00010000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x0FFE0000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000
|
||||
!endif
|
||||
|
||||
gArmTokenSpaceGuid.PcdVFPEnabled|1
|
||||
|
||||
# Stacks for MPCores in Secure World
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0x2E009000
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x1000
|
||||
|
||||
# Stacks for MPCores in Monitor Mode
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0x2E008000
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x100
|
||||
|
||||
# Stacks for MPCores in Normal World
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x2E000000
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000
|
||||
|
||||
# System Memory (1GB)
|
||||
gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000
|
||||
gArmTokenSpaceGuid.PcdSystemMemorySize|0x40000000
|
||||
|
||||
# Size of the region used by UEFI in permanent memory (Reserved 64MB)
|
||||
gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000
|
||||
|
||||
#
|
||||
# ARM Pcds
|
||||
#
|
||||
gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000040000000
|
||||
|
||||
#
|
||||
# ARM PrimeCell
|
||||
#
|
||||
|
||||
## SP805 Watchdog - Motherboard Watchdog
|
||||
gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x1C0F0000
|
||||
|
||||
## PL011 - Serial Terminal
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x1c090000
|
||||
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|38400
|
||||
|
||||
## PL031 RealTimeClock
|
||||
gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C170000
|
||||
|
||||
## PL111 Versatile Express Motherboard controller
|
||||
gArmPlatformTokenSpaceGuid.PcdPL111LcdBase|0x1C1F0000
|
||||
|
||||
## PL180 MMC/SD card controller
|
||||
gArmPlatformTokenSpaceGuid.PcdPL180SysMciRegAddress|0x1C010048
|
||||
gArmPlatformTokenSpaceGuid.PcdPL180MciBaseAddress|0x1C050000
|
||||
|
||||
#
|
||||
# ARM General Interrupt Controller
|
||||
#
|
||||
gArmTokenSpaceGuid.PcdGicDistributorBase|0x2C001000
|
||||
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x2C002000
|
||||
|
||||
#
|
||||
# ARM OS Loader
|
||||
#
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription|L"Linux from SemiHosting"
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath|L"Fv(12C68BE9-0996-49D3-8C5B-4957379027EE)/LinuxLoader.efi"
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument|L"VenHw(C5B9C74A-6D72-4719-99AB-C59F199091EB)/Image -c \"console=ttyAMA0,38400 earlyprintk debug verbose\""
|
||||
|
||||
# Use the serial console (ConIn & ConOut) and the Graphic driver (ConOut)
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(38400,8,N,1)/VenPcAnsi();VenHw(407B4008-BF5B-11DF-9547-CF16E0D72085)"
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(38400,8,N,1)/VenPcAnsi()"
|
||||
|
||||
#
|
||||
# ARM Architectural Timer Frequency
|
||||
#
|
||||
gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|100000000
|
||||
|
||||
[PcdsDynamicDefault.common]
|
||||
#
|
||||
# The size of a dynamic PCD of the (VOID*) type can not be increased at run
|
||||
# time from its size at build time. Set the "PcdFdtDevicePaths" PCD to a 128
|
||||
# character "empty" string, to allow to be able to set FDT text device paths
|
||||
# up to 128 characters long.
|
||||
#
|
||||
gEmbeddedTokenSpaceGuid.PcdFdtDevicePaths|L" "
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Components Section - list of all EDK II Modules needed by this Platform
|
||||
#
|
||||
################################################################################
|
||||
[Components.common]
|
||||
|
||||
#
|
||||
# SEC
|
||||
#
|
||||
ArmPlatformPkg/Sec/Sec.inf {
|
||||
<LibraryClasses>
|
||||
# Use the implementation which set the Secure bits
|
||||
ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf
|
||||
}
|
||||
|
||||
#
|
||||
# PEI Phase modules
|
||||
#
|
||||
!ifdef EDK2_SKIP_PEICORE
|
||||
ArmPlatformPkg/PrePi/PeiMPCore.inf {
|
||||
<LibraryClasses>
|
||||
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
|
||||
ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf
|
||||
}
|
||||
!else
|
||||
ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
|
||||
MdeModulePkg/Core/Pei/PeiMain.inf
|
||||
MdeModulePkg/Universal/PCD/Pei/Pcd.inf {
|
||||
<LibraryClasses>
|
||||
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
|
||||
}
|
||||
ArmPlatformPkg/PlatformPei/PlatformPeim.inf
|
||||
ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
|
||||
ArmPkg/Drivers/CpuPei/CpuPei.inf
|
||||
IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
|
||||
Nt32Pkg/BootModePei/BootModePei.inf
|
||||
MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
|
||||
MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
|
||||
<LibraryClasses>
|
||||
NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
|
||||
}
|
||||
!endif
|
||||
|
||||
#
|
||||
# DXE
|
||||
#
|
||||
MdeModulePkg/Core/Dxe/DxeMain.inf {
|
||||
<LibraryClasses>
|
||||
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
|
||||
NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
|
||||
}
|
||||
|
||||
#
|
||||
# Architectural Protocols
|
||||
#
|
||||
ArmPkg/Drivers/CpuDxe/CpuDxe.inf
|
||||
MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
|
||||
MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
|
||||
MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
|
||||
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
|
||||
<LibraryClasses>
|
||||
NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
|
||||
}
|
||||
MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
|
||||
MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
|
||||
EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
|
||||
EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
|
||||
EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
|
||||
|
||||
MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
|
||||
MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
|
||||
MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
|
||||
MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
|
||||
MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
|
||||
|
||||
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
|
||||
|
||||
ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
|
||||
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
|
||||
ArmPkg/Drivers/TimerDxe/TimerDxe.inf
|
||||
ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
|
||||
ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
|
||||
|
||||
#
|
||||
# Semi-hosting filesystem
|
||||
#
|
||||
ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
|
||||
|
||||
#
|
||||
# Multimedia Card Interface
|
||||
#
|
||||
EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
|
||||
ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf
|
||||
|
||||
#
|
||||
# Platform Driver
|
||||
#
|
||||
ArmPlatformPkg/ArmVExpressPkg/ArmVExpressDxe/ArmFvpDxe.inf
|
||||
OvmfPkg/VirtioBlkDxe/VirtioBlk.inf
|
||||
|
||||
#
|
||||
# FAT filesystem + GPT/MBR partitioning
|
||||
#
|
||||
MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
|
||||
MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
|
||||
MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
|
||||
|
||||
#
|
||||
# Bds
|
||||
#
|
||||
MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
|
||||
ArmPlatformPkg/Bds/Bds.inf
|
||||
|
|
@ -1,365 +0,0 @@
|
|||
#
|
||||
# Copyright (c) 2011-2015, ARM Limited. All rights reserved.
|
||||
# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# FD Section
|
||||
# The [FD] Section is made up of the definition statements and a
|
||||
# description of what goes into the Flash Device Image. Each FD section
|
||||
# defines one flash "device" image. A flash device image may be one of
|
||||
# the following: Removable media bootable image (like a boot floppy
|
||||
# image,) an Option ROM image (that would be "flashed" into an add-in
|
||||
# card,) a System "Flash" image (that would be burned into a system's
|
||||
# flash) or an Update ("Capsule") image that will be used to update and
|
||||
# existing system flash.
|
||||
#
|
||||
################################################################################
|
||||
|
||||
[FD.RTSM_VE_Cortex-A15_MPCore_EFI]
|
||||
BaseAddress = 0x08000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.
|
||||
Size = 0x00300000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device
|
||||
ErasePolarity = 1
|
||||
|
||||
# This one is tricky, it must be: BlockSize * NumBlocks = Size
|
||||
BlockSize = 0x00001000
|
||||
NumBlocks = 0x300
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Following are lists of FD Region layout which correspond to the locations of different
|
||||
# images within the flash device.
|
||||
#
|
||||
# Regions must be defined in ascending order and may not overlap.
|
||||
#
|
||||
# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
|
||||
# the pipe "|" character, followed by the size of the region, also in hex with the leading
|
||||
# "0x" characters. Like:
|
||||
# Offset|Size
|
||||
# PcdOffsetCName|PcdSizeCName
|
||||
# RegionType <FV, DATA, or FILE>
|
||||
#
|
||||
################################################################################
|
||||
|
||||
0x00000000|0x00080000
|
||||
gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize
|
||||
FV = FVMAIN_SEC
|
||||
|
||||
0x00080000|0x00280000
|
||||
gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
|
||||
FV = FVMAIN_COMPACT
|
||||
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# FV Section
|
||||
#
|
||||
# [FV] section is used to define what components or modules are placed within a flash
|
||||
# device file. This section also defines order the components and modules are positioned
|
||||
# within the image. The [FV] section consists of define statements, set statements and
|
||||
# module statements.
|
||||
#
|
||||
################################################################################
|
||||
|
||||
[FV.FVMAIN_SEC]
|
||||
FvAlignment = 8
|
||||
ERASE_POLARITY = 1
|
||||
MEMORY_MAPPED = TRUE
|
||||
STICKY_WRITE = TRUE
|
||||
LOCK_CAP = TRUE
|
||||
LOCK_STATUS = TRUE
|
||||
WRITE_DISABLED_CAP = TRUE
|
||||
WRITE_ENABLED_CAP = TRUE
|
||||
WRITE_STATUS = TRUE
|
||||
WRITE_LOCK_CAP = TRUE
|
||||
WRITE_LOCK_STATUS = TRUE
|
||||
READ_DISABLED_CAP = TRUE
|
||||
READ_ENABLED_CAP = TRUE
|
||||
READ_STATUS = TRUE
|
||||
READ_LOCK_CAP = TRUE
|
||||
READ_LOCK_STATUS = TRUE
|
||||
|
||||
INF ArmPlatformPkg/Sec/Sec.inf
|
||||
|
||||
|
||||
[FV.FvMain]
|
||||
BlockSize = 0x40
|
||||
NumBlocks = 0 # This FV gets compressed so make it just big enough
|
||||
FvAlignment = 8 # FV alignment and FV attributes setting.
|
||||
ERASE_POLARITY = 1
|
||||
MEMORY_MAPPED = TRUE
|
||||
STICKY_WRITE = TRUE
|
||||
LOCK_CAP = TRUE
|
||||
LOCK_STATUS = TRUE
|
||||
WRITE_DISABLED_CAP = TRUE
|
||||
WRITE_ENABLED_CAP = TRUE
|
||||
WRITE_STATUS = TRUE
|
||||
WRITE_LOCK_CAP = TRUE
|
||||
WRITE_LOCK_STATUS = TRUE
|
||||
READ_DISABLED_CAP = TRUE
|
||||
READ_ENABLED_CAP = TRUE
|
||||
READ_STATUS = TRUE
|
||||
READ_LOCK_CAP = TRUE
|
||||
READ_LOCK_STATUS = TRUE
|
||||
FvNameGuid = 12c68be9-0996-49d3-8c5b-4957379027ee
|
||||
|
||||
APRIORI DXE {
|
||||
INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
|
||||
}
|
||||
|
||||
INF MdeModulePkg/Core/Dxe/DxeMain.inf
|
||||
INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
|
||||
|
||||
#
|
||||
# PI DXE Drivers producing Architectural Protocols (EFI Services)
|
||||
#
|
||||
INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
|
||||
INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
|
||||
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
|
||||
INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
|
||||
INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
|
||||
INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
|
||||
INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
|
||||
INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
|
||||
INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
|
||||
INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
|
||||
|
||||
INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
|
||||
|
||||
#
|
||||
# Networking stack
|
||||
#
|
||||
INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
|
||||
INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
|
||||
INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
|
||||
INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
|
||||
INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
|
||||
INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
|
||||
INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
|
||||
INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
|
||||
INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
|
||||
INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
|
||||
INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
|
||||
|
||||
#
|
||||
# Multiple Console IO support
|
||||
#
|
||||
INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
|
||||
INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
|
||||
INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
|
||||
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
|
||||
INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
|
||||
|
||||
INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
|
||||
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
|
||||
INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
|
||||
INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
|
||||
INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
|
||||
|
||||
#
|
||||
# Semi-hosting filesystem
|
||||
#
|
||||
INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
|
||||
|
||||
#
|
||||
# FAT filesystem + GPT/MBR partitioning
|
||||
#
|
||||
INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
|
||||
INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
|
||||
INF FatBinPkg/EnhancedFatDxe/Fat.inf
|
||||
INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
|
||||
|
||||
# Versatile Express FileSystem
|
||||
INF ArmPlatformPkg/FileSystem/BootMonFs/BootMonFs.inf
|
||||
|
||||
#
|
||||
# Multimedia Card Interface
|
||||
#
|
||||
INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
|
||||
INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf
|
||||
|
||||
#
|
||||
# Platform Driver
|
||||
#
|
||||
INF ArmPlatformPkg/ArmVExpressPkg/ArmVExpressDxe/ArmFvpDxe.inf
|
||||
INF OvmfPkg/VirtioBlkDxe/VirtioBlk.inf
|
||||
|
||||
#
|
||||
# UEFI application (Shell Embedded Boot Loader)
|
||||
#
|
||||
INF ShellBinPkg/UefiShell/UefiShell.inf
|
||||
|
||||
#
|
||||
# Bds
|
||||
#
|
||||
INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
|
||||
INF ArmPlatformPkg/Bds/Bds.inf
|
||||
|
||||
# FV Filesystem
|
||||
INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf
|
||||
|
||||
#
|
||||
# FDT installation
|
||||
#
|
||||
# The UEFI driver is at the end of the list of the driver to be dispatched
|
||||
# after the device drivers (eg: Ethernet) to ensure we have support for them.
|
||||
INF EmbeddedPkg/Drivers/FdtPlatformDxe/FdtPlatformDxe.inf
|
||||
|
||||
# Example to add a Device Tree to the Firmware Volume
|
||||
#FILE FREEFORM = PCD(gArmVExpressTokenSpaceGuid.PcdFdtVExpressFvpA15x4) {
|
||||
# SECTION RAW = ArmPlatformPkg/ArmVExpressPkg/Fdts/rtsm_ve-ca15x4.dtb
|
||||
#}
|
||||
|
||||
# Legacy Linux Loader
|
||||
INF ArmPkg/Application/LinuxLoader/LinuxLoader.inf
|
||||
|
||||
[FV.FVMAIN_COMPACT]
|
||||
FvAlignment = 8
|
||||
ERASE_POLARITY = 1
|
||||
MEMORY_MAPPED = TRUE
|
||||
STICKY_WRITE = TRUE
|
||||
LOCK_CAP = TRUE
|
||||
LOCK_STATUS = TRUE
|
||||
WRITE_DISABLED_CAP = TRUE
|
||||
WRITE_ENABLED_CAP = TRUE
|
||||
WRITE_STATUS = TRUE
|
||||
WRITE_LOCK_CAP = TRUE
|
||||
WRITE_LOCK_STATUS = TRUE
|
||||
READ_DISABLED_CAP = TRUE
|
||||
READ_ENABLED_CAP = TRUE
|
||||
READ_STATUS = TRUE
|
||||
READ_LOCK_CAP = TRUE
|
||||
READ_LOCK_STATUS = TRUE
|
||||
|
||||
!if $(EDK2_SKIP_PEICORE) == 1
|
||||
INF ArmPlatformPkg/PrePi/PeiMPCore.inf
|
||||
!else
|
||||
INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
|
||||
INF MdeModulePkg/Core/Pei/PeiMain.inf
|
||||
INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
|
||||
INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
|
||||
INF ArmPkg/Drivers/CpuPei/CpuPei.inf
|
||||
INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
|
||||
INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
|
||||
INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
|
||||
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
|
||||
!endif
|
||||
|
||||
FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
|
||||
SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
|
||||
SECTION FV_IMAGE = FVMAIN
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Rules are use with the [FV] section's module INF type to define
|
||||
# how an FFS file is created for a given INF file. The following Rule are the default
|
||||
# rules for the different module type. User can add the customized rules to define the
|
||||
# content of the FFS file.
|
||||
#
|
||||
################################################################################
|
||||
|
||||
|
||||
############################################################################
|
||||
# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #
|
||||
############################################################################
|
||||
#
|
||||
#[Rule.Common.DXE_DRIVER]
|
||||
# FILE DRIVER = $(NAMED_GUID) {
|
||||
# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
# COMPRESS PI_STD {
|
||||
# GUIDED {
|
||||
# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
# UI STRING="$(MODULE_NAME)" Optional
|
||||
# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
||||
# }
|
||||
# }
|
||||
# }
|
||||
#
|
||||
############################################################################
|
||||
|
||||
[Rule.Common.SEC]
|
||||
FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
|
||||
TE TE Align = 32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
}
|
||||
|
||||
[Rule.Common.PEI_CORE]
|
||||
FILE PEI_CORE = $(NAMED_GUID) {
|
||||
TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING ="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.PEIM]
|
||||
FILE PEIM = $(NAMED_GUID) {
|
||||
PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.PEIM.TIANOCOMPRESSED]
|
||||
FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
|
||||
PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
}
|
||||
|
||||
[Rule.Common.DXE_CORE]
|
||||
FILE DXE_CORE = $(NAMED_GUID) {
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.UEFI_DRIVER]
|
||||
FILE DRIVER = $(NAMED_GUID) {
|
||||
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.DXE_DRIVER]
|
||||
FILE DRIVER = $(NAMED_GUID) {
|
||||
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.DXE_RUNTIME_DRIVER]
|
||||
FILE DRIVER = $(NAMED_GUID) {
|
||||
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.UEFI_APPLICATION]
|
||||
FILE APPLICATION = $(NAMED_GUID) {
|
||||
UI STRING ="$(MODULE_NAME)" Optional
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
}
|
||||
|
||||
[Rule.Common.UEFI_DRIVER.BINARY]
|
||||
FILE DRIVER = $(NAMED_GUID) {
|
||||
DXE_DEPEX DXE_DEPEX Optional |.depex
|
||||
PE32 PE32 |.efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
||||
}
|
||||
|
||||
[Rule.Common.UEFI_APPLICATION.BINARY]
|
||||
FILE APPLICATION = $(NAMED_GUID) {
|
||||
PE32 PE32 |.efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
||||
}
|
||||
|
|
@ -479,6 +479,9 @@ BdsEntry (
|
|||
Status = gBS->CalculateCrc32 ((VOID*)gST, gST->Hdr.HeaderSize, &gST->Hdr.CRC32);
|
||||
ASSERT_EFI_ERROR (Status);
|
||||
|
||||
// Now we need to setup the EFI System Table with information about the console devices.
|
||||
InitializeConsole ();
|
||||
|
||||
// If BootNext environment variable is defined then we just load it !
|
||||
BootNextSize = sizeof(UINT16);
|
||||
Status = GetGlobalEnvironmentVariable (L"BootNext", NULL, &BootNextSize, (VOID**)&BootNext);
|
||||
|
|
@ -518,9 +521,6 @@ BdsEntry (
|
|||
// If Boot Order does not exist then create a default entry
|
||||
DefineDefaultBootEntries ();
|
||||
|
||||
// Now we need to setup the EFI System Table with information about the console devices.
|
||||
InitializeConsole ();
|
||||
|
||||
//
|
||||
// Update the CRC32 in the EFI System Table header
|
||||
//
|
||||
|
|
|
|||
|
|
@ -1,25 +0,0 @@
|
|||
/** @file
|
||||
*
|
||||
* Copyright (c) 2013, ARM Limited. All rights reserved.
|
||||
*
|
||||
* This program and the accompanying materials
|
||||
* are licensed and made available under the terms and conditions of the BSD License
|
||||
* which accompanies this distribution. The full text of the license may be found at
|
||||
* http://opensource.org/licenses/bsd-license.php
|
||||
*
|
||||
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
*
|
||||
**/
|
||||
|
||||
#include <Chipset/AArch64.h>
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
ArmSecArchTrustzoneInit (
|
||||
VOID
|
||||
)
|
||||
{
|
||||
// Do not trap any access to Floating Point and Advanced SIMD in EL3.
|
||||
ArmWriteCptr (0);
|
||||
}
|
||||
|
|
@ -1,93 +0,0 @@
|
|||
#========================================================================================
|
||||
# Copyright (c) 2011-2014, ARM Limited. All rights reserved.
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http:#opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
#=======================================================================================
|
||||
|
||||
#include <AsmMacroIoLibV8.h>
|
||||
#include <Chipset/AArch64.h>
|
||||
|
||||
#start of the code section
|
||||
.text
|
||||
.align 3
|
||||
|
||||
GCC_ASM_EXPORT(SwitchToNSExceptionLevel1)
|
||||
GCC_ASM_EXPORT(enter_monitor_mode)
|
||||
GCC_ASM_EXPORT(return_from_exception)
|
||||
GCC_ASM_EXPORT(copy_cpsr_into_spsr)
|
||||
GCC_ASM_EXPORT(set_non_secure_mode)
|
||||
|
||||
// Switch from EL3 to NS-EL1
|
||||
ASM_PFX(SwitchToNSExceptionLevel1):
|
||||
// Now setup our EL1. Controlled by EL2 config on Model
|
||||
mrs x0, hcr_el2 // Read EL2 Hypervisor configuration Register
|
||||
orr x0, x0, #(1 << 31) // Set EL1 to be 64bit
|
||||
|
||||
// Send all interrupts to their respective Exception levels for EL2
|
||||
and x0, x0, #~(ARM_HCR_FMO | ARM_HCR_IMO | ARM_HCR_AMO) // Disable virtual FIQ, IRQ, SError and Abort
|
||||
msr hcr_el2, x0 // Write back our settings
|
||||
|
||||
msr cptr_el2, xzr // Disable copro traps to EL2
|
||||
|
||||
msr sctlr_el2, xzr
|
||||
|
||||
// Enable architected timer access
|
||||
mrs x0, cnthctl_el2
|
||||
orr x0, x0, #3 // Enable EL1 access to timers
|
||||
msr cnthctl_el2, x0
|
||||
|
||||
mrs x0, cntkctl_el1
|
||||
orr x0, x0, #3 // EL0 access to counters
|
||||
msr cntkctl_el1, x0
|
||||
|
||||
// Set ID regs
|
||||
mrs x0, midr_el1
|
||||
mrs x1, mpidr_el1
|
||||
msr vpidr_el2, x0
|
||||
msr vmpidr_el2, x1
|
||||
|
||||
ret
|
||||
|
||||
|
||||
// EL3 on AArch64 is Secure/monitor so this funtion is reduced vs ARMv7
|
||||
// we don't need a mode switch, just setup the Arguments and jump.
|
||||
// x0: Monitor World EntryPoint
|
||||
// x1: MpId
|
||||
// x2: SecBootMode
|
||||
// x3: Secure Monitor mode stack
|
||||
ASM_PFX(enter_monitor_mode):
|
||||
mov x4, x0 // Swap EntryPoint and MpId registers
|
||||
mov x0, x1
|
||||
mov x1, x2
|
||||
mov x2, x3
|
||||
br x4
|
||||
|
||||
// Put the address in correct ELR_ELx and do a eret.
|
||||
// We may need to do some config before we change to another Mode.
|
||||
ASM_PFX(return_from_exception):
|
||||
msr elr_el3, x0
|
||||
eret
|
||||
|
||||
// For AArch64 we need to construct the spsr we want from individual bits and pieces.
|
||||
ASM_PFX(copy_cpsr_into_spsr):
|
||||
mrs x0, CurrentEl // Get the current exception level we are running at.
|
||||
mrs x1, SPSel // Which Stack are we using
|
||||
orr x0, x0, x1
|
||||
mrs x1, daif // Which interrupts are enabled
|
||||
orr x0, x0, x1
|
||||
msr spsr_el3, x0 // Write to spsr
|
||||
ret
|
||||
|
||||
// Get this from platform file.
|
||||
ASM_PFX(set_non_secure_mode):
|
||||
msr spsr_el3, x0
|
||||
ret
|
||||
|
||||
ASM_FUNCTION_REMOVE_IF_UNREFERENCED
|
||||
|
|
@ -1,139 +0,0 @@
|
|||
//
|
||||
// Copyright (c) 2011-2014, ARM Limited. All rights reserved.
|
||||
//
|
||||
// This program and the accompanying materials
|
||||
// are licensed and made available under the terms and conditions of the BSD License
|
||||
// which accompanies this distribution. The full text of the license may be found at
|
||||
// http://opensource.org/licenses/bsd-license.php
|
||||
//
|
||||
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
//
|
||||
//
|
||||
|
||||
#include <AutoGen.h>
|
||||
#include <AsmMacroIoLibV8.h>
|
||||
#include "SecInternal.h"
|
||||
|
||||
.text
|
||||
.align 3
|
||||
|
||||
GCC_ASM_IMPORT(CEntryPoint)
|
||||
GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
|
||||
GCC_ASM_IMPORT(ArmPlatformGetCorePosition)
|
||||
GCC_ASM_IMPORT(ArmPlatformSecBootAction)
|
||||
GCC_ASM_IMPORT(ArmPlatformSecBootMemoryInit)
|
||||
GCC_ASM_IMPORT(ArmDisableInterrupts)
|
||||
GCC_ASM_IMPORT(ArmDisableCachesAndMmu)
|
||||
GCC_ASM_IMPORT(ArmReadMpidr)
|
||||
GCC_ASM_IMPORT(ArmCallWFE)
|
||||
GCC_ASM_EXPORT(_ModuleEntryPoint)
|
||||
|
||||
StartupAddr: .8byte ASM_PFX(CEntryPoint)
|
||||
|
||||
ASM_PFX(_ModuleEntryPoint):
|
||||
|
||||
// NOTE: We could be booting from EL3, EL2 or EL1. Need to correctly detect
|
||||
// and configure the system accordingly. EL2 is default if possible.
|
||||
// If we started in EL3 we need to switch and run at EL2.
|
||||
// If we are running at EL2 stay in EL2
|
||||
// If we are starting at EL1 stay in EL1.
|
||||
|
||||
// Sec only runs in EL3. Othewise we jump to PEI without changing anything.
|
||||
// If Sec runs we change to EL2 before switching to PEI.
|
||||
|
||||
// Which EL are we running at? Every EL needs some level of setup...
|
||||
EL1_OR_EL2_OR_EL3(x0)
|
||||
1:// If we are at EL1 or EL2 leave SEC for PEI.
|
||||
2:b ASM_PFX(JumpToPEI)
|
||||
// If we are at EL3 we need to configure it and switch to EL2
|
||||
3:b ASM_PFX(MainEntryPoint)
|
||||
|
||||
ASM_PFX(MainEntryPoint):
|
||||
// First ensure all interrupts are disabled
|
||||
bl ASM_PFX(ArmDisableInterrupts)
|
||||
|
||||
// Ensure that the MMU and caches are off
|
||||
bl ASM_PFX(ArmDisableCachesAndMmu)
|
||||
|
||||
// By default, we are doing a cold boot
|
||||
mov x10, #ARM_SEC_COLD_BOOT
|
||||
|
||||
// Jump to Platform Specific Boot Action function
|
||||
bl ASM_PFX(ArmPlatformSecBootAction)
|
||||
|
||||
_IdentifyCpu:
|
||||
// Identify CPU ID
|
||||
bl ASM_PFX(ArmReadMpidr)
|
||||
// Keep a copy of the MpId register value
|
||||
mov x5, x0
|
||||
|
||||
// Is it the Primary Core ?
|
||||
bl ASM_PFX(ArmPlatformIsPrimaryCore)
|
||||
cmp x0, #1
|
||||
// Only the primary core initialize the memory (SMC)
|
||||
b.eq _InitMem
|
||||
|
||||
_WaitInitMem:
|
||||
// If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
|
||||
// Otherwise we have to wait the Primary Core to finish the initialization
|
||||
cmp x10, #ARM_SEC_COLD_BOOT
|
||||
b.ne _SetupSecondaryCoreStack
|
||||
|
||||
// Wait for the primary core to initialize the initial memory (event: BOOT_MEM_INIT)
|
||||
bl ASM_PFX(ArmCallWFE)
|
||||
// Now the Init Mem is initialized, we setup the secondary core stacks
|
||||
b _SetupSecondaryCoreStack
|
||||
|
||||
_InitMem:
|
||||
// If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
|
||||
cmp x10, #ARM_SEC_COLD_BOOT
|
||||
b.ne _SetupPrimaryCoreStack
|
||||
|
||||
// Initialize Init Boot Memory
|
||||
bl ASM_PFX(ArmPlatformSecBootMemoryInit)
|
||||
|
||||
_SetupPrimaryCoreStack:
|
||||
// Get the top of the primary stacks (and the base of the secondary stacks)
|
||||
LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), x1)
|
||||
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), x2)
|
||||
add x1, x1, x2
|
||||
|
||||
mov sp, x1
|
||||
b _PrepareArguments
|
||||
|
||||
_SetupSecondaryCoreStack:
|
||||
// Get the top of the primary stacks (and the base of the secondary stacks)
|
||||
LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), x1)
|
||||
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), x2)
|
||||
add x6, x1, x2
|
||||
|
||||
// Get the Core Position
|
||||
mov x0, x5
|
||||
bl ASM_PFX(ArmPlatformGetCorePosition)
|
||||
// The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
|
||||
add x0, x0, #1
|
||||
|
||||
// StackOffset = CorePos * StackSize
|
||||
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecSecondaryStackSize), x2)
|
||||
mul x0, x0, x2
|
||||
// SP = StackBase + StackOffset
|
||||
add sp, x6, x0
|
||||
|
||||
_PrepareArguments:
|
||||
// Move sec startup address into a data register
|
||||
// Ensure we're jumping to FV version of the code (not boot remapped alias)
|
||||
ldr x3, StartupAddr
|
||||
|
||||
// Jump to SEC C code
|
||||
// r0 = mp_id
|
||||
// r1 = Boot Mode
|
||||
mov x0, x5
|
||||
mov x1, x10
|
||||
blr x3
|
||||
|
||||
ret
|
||||
|
||||
ASM_PFX(JumpToPEI):
|
||||
LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), x0)
|
||||
blr x0
|
||||
|
|
@ -1,25 +0,0 @@
|
|||
/** @file
|
||||
*
|
||||
* Copyright (c) 2013, ARM Limited. All rights reserved.
|
||||
*
|
||||
* This program and the accompanying materials
|
||||
* are licensed and made available under the terms and conditions of the BSD License
|
||||
* which accompanies this distribution. The full text of the license may be found at
|
||||
* http://opensource.org/licenses/bsd-license.php
|
||||
*
|
||||
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
*
|
||||
**/
|
||||
|
||||
#include <Chipset/ArmV7.h>
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
ArmSecArchTrustzoneInit (
|
||||
VOID
|
||||
)
|
||||
{
|
||||
// Write to CP15 Non-secure Access Control Register
|
||||
ArmWriteNsacr (PcdGet32 (PcdArmNsacr));
|
||||
}
|
||||
|
|
@ -1,75 +0,0 @@
|
|||
#========================================================================================
|
||||
# Copyright (c) 2011-2014, ARM Limited. All rights reserved.
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
#=======================================================================================
|
||||
|
||||
#start of the code section
|
||||
.text
|
||||
.align 3
|
||||
|
||||
GCC_ASM_EXPORT(return_from_exception)
|
||||
GCC_ASM_EXPORT(enter_monitor_mode)
|
||||
GCC_ASM_EXPORT(copy_cpsr_into_spsr)
|
||||
GCC_ASM_EXPORT(set_non_secure_mode)
|
||||
|
||||
# r0: Monitor World EntryPoint
|
||||
# r1: MpId
|
||||
# r2: SecBootMode
|
||||
# r3: Secure Monitor mode stack
|
||||
ASM_PFX(enter_monitor_mode):
|
||||
cmp r3, #0 @ If a Secure Monitor stack base has not been defined then use the Secure stack
|
||||
moveq r3, sp
|
||||
|
||||
mrs r4, cpsr @ Save current mode (SVC) in r4
|
||||
bic r5, r4, #0x1f @ Clear all mode bits
|
||||
orr r5, r5, #0x16 @ Set bits for Monitor mode
|
||||
msr cpsr_cxsf, r5 @ We are now in Monitor Mode
|
||||
|
||||
mov sp, r3 @ Set the stack of the Monitor Mode
|
||||
|
||||
mov lr, r0 @ Use the pass entrypoint as lr
|
||||
|
||||
msr spsr_cxsf, r4 @ Use saved mode for the MOVS jump to the kernel
|
||||
|
||||
mov r4, r0 @ Swap EntryPoint and MpId registers
|
||||
mov r0, r1
|
||||
mov r1, r2
|
||||
mov r2, r3
|
||||
|
||||
bx r4
|
||||
|
||||
# Return-from-exception is not an interworking return, so we must do it
|
||||
# in two steps, in case r0 has the Thumb bit set.
|
||||
ASM_PFX(return_from_exception):
|
||||
adr lr, returned_exception
|
||||
movs pc, lr
|
||||
returned_exception: @ We are now in non-secure state
|
||||
bx r0
|
||||
|
||||
# Save the current Program Status Register (PSR) into the Saved PSR
|
||||
ASM_PFX(copy_cpsr_into_spsr):
|
||||
mrs r0, cpsr
|
||||
msr spsr_cxsf, r0
|
||||
bx lr
|
||||
|
||||
# Set the Non Secure Mode
|
||||
ASM_PFX(set_non_secure_mode):
|
||||
push { r1 }
|
||||
and r0, r0, #0x1f @ Keep only the mode bits
|
||||
mrs r1, spsr @ Read the spsr
|
||||
bic r1, r1, #0x1f @ Clear all mode bits
|
||||
orr r1, r1, r0
|
||||
msr spsr_cxsf, r1 @ write back spsr (may have caused a mode switch)
|
||||
isb
|
||||
pop { r1 }
|
||||
bx lr @ return (hopefully thumb-safe!)
|
||||
|
||||
ASM_FUNCTION_REMOVE_IF_UNREFERENCED
|
||||
|
|
@ -1,77 +0,0 @@
|
|||
//
|
||||
// Copyright (c) 2011-2012, ARM Limited. All rights reserved.
|
||||
//
|
||||
// This program and the accompanying materials
|
||||
// are licensed and made available under the terms and conditions of the BSD License
|
||||
// which accompanies this distribution. The full text of the license may be found at
|
||||
// http://opensource.org/licenses/bsd-license.php
|
||||
//
|
||||
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
//
|
||||
//
|
||||
|
||||
EXPORT return_from_exception
|
||||
EXPORT enter_monitor_mode
|
||||
EXPORT copy_cpsr_into_spsr
|
||||
EXPORT set_non_secure_mode
|
||||
|
||||
AREA Helper, CODE, READONLY
|
||||
|
||||
// r0: Monitor World EntryPoint
|
||||
// r1: MpId
|
||||
// r2: SecBootMode
|
||||
// r3: Secure Monitor mode stack
|
||||
enter_monitor_mode FUNCTION
|
||||
cmp r3, #0 // If a Secure Monitor stack base has not been defined then use the Secure stack
|
||||
moveq r3, sp
|
||||
|
||||
mrs r4, cpsr // Save current mode (SVC) in r4
|
||||
bic r5, r4, #0x1f // Clear all mode bits
|
||||
orr r5, r5, #0x16 // Set bits for Monitor mode
|
||||
msr cpsr_cxsf, r5 // We are now in Monitor Mode
|
||||
|
||||
mov sp, r3 // Set the stack of the Monitor Mode
|
||||
|
||||
mov lr, r0 // Use the pass entrypoint as lr
|
||||
|
||||
msr spsr_cxsf, r4 // Use saved mode for the MOVS jump to the kernel
|
||||
|
||||
mov r4, r0 // Swap EntryPoint and MpId registers
|
||||
mov r0, r1
|
||||
mov r1, r2
|
||||
mov r2, r3
|
||||
|
||||
bx r4
|
||||
ENDFUNC
|
||||
|
||||
// Return-from-exception is not an interworking return, so we must do it
|
||||
// in two steps, in case r0 has the Thumb bit set.
|
||||
return_from_exception
|
||||
adr lr, returned_exception
|
||||
movs pc, lr
|
||||
returned_exception // We are now in non-secure state
|
||||
bx r0
|
||||
|
||||
// Save the current Program Status Register (PSR) into the Saved PSR
|
||||
copy_cpsr_into_spsr
|
||||
mrs r0, cpsr
|
||||
msr spsr_cxsf, r0
|
||||
bx lr
|
||||
|
||||
// Set the Non Secure Mode
|
||||
set_non_secure_mode
|
||||
push { r1 }
|
||||
and r0, r0, #0x1f // Keep only the mode bits
|
||||
mrs r1, spsr // Read the spsr
|
||||
bic r1, r1, #0x1f // Clear all mode bits
|
||||
orr r1, r1, r0
|
||||
msr spsr_cxsf, r1 // write back spsr (may have caused a mode switch)
|
||||
isb
|
||||
pop { r1 }
|
||||
bx lr // return (hopefully thumb-safe!)
|
||||
|
||||
dead
|
||||
B dead
|
||||
|
||||
END
|
||||
|
|
@ -1,118 +0,0 @@
|
|||
//
|
||||
// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
|
||||
//
|
||||
// This program and the accompanying materials
|
||||
// are licensed and made available under the terms and conditions of the BSD License
|
||||
// which accompanies this distribution. The full text of the license may be found at
|
||||
// http://opensource.org/licenses/bsd-license.php
|
||||
//
|
||||
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
//
|
||||
//
|
||||
|
||||
#include <AutoGen.h>
|
||||
#include <AsmMacroIoLib.h>
|
||||
#include "SecInternal.h"
|
||||
|
||||
.text
|
||||
.align 3
|
||||
|
||||
GCC_ASM_IMPORT(CEntryPoint)
|
||||
GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
|
||||
GCC_ASM_IMPORT(ArmPlatformGetCorePosition)
|
||||
GCC_ASM_IMPORT(ArmPlatformSecBootAction)
|
||||
GCC_ASM_IMPORT(ArmPlatformSecBootMemoryInit)
|
||||
GCC_ASM_IMPORT(ArmDisableInterrupts)
|
||||
GCC_ASM_IMPORT(ArmDisableCachesAndMmu)
|
||||
GCC_ASM_IMPORT(ArmReadMpidr)
|
||||
GCC_ASM_IMPORT(ArmCallWFE)
|
||||
GCC_ASM_EXPORT(_ModuleEntryPoint)
|
||||
|
||||
StartupAddr: .word ASM_PFX(CEntryPoint)
|
||||
|
||||
ASM_PFX(_ModuleEntryPoint):
|
||||
// First ensure all interrupts are disabled
|
||||
bl ASM_PFX(ArmDisableInterrupts)
|
||||
|
||||
// Ensure that the MMU and caches are off
|
||||
bl ASM_PFX(ArmDisableCachesAndMmu)
|
||||
|
||||
// By default, we are doing a cold boot
|
||||
mov r10, #ARM_SEC_COLD_BOOT
|
||||
|
||||
// Jump to Platform Specific Boot Action function
|
||||
blx ASM_PFX(ArmPlatformSecBootAction)
|
||||
|
||||
_IdentifyCpu:
|
||||
// Identify CPU ID
|
||||
bl ASM_PFX(ArmReadMpidr)
|
||||
// Keep a copy of the MpId register value
|
||||
mov r9, r0
|
||||
|
||||
// Is it the Primary Core ?
|
||||
bl ASM_PFX(ArmPlatformIsPrimaryCore)
|
||||
cmp r0, #1
|
||||
// Only the primary core initialize the memory (SMC)
|
||||
beq _InitMem
|
||||
|
||||
_WaitInitMem:
|
||||
// If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
|
||||
// Otherwise we have to wait the Primary Core to finish the initialization
|
||||
cmp r10, #ARM_SEC_COLD_BOOT
|
||||
bne _SetupSecondaryCoreStack
|
||||
|
||||
// Wait for the primary core to initialize the initial memory (event: BOOT_MEM_INIT)
|
||||
bl ASM_PFX(ArmCallWFE)
|
||||
// Now the Init Mem is initialized, we setup the secondary core stacks
|
||||
b _SetupSecondaryCoreStack
|
||||
|
||||
_InitMem:
|
||||
// If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
|
||||
cmp r10, #ARM_SEC_COLD_BOOT
|
||||
bne _SetupPrimaryCoreStack
|
||||
|
||||
// Initialize Init Boot Memory
|
||||
bl ASM_PFX(ArmPlatformSecBootMemoryInit)
|
||||
|
||||
_SetupPrimaryCoreStack:
|
||||
// Get the top of the primary stacks (and the base of the secondary stacks)
|
||||
LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)
|
||||
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)
|
||||
add r1, r1, r2
|
||||
|
||||
mov sp, r1
|
||||
b _PrepareArguments
|
||||
|
||||
_SetupSecondaryCoreStack:
|
||||
// Get the top of the primary stacks (and the base of the secondary stacks)
|
||||
LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)
|
||||
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)
|
||||
add r6, r1, r2
|
||||
|
||||
// Get the Core Position
|
||||
mov r0, r9
|
||||
bl ASM_PFX(ArmPlatformGetCorePosition)
|
||||
// The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
|
||||
add r0, r0, #1
|
||||
|
||||
// StackOffset = CorePos * StackSize
|
||||
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecSecondaryStackSize), r2)
|
||||
mul r0, r0, r2
|
||||
// SP = StackBase + StackOffset
|
||||
add sp, r6, r0
|
||||
|
||||
_PrepareArguments:
|
||||
// Move sec startup address into a data register
|
||||
// Ensure we're jumping to FV version of the code (not boot remapped alias)
|
||||
ldr r3, StartupAddr
|
||||
|
||||
// Jump to SEC C code
|
||||
// r0 = mp_id
|
||||
// r1 = Boot Mode
|
||||
mov r0, r9
|
||||
mov r1, r10
|
||||
blx r3
|
||||
|
||||
_NeverReturn:
|
||||
b _NeverReturn
|
||||
|
|
@ -1,122 +0,0 @@
|
|||
//
|
||||
// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
|
||||
//
|
||||
// This program and the accompanying materials
|
||||
// are licensed and made available under the terms and conditions of the BSD License
|
||||
// which accompanies this distribution. The full text of the license may be found at
|
||||
// http://opensource.org/licenses/bsd-license.php
|
||||
//
|
||||
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
//
|
||||
//
|
||||
|
||||
#include <AutoGen.h>
|
||||
#include <AsmMacroIoLib.h>
|
||||
#include "SecInternal.h"
|
||||
|
||||
INCLUDE AsmMacroIoLib.inc
|
||||
|
||||
IMPORT CEntryPoint
|
||||
IMPORT ArmPlatformIsPrimaryCore
|
||||
IMPORT ArmPlatformGetCorePosition
|
||||
IMPORT ArmPlatformSecBootAction
|
||||
IMPORT ArmPlatformSecBootMemoryInit
|
||||
IMPORT ArmDisableInterrupts
|
||||
IMPORT ArmDisableCachesAndMmu
|
||||
IMPORT ArmReadMpidr
|
||||
IMPORT ArmCallWFE
|
||||
EXPORT _ModuleEntryPoint
|
||||
|
||||
PRESERVE8
|
||||
AREA SecEntryPoint, CODE, READONLY
|
||||
|
||||
StartupAddr DCD CEntryPoint
|
||||
|
||||
_ModuleEntryPoint FUNCTION
|
||||
// First ensure all interrupts are disabled
|
||||
bl ArmDisableInterrupts
|
||||
|
||||
// Ensure that the MMU and caches are off
|
||||
bl ArmDisableCachesAndMmu
|
||||
|
||||
// By default, we are doing a cold boot
|
||||
mov r10, #ARM_SEC_COLD_BOOT
|
||||
|
||||
// Jump to Platform Specific Boot Action function
|
||||
blx ArmPlatformSecBootAction
|
||||
|
||||
_IdentifyCpu
|
||||
// Identify CPU ID
|
||||
bl ArmReadMpidr
|
||||
// Keep a copy of the MpId register value
|
||||
mov r9, r0
|
||||
|
||||
// Is it the Primary Core ?
|
||||
bl ArmPlatformIsPrimaryCore
|
||||
cmp r0, #1
|
||||
// Only the primary core initialize the memory (SMC)
|
||||
beq _InitMem
|
||||
|
||||
_WaitInitMem
|
||||
// If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
|
||||
// Otherwise we have to wait the Primary Core to finish the initialization
|
||||
cmp r10, #ARM_SEC_COLD_BOOT
|
||||
bne _SetupSecondaryCoreStack
|
||||
|
||||
// Wait for the primary core to initialize the initial memory (event: BOOT_MEM_INIT)
|
||||
bl ArmCallWFE
|
||||
// Now the Init Mem is initialized, we setup the secondary core stacks
|
||||
b _SetupSecondaryCoreStack
|
||||
|
||||
_InitMem
|
||||
// If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
|
||||
cmp r10, #ARM_SEC_COLD_BOOT
|
||||
bne _SetupPrimaryCoreStack
|
||||
|
||||
// Initialize Init Boot Memory
|
||||
bl ArmPlatformSecBootMemoryInit
|
||||
|
||||
_SetupPrimaryCoreStack
|
||||
// Get the top of the primary stacks (and the base of the secondary stacks)
|
||||
LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)
|
||||
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)
|
||||
add r1, r1, r2
|
||||
|
||||
mov sp, r1
|
||||
b _PrepareArguments
|
||||
|
||||
_SetupSecondaryCoreStack
|
||||
// Get the top of the primary stacks (and the base of the secondary stacks)
|
||||
LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)
|
||||
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)
|
||||
add r6, r1, r2
|
||||
|
||||
// Get the Core Position
|
||||
mov r0, r9
|
||||
bl ArmPlatformGetCorePosition
|
||||
// The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
|
||||
add r0, r0, #1
|
||||
|
||||
// StackOffset = CorePos * StackSize
|
||||
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecSecondaryStackSize), r2)
|
||||
mul r0, r0, r2
|
||||
// SP = StackBase + StackOffset
|
||||
add sp, r6, r0
|
||||
|
||||
_PrepareArguments
|
||||
// Move sec startup address into a data register
|
||||
// Ensure we're jumping to FV version of the code (not boot remapped alias)
|
||||
ldr r3, StartupAddr
|
||||
|
||||
// Jump to SEC C code
|
||||
// r0 = mp_id
|
||||
// r1 = Boot Mode
|
||||
mov r0, r9
|
||||
mov r1, r10
|
||||
blx r3
|
||||
ENDFUNC
|
||||
|
||||
_NeverReturn
|
||||
b _NeverReturn
|
||||
END
|
||||
|
|
@ -1,200 +0,0 @@
|
|||
/** @file
|
||||
* Main file supporting the SEC Phase on ARM Platforms
|
||||
*
|
||||
* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
|
||||
*
|
||||
* This program and the accompanying materials
|
||||
* are licensed and made available under the terms and conditions of the BSD License
|
||||
* which accompanies this distribution. The full text of the license may be found at
|
||||
* http://opensource.org/licenses/bsd-license.php
|
||||
*
|
||||
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
*
|
||||
**/
|
||||
|
||||
#include <Library/ArmTrustedMonitorLib.h>
|
||||
#include <Library/DebugAgentLib.h>
|
||||
#include <Library/PrintLib.h>
|
||||
#include <Library/BaseMemoryLib.h>
|
||||
#include <Library/SerialPortLib.h>
|
||||
#include <Library/ArmGicLib.h>
|
||||
#include <Library/ArmPlatformLib.h>
|
||||
|
||||
#include "SecInternal.h"
|
||||
|
||||
#define SerialPrint(txt) SerialPortWrite ((UINT8*)txt, AsciiStrLen(txt)+1);
|
||||
|
||||
VOID
|
||||
CEntryPoint (
|
||||
IN UINTN MpId,
|
||||
IN UINTN SecBootMode
|
||||
)
|
||||
{
|
||||
CHAR8 Buffer[100];
|
||||
UINTN CharCount;
|
||||
UINTN JumpAddress;
|
||||
|
||||
// Invalidate the data cache. Doesn't have to do the Data cache clean.
|
||||
ArmInvalidateDataCache ();
|
||||
|
||||
// Invalidate Instruction Cache
|
||||
ArmInvalidateInstructionCache ();
|
||||
|
||||
// Invalidate I & D TLBs
|
||||
ArmInvalidateTlb ();
|
||||
|
||||
// CPU specific settings
|
||||
ArmCpuSetup (MpId);
|
||||
|
||||
// Enable Floating Point Coprocessor if supported by the platform
|
||||
if (FixedPcdGet32 (PcdVFPEnabled)) {
|
||||
ArmEnableVFP ();
|
||||
}
|
||||
|
||||
// Initialize peripherals that must be done at the early stage
|
||||
// Example: Some L2 controller, interconnect, clock, DMC, etc
|
||||
ArmPlatformSecInitialize (MpId);
|
||||
|
||||
// Primary CPU clears out the SCU tag RAMs, secondaries wait
|
||||
if (ArmPlatformIsPrimaryCore (MpId) && (SecBootMode == ARM_SEC_COLD_BOOT)) {
|
||||
if (ArmIsMpCore()) {
|
||||
// Signal for the initial memory is configured (event: BOOT_MEM_INIT)
|
||||
ArmCallSEV ();
|
||||
}
|
||||
|
||||
// SEC phase needs to run library constructors by hand. This assumes we are linked against the SerialLib
|
||||
// In non SEC modules the init call is in autogenerated code.
|
||||
SerialPortInitialize ();
|
||||
|
||||
// Start talking
|
||||
if (FixedPcdGetBool (PcdTrustzoneSupport)) {
|
||||
CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Secure firmware (version %s built at %a on %a)\n\r",
|
||||
(CHAR16*)PcdGetPtr(PcdFirmwareVersionString), __TIME__, __DATE__);
|
||||
} else {
|
||||
CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Boot firmware (version %s built at %a on %a)\n\r",
|
||||
(CHAR16*)PcdGetPtr(PcdFirmwareVersionString), __TIME__, __DATE__);
|
||||
}
|
||||
SerialPortWrite ((UINT8 *) Buffer, CharCount);
|
||||
|
||||
// Initialize the Debug Agent for Source Level Debugging
|
||||
InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL, NULL);
|
||||
SaveAndSetDebugTimerInterrupt (TRUE);
|
||||
|
||||
// Enable the GIC distributor and CPU Interface
|
||||
// - no other Interrupts are enabled, doesn't have to worry about the priority.
|
||||
// - all the cores are in secure state, use secure SGI's
|
||||
ArmGicEnableDistributor (PcdGet32(PcdGicDistributorBase));
|
||||
ArmGicEnableInterruptInterface (PcdGet32(PcdGicInterruptInterfaceBase));
|
||||
} else {
|
||||
// Enable the GIC CPU Interface
|
||||
ArmGicEnableInterruptInterface (PcdGet32(PcdGicInterruptInterfaceBase));
|
||||
}
|
||||
|
||||
// Enable Full Access to CoProcessors
|
||||
ArmWriteCpacr (CPACR_CP_FULL_ACCESS);
|
||||
|
||||
// Test if Trustzone is supported on this platform
|
||||
if (FixedPcdGetBool (PcdTrustzoneSupport)) {
|
||||
if (ArmIsMpCore ()) {
|
||||
// Setup SMP in Non Secure world
|
||||
ArmCpuSetupSmpNonSecure (GET_CORE_ID(MpId));
|
||||
}
|
||||
|
||||
// Either we use the Secure Stacks for Secure Monitor (in this case (Base == 0) && (Size == 0))
|
||||
// Or we use separate Secure Monitor stacks (but (Base != 0) && (Size != 0))
|
||||
ASSERT (((PcdGet32(PcdCPUCoresSecMonStackBase) == 0) && (PcdGet32(PcdCPUCoreSecMonStackSize) == 0)) ||
|
||||
((PcdGet32(PcdCPUCoresSecMonStackBase) != 0) && (PcdGet32(PcdCPUCoreSecMonStackSize) != 0)));
|
||||
|
||||
// Enter Monitor Mode
|
||||
enter_monitor_mode (
|
||||
(UINTN)TrustedWorldInitialization, MpId, SecBootMode,
|
||||
(VOID*) (PcdGet32 (PcdCPUCoresSecMonStackBase) +
|
||||
(PcdGet32 (PcdCPUCoreSecMonStackSize) * (ArmPlatformGetCorePosition (MpId) + 1)))
|
||||
);
|
||||
} else {
|
||||
if (ArmPlatformIsPrimaryCore (MpId)) {
|
||||
SerialPrint ("Trust Zone Configuration is disabled\n\r");
|
||||
}
|
||||
|
||||
// With Trustzone support the transition from Sec to Normal world is done by return_from_exception().
|
||||
// If we want to keep this function call we need to ensure the SVC's SPSR point to the same Program
|
||||
// Status Register as the the current one (CPSR).
|
||||
copy_cpsr_into_spsr ();
|
||||
|
||||
// Call the Platform specific function to execute additional actions if required
|
||||
JumpAddress = PcdGet64 (PcdFvBaseAddress);
|
||||
ArmPlatformSecExtraAction (MpId, &JumpAddress);
|
||||
|
||||
NonTrustedWorldTransition (MpId, JumpAddress);
|
||||
}
|
||||
ASSERT (0); // We must never return from the above function
|
||||
}
|
||||
|
||||
VOID
|
||||
TrustedWorldInitialization (
|
||||
IN UINTN MpId,
|
||||
IN UINTN SecBootMode
|
||||
)
|
||||
{
|
||||
UINTN JumpAddress;
|
||||
|
||||
//-------------------- Monitor Mode ---------------------
|
||||
|
||||
// Set up Monitor World (Vector Table, etc)
|
||||
ArmSecureMonitorWorldInitialize ();
|
||||
|
||||
// Transfer the interrupt to Non-secure World
|
||||
ArmGicSetupNonSecure (MpId, PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase));
|
||||
|
||||
// Initialize platform specific security policy
|
||||
ArmPlatformSecTrustzoneInit (MpId);
|
||||
|
||||
// Setup the Trustzone Chipsets
|
||||
if (SecBootMode == ARM_SEC_COLD_BOOT) {
|
||||
if (ArmPlatformIsPrimaryCore (MpId)) {
|
||||
if (ArmIsMpCore()) {
|
||||
// Signal the secondary core the Security settings is done (event: EVENT_SECURE_INIT)
|
||||
ArmCallSEV ();
|
||||
}
|
||||
} else {
|
||||
// The secondary cores need to wait until the Trustzone chipsets configuration is done
|
||||
// before switching to Non Secure World
|
||||
|
||||
// Wait for the Primary Core to finish the initialization of the Secure World (event: EVENT_SECURE_INIT)
|
||||
ArmCallWFE ();
|
||||
}
|
||||
}
|
||||
|
||||
// Call the Platform specific function to execute additional actions if required
|
||||
JumpAddress = PcdGet64 (PcdFvBaseAddress);
|
||||
ArmPlatformSecExtraAction (MpId, &JumpAddress);
|
||||
|
||||
// Initialize architecture specific security policy
|
||||
ArmSecArchTrustzoneInit ();
|
||||
|
||||
// CP15 Secure Configuration Register
|
||||
ArmWriteScr (PcdGet32 (PcdArmScr));
|
||||
|
||||
NonTrustedWorldTransition (MpId, JumpAddress);
|
||||
}
|
||||
|
||||
VOID
|
||||
NonTrustedWorldTransition (
|
||||
IN UINTN MpId,
|
||||
IN UINTN JumpAddress
|
||||
)
|
||||
{
|
||||
// If PcdArmNonSecModeTransition is defined then set this specific mode to CPSR before the transition
|
||||
// By not set, the mode for Non Secure World is SVC
|
||||
if (PcdGet32 (PcdArmNonSecModeTransition) != 0) {
|
||||
set_non_secure_mode ((ARM_PROCESSOR_MODE)PcdGet32 (PcdArmNonSecModeTransition));
|
||||
}
|
||||
|
||||
return_from_exception (JumpAddress);
|
||||
//-------------------- Non Secure Mode ---------------------
|
||||
|
||||
// PEI Core should always load and never return
|
||||
ASSERT (FALSE);
|
||||
}
|
||||
|
||||
|
|
@ -1,85 +0,0 @@
|
|||
#/** @file
|
||||
# SEC - Reset vector code that jumps to C and starts the PEI phase
|
||||
#
|
||||
# (C) Copyright 2015 Hewlett-Packard Development Company, L.P.<BR>
|
||||
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
#**/
|
||||
|
||||
[Defines]
|
||||
INF_VERSION = 0x00010005
|
||||
BASE_NAME = ArmPlatformSec
|
||||
FILE_GUID = c536bbfe-c813-4e48-9f90-01fe1ecf9d54
|
||||
MODULE_TYPE = SEC
|
||||
VERSION_STRING = 1.0
|
||||
|
||||
[Sources]
|
||||
Sec.c
|
||||
|
||||
[Sources.ARM]
|
||||
Arm/Arch.c
|
||||
Arm/Helper.asm | RVCT
|
||||
Arm/Helper.S | GCC
|
||||
Arm/SecEntryPoint.S | GCC
|
||||
Arm/SecEntryPoint.asm | RVCT
|
||||
|
||||
[Sources.AARCH64]
|
||||
AArch64/Arch.c
|
||||
AArch64/Helper.S
|
||||
AArch64/SecEntryPoint.S
|
||||
|
||||
[Packages]
|
||||
MdePkg/MdePkg.dec
|
||||
MdeModulePkg/MdeModulePkg.dec
|
||||
ArmPkg/ArmPkg.dec
|
||||
ArmPlatformPkg/ArmPlatformPkg.dec
|
||||
|
||||
[LibraryClasses]
|
||||
ArmCpuLib
|
||||
ArmLib
|
||||
ArmPlatformLib
|
||||
ArmPlatformSecLib
|
||||
ArmTrustedMonitorLib
|
||||
BaseLib
|
||||
DebugLib
|
||||
DebugAgentLib
|
||||
IoLib
|
||||
ArmGicLib
|
||||
PrintLib
|
||||
SerialPortLib
|
||||
|
||||
[Pcd]
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString
|
||||
|
||||
[FixedPcd.common]
|
||||
|
||||
gArmTokenSpaceGuid.PcdTrustzoneSupport
|
||||
gArmTokenSpaceGuid.PcdVFPEnabled
|
||||
|
||||
gArmTokenSpaceGuid.PcdArmScr
|
||||
gArmTokenSpaceGuid.PcdArmNonSecModeTransition
|
||||
|
||||
gArmTokenSpaceGuid.PcdSecureFvBaseAddress
|
||||
gArmTokenSpaceGuid.PcdSecureFvSize
|
||||
|
||||
gArmTokenSpaceGuid.PcdFvBaseAddress
|
||||
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize
|
||||
|
||||
gArmTokenSpaceGuid.PcdGicDistributorBase
|
||||
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
|
||||
|
||||
[FixedPcd.ARM]
|
||||
gArmTokenSpaceGuid.PcdArmNsacr
|
||||
|
|
@ -1,83 +0,0 @@
|
|||
/** @file
|
||||
* Main file supporting the SEC Phase on ARM PLatforms
|
||||
*
|
||||
* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
|
||||
*
|
||||
* This program and the accompanying materials
|
||||
* are licensed and made available under the terms and conditions of the BSD License
|
||||
* which accompanies this distribution. The full text of the license may be found at
|
||||
* http://opensource.org/licenses/bsd-license.php
|
||||
*
|
||||
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
*
|
||||
**/
|
||||
|
||||
#ifndef __SEC_H__
|
||||
#define __SEC_H__
|
||||
|
||||
#include <Base.h>
|
||||
#include <Library/ArmLib.h>
|
||||
#include <Library/ArmCpuLib.h>
|
||||
#include <Library/ArmPlatformLib.h>
|
||||
#include <Library/ArmPlatformSecLib.h>
|
||||
#include <Library/BaseLib.h>
|
||||
#include <Library/DebugLib.h>
|
||||
#include <Library/PcdLib.h>
|
||||
|
||||
#define IS_ALIGNED(Address, Align) (((UINTN)Address & (Align-1)) == 0)
|
||||
|
||||
VOID
|
||||
TrustedWorldInitialization (
|
||||
IN UINTN MpId,
|
||||
IN UINTN SecBootMode
|
||||
);
|
||||
|
||||
VOID
|
||||
NonTrustedWorldTransition (
|
||||
IN UINTN MpId,
|
||||
IN UINTN JumpAddress
|
||||
);
|
||||
|
||||
VOID
|
||||
ArmSetupGicNonSecure (
|
||||
IN INTN GicDistributorBase,
|
||||
IN INTN GicInterruptInterfaceBase
|
||||
);
|
||||
|
||||
VOID
|
||||
enter_monitor_mode (
|
||||
IN UINTN MonitorEntryPoint,
|
||||
IN UINTN MpId,
|
||||
IN UINTN SecBootMode,
|
||||
IN VOID* MonitorStackBase
|
||||
);
|
||||
|
||||
VOID
|
||||
return_from_exception (
|
||||
IN UINTN NonSecureBase
|
||||
);
|
||||
|
||||
VOID
|
||||
copy_cpsr_into_spsr (
|
||||
VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
set_non_secure_mode (
|
||||
IN ARM_PROCESSOR_MODE Mode
|
||||
);
|
||||
|
||||
VOID
|
||||
SecCommonExceptionEntry (
|
||||
IN UINT32 Entry,
|
||||
IN UINTN LR
|
||||
);
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
ArmSecArchTrustzoneInit (
|
||||
VOID
|
||||
);
|
||||
|
||||
#endif
|
||||
|
|
@ -186,7 +186,14 @@ SecurityPkg
|
|||
W: https://github.com/tianocore/tianocore.github.io/wiki/SecurityPkg
|
||||
M: Chao Zhang <chao.b.zhang@intel.com>
|
||||
|
||||
ShellPkg, ShellBinPkg
|
||||
ShellBinPkg
|
||||
W: https://github.com/tianocore/tianocore.github.io/wiki/ShellPkg
|
||||
M: Jaben Carsey <jaben.carsey@intel.com> (Ia32/X64)
|
||||
M: Shumin Qiu <shumin.qiu@intel.com> (Ia32/X64)
|
||||
M: Leif Lindholm <leif.lindholm@linaro.org> (ARM/AArch64)
|
||||
M: Ard Biesheuvel <ard.biesheuvel@linaro.org> (ARM/AArch64)
|
||||
|
||||
ShellPkg
|
||||
W: https://github.com/tianocore/tianocore.github.io/wiki/ShellPkg
|
||||
M: Jaben Carsey <jaben.carsey@intel.com>
|
||||
M: Shumin Qiu <shumin.qiu@intel.com>
|
||||
|
|
|
|||
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
|
|
@ -4176,27 +4176,43 @@ ShellFileHandleReadLine(
|
|||
//
|
||||
// if we have space save it...
|
||||
//
|
||||
if ((CountSoFar+1)*sizeof(CHAR16) < *Size){
|
||||
if ((CountSoFar + 1) * CharSize < *Size){
|
||||
ASSERT(Buffer != NULL);
|
||||
((CHAR16*)Buffer)[CountSoFar] = CharBuffer;
|
||||
((CHAR16*)Buffer)[CountSoFar+1] = CHAR_NULL;
|
||||
if (*Ascii) {
|
||||
((CHAR8*)Buffer)[CountSoFar] = (CHAR8) CharBuffer;
|
||||
((CHAR8*)Buffer)[CountSoFar+1] = '\0';
|
||||
}
|
||||
else {
|
||||
((CHAR16*)Buffer)[CountSoFar] = CharBuffer;
|
||||
((CHAR16*)Buffer)[CountSoFar+1] = CHAR_NULL;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// if we ran out of space tell when...
|
||||
//
|
||||
if ((CountSoFar+1)*sizeof(CHAR16) > *Size){
|
||||
*Size = (CountSoFar+1)*sizeof(CHAR16);
|
||||
if (!Truncate) {
|
||||
gEfiShellProtocol->SetFilePosition(Handle, OriginalFilePosition);
|
||||
} else {
|
||||
DEBUG((DEBUG_WARN, "The line was truncated in ShellFileHandleReadLine"));
|
||||
if (Status != EFI_END_OF_FILE){
|
||||
if ((CountSoFar + 1) * CharSize > *Size){
|
||||
*Size = (CountSoFar + 1) * CharSize;
|
||||
if (!Truncate) {
|
||||
gEfiShellProtocol->SetFilePosition(Handle, OriginalFilePosition);
|
||||
} else {
|
||||
DEBUG((DEBUG_WARN, "The line was truncated in ShellFileHandleReadLine"));
|
||||
}
|
||||
return (EFI_BUFFER_TOO_SMALL);
|
||||
}
|
||||
|
||||
if (*Ascii) {
|
||||
if (CountSoFar && ((CHAR8*)Buffer)[CountSoFar - 1] == '\r') {
|
||||
((CHAR8*)Buffer)[CountSoFar - 1] = '\0';
|
||||
}
|
||||
}
|
||||
else {
|
||||
if (CountSoFar && Buffer[CountSoFar - 1] == L'\r') {
|
||||
Buffer[CountSoFar - 1] = CHAR_NULL;
|
||||
}
|
||||
}
|
||||
return (EFI_BUFFER_TOO_SMALL);
|
||||
}
|
||||
while(Buffer[StrLen(Buffer)-1] == L'\r') {
|
||||
Buffer[StrLen(Buffer)-1] = CHAR_NULL;
|
||||
}
|
||||
|
||||
return (Status);
|
||||
|
|
|
|||
Loading…
Reference in New Issue