DynamicTablesPkg: Move PCI device Handle object to Arch Common

Move the PCI device Handle object from Arm Namespace to the
Arch Common namespace.

Correspondingly also update the following modules to reflect the
changes introduced by the move:
 - SRAT generator
 - ConfigurationManagerObjectParser
 - Dynamic Plat Repo TokenFixer map.

Cc: Pierre Gondois <Pierre.Gondois@arm.com>
Cc: Yeo Reum Yun <YeoReum.Yun@arm.com>
Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com>
Cc: Jeshua Smith <jeshuas@nvidia.com>
Cc: Jeff Brasen <jbrasen@nvidia.com>
Cc: Girish Mahadevan <gmahadevan@nvidia.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
This commit is contained in:
Sami Mujawar 2024-03-11 11:14:03 +00:00 committed by mergify[bot]
parent 0ca10ddc0f
commit 3a644f4a43
6 changed files with 72 additions and 73 deletions

View File

@ -33,6 +33,7 @@ typedef enum ArchCommonObjectID {
EArchCommonObjPciInterruptMapInfo, ///< 10 - Pci Interrupt Map Info
EArchCommonObjMemoryAffinityInfo, ///< 11 - Memory Affinity Info
EArchCommonObjDeviceHandleAcpi, ///< 12 - Device Handle Acpi
EArchCommonObjDeviceHandlePci, ///< 13 - Device Handle Pci
EArchCommonObjMax
} EARCH_COMMON_OBJECT_ID;
@ -256,6 +257,25 @@ typedef struct CmArchCommonDeviceHandleAcpi {
UINT32 Uid;
} CM_ARCH_COMMON_DEVICE_HANDLE_ACPI;
/** A structure that describes the PCI Device Handle (Type 1) in the
Generic Initiator Affinity structure in SRAT
ID: EArchCommonObjDeviceHandlePci
*/
typedef struct CmArchCommonDeviceHandlePci {
/// PCI Segment Number
UINT16 SegmentNumber;
/// PCI Bus Number - Max 256 busses (Bits 15:8 of BDF)
UINT8 BusNumber;
/// PCI Device Number - Max 32 devices (Bits 7:3 of BDF)
UINT8 DeviceNumber;
/// PCI Function Number - Max 8 functions (Bits 2:0 of BDF)
UINT8 FunctionNumber;
} CM_ARCH_COMMON_DEVICE_HANDLE_PCI;
#pragma pack()
#endif // ARCH_COMMON_NAMESPACE_OBJECTS_H_

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@ -50,21 +50,20 @@ typedef enum ArmObjectID {
EArmObjSmmuInterruptArray, ///< 19 - SMMU Interrupt Array
EArmObjProcHierarchyInfo, ///< 20 - Processor Hierarchy Info
EArmObjCacheInfo, ///< 21 - Cache Info
EArmObjDeviceHandlePci, ///< 22 - Device Handle Pci
EArmObjGenericInitiatorAffinityInfo, ///< 23 - Generic Initiator Affinity
EArmObjCmn600Info, ///< 24 - CMN-600 Info
EArmObjLpiInfo, ///< 25 - Lpi Info
EArmObjRmr, ///< 26 - Reserved Memory Range Node
EArmObjMemoryRangeDescriptor, ///< 27 - Memory Range Descriptor
EArmObjCpcInfo, ///< 28 - Continuous Performance Control Info
EArmObjPccSubspaceType0Info, ///< 29 - Pcc Subspace Type 0 Info
EArmObjPccSubspaceType1Info, ///< 30 - Pcc Subspace Type 2 Info
EArmObjPccSubspaceType2Info, ///< 31 - Pcc Subspace Type 2 Info
EArmObjPccSubspaceType3Info, ///< 32 - Pcc Subspace Type 3 Info
EArmObjPccSubspaceType4Info, ///< 33 - Pcc Subspace Type 4 Info
EArmObjPccSubspaceType5Info, ///< 34 - Pcc Subspace Type 5 Info
EArmObjEtInfo, ///< 35 - Embedded Trace Extension/Module Info
EArmObjPsdInfo, ///< 36 - P-State Dependency (PSD) Info
EArmObjGenericInitiatorAffinityInfo, ///< 22 - Generic Initiator Affinity
EArmObjCmn600Info, ///< 23 - CMN-600 Info
EArmObjLpiInfo, ///< 24 - Lpi Info
EArmObjRmr, ///< 25 - Reserved Memory Range Node
EArmObjMemoryRangeDescriptor, ///< 26 - Memory Range Descriptor
EArmObjCpcInfo, ///< 27 - Continuous Performance Control Info
EArmObjPccSubspaceType0Info, ///< 28 - Pcc Subspace Type 0 Info
EArmObjPccSubspaceType1Info, ///< 29 - Pcc Subspace Type 2 Info
EArmObjPccSubspaceType2Info, ///< 30 - Pcc Subspace Type 2 Info
EArmObjPccSubspaceType3Info, ///< 31 - Pcc Subspace Type 3 Info
EArmObjPccSubspaceType4Info, ///< 32 - Pcc Subspace Type 4 Info
EArmObjPccSubspaceType5Info, ///< 33 - Pcc Subspace Type 5 Info
EArmObjEtInfo, ///< 34 - Embedded Trace Extension/Module Info
EArmObjPsdInfo, ///< 35 - P-State Dependency (PSD) Info
EArmObjMax
} EARM_OBJECT_ID;
@ -719,25 +718,6 @@ typedef struct CmArmCacheInfo {
UINT32 CacheId;
} CM_ARM_CACHE_INFO;
/** A structure that describes the PCI Device Handle (Type 1) in the
Generic Initiator Affinity structure in SRAT
ID: EArmObjDeviceHandlePci
*/
typedef struct CmArmDeviceHandlePci {
/// PCI Segment Number
UINT16 SegmentNumber;
/// PCI Bus Number - Max 256 busses (Bits 15:8 of BDF)
UINT8 BusNumber;
/// PCI Device Number - Max 32 devices (Bits 7:3 of BDF)
UINT8 DeviceNumber;
/// PCI Function Number - Max 8 functions (Bits 2:0 of BDF)
UINT8 FunctionNumber;
} CM_ARM_DEVICE_HANDLE_PCI;
/** A structure that describes the Generic Initiator Affinity structure in SRAT
ID: EArmObjGenericInitiatorAffinityInfo

View File

@ -35,7 +35,7 @@
- EArchCommonObjMemoryAffinityInfo (OPTIONAL)
- EArmObjGenericInitiatorAffinityInfo (OPTIONAL)
- EArchCommonObjDeviceHandleAcpi (OPTIONAL)
- EArmObjDeviceHandlePci (OPTIONAL)
- EArchCommonObjDeviceHandlePci (OPTIONAL)
*/
/** This macro expands to a function that retrieves the GIC
@ -92,9 +92,9 @@ GET_OBJECT_LIST (
information from the Configuration Manager.
*/
GET_OBJECT_LIST (
EObjNameSpaceArm,
EArmObjDeviceHandlePci,
CM_ARM_DEVICE_HANDLE_PCI
EObjNameSpaceArchCommon,
EArchCommonObjDeviceHandlePci,
CM_ARCH_COMMON_DEVICE_HANDLE_PCI
);
/** Return the PCI Device information in BDF format
@ -110,7 +110,7 @@ GET_OBJECT_LIST (
STATIC
UINT16
GetBdf (
IN CONST CM_ARM_DEVICE_HANDLE_PCI *DeviceHandlePci
IN CONST CM_ARCH_COMMON_DEVICE_HANDLE_PCI *DeviceHandlePci
)
{
UINT16 Bdf;
@ -302,7 +302,7 @@ AddGenericInitiatorAffinity (
EFI_STATUS Status;
EFI_ACPI_6_3_GENERIC_INITIATOR_AFFINITY_STRUCTURE *GenInitAff;
CM_ARCH_COMMON_DEVICE_HANDLE_ACPI *DeviceHandleAcpi;
CM_ARM_DEVICE_HANDLE_PCI *DeviceHandlePci;
CM_ARCH_COMMON_DEVICE_HANDLE_PCI *DeviceHandlePci;
UINT32 DeviceHandleCount;
ASSERT (Srat != NULL);
@ -362,7 +362,7 @@ AddGenericInitiatorAffinity (
} else if (GenInitAffInfo->DeviceHandleType ==
EFI_ACPI_6_3_PCI_DEVICE_HANDLE)
{
Status = GetEArmObjDeviceHandlePci (
Status = GetEArchCommonObjDeviceHandlePci (
CfgMgrProtocol,
GenInitAffInfo->DeviceHandleToken,
&DeviceHandlePci,

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@ -165,21 +165,20 @@ CM_OBJECT_TOKEN_FIXER TokenFixer[EArmObjMax] = {
NULL, ///< 19 - SMMU Interrupt Array
TokenFixerNotImplemented, ///< 20 - Processor Hierarchy Info
TokenFixerNotImplemented, ///< 21 - Cache Info
NULL, ///< 22 - Device Handle Pci
NULL, ///< 23 - Generic Initiator Affinity
NULL, ///< 24 - CMN-600 Info
NULL, ///< 25 - Lpi Info
NULL, ///< 26 - Reserved Memory Range Node
NULL, ///< 27 - Memory Range Descriptor
NULL, ///< 28 - Continuous Performance Control Info
NULL, ///< 29 - Pcc Subspace Type 0 Info
NULL, ///< 22 - Generic Initiator Affinity
NULL, ///< 23 - CMN-600 Info
NULL, ///< 24 - Lpi Info
NULL, ///< 25 - Reserved Memory Range Node
NULL, ///< 26 - Memory Range Descriptor
NULL, ///< 27 - Continuous Performance Control Info
NULL, ///< 28 - Pcc Subspace Type 0 Info
NULL, ///< 29 - Pcc Subspace Type 2 Info
NULL, ///< 30 - Pcc Subspace Type 2 Info
NULL, ///< 31 - Pcc Subspace Type 2 Info
NULL, ///< 32 - Pcc Subspace Type 3 Info
NULL, ///< 33 - Pcc Subspace Type 4 Info
NULL, ///< 34 - Pcc Subspace Type 5 Info
NULL, ///< 35 - Embedded Trace Extension/Module Info
NULL ///< 36 - P-State Dependency (PSD) Info
NULL, ///< 31 - Pcc Subspace Type 3 Info
NULL, ///< 32 - Pcc Subspace Type 4 Info
NULL, ///< 33 - Pcc Subspace Type 5 Info
NULL, ///< 34 - Embedded Trace Extension/Module Info
NULL ///< 35 - P-State Dependency (PSD) Info
};
/** CmObj token fixer.

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@ -372,9 +372,9 @@ STATIC CONST CM_OBJ_PARSER CmArchCommonDeviceHandleAcpiParser[] = {
{ "Uid", 4, "0x%x", NULL }
};
/** A parser for EArmObjDeviceHandlePci.
/** A parser for EArchCommonObjDeviceHandlePci.
*/
STATIC CONST CM_OBJ_PARSER CmArmDeviceHandlePciParser[] = {
STATIC CONST CM_OBJ_PARSER CmArchCommonDeviceHandlePciParser[] = {
{ "SegmentNumber", 2, "0x%x", NULL },
{ "BusNumber", 1, "0x%x", NULL },
{ "DeviceNumber", 1, "0x%x", NULL },
@ -683,6 +683,7 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArchCommonNamespaceObjectParser[] = {
CM_PARSER_ADD_OBJECT (EArchCommonObjPciInterruptMapInfo, CmArchCommonPciInterruptMapInfoParser),
CM_PARSER_ADD_OBJECT (EArchCommonObjMemoryAffinityInfo, CmArchCommonMemoryAffinityInfoParser),
CM_PARSER_ADD_OBJECT (EArchCommonObjDeviceHandleAcpi, CmArchCommonDeviceHandleAcpiParser),
CM_PARSER_ADD_OBJECT (EArchCommonObjDeviceHandlePci, CmArchCommonDeviceHandlePciParser),
CM_PARSER_ADD_OBJECT_RESERVED (EArchCommonObjMax)
};
@ -711,7 +712,6 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {
CM_PARSER_ADD_OBJECT (EArmObjSmmuInterruptArray, CmArchCommonGenericInterruptParser),
CM_PARSER_ADD_OBJECT (EArmObjProcHierarchyInfo, CmArmProcHierarchyInfoParser),
CM_PARSER_ADD_OBJECT (EArmObjCacheInfo, CmArmCacheInfoParser),
CM_PARSER_ADD_OBJECT (EArmObjDeviceHandlePci, CmArmDeviceHandlePciParser),
CM_PARSER_ADD_OBJECT (EArmObjGenericInitiatorAffinityInfo,CmArmGenericInitiatorAffinityInfoParser),
CM_PARSER_ADD_OBJECT (EArmObjCmn600Info, CmArmCmn600InfoParser),
CM_PARSER_ADD_OBJECT (EArmObjLpiInfo, CmArmLpiInfoParser),

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@ -462,21 +462,20 @@ The CM_OBJECT_ID type is used to identify the Configuration Manager
| 19 | SMMU Interrupt Array | |
| 20 | Processor Hierarchy Info | Move to Arch Common NS |
| 21 | Cache Info | Move to Arch Common NS |
| 22 | Device Handle PCI | Move to Arch Common NS |
| 23 | Generic Initiator Affinity Info | Move to Arch Common NS |
| 24 | CMN 600 Info | |
| 25 | Low Power Idle State Info | Move to Arch Common NS |
| 26 | Reserved Memory Range Node | |
| 27 | Memory Range Descriptor | |
| 28 | Continuous Performance Control Info | Move to Arch Common NS |
| 29 | Pcc Subspace Type 0 Info | Move to Arch Common NS |
| 30 | Pcc Subspace Type 1 Info | Move to Arch Common NS |
| 31 | Pcc Subspace Type 2 Info | Move to Arch Common NS |
| 32 | Pcc Subspace Type 3 Info | Move to Arch Common NS |
| 33 | Pcc Subspace Type 4 Info | Move to Arch Common NS |
| 34 | Pcc Subspace Type 5 Info | Move to Arch Common NS |
| 35 | Embedded Trace Extension/Module Info | |
| 36 | P-State Dependency (PSD) Info | Move to Arch Common NS |
| 22 | Generic Initiator Affinity Info | Move to Arch Common NS |
| 23 | CMN 600 Info | |
| 24 | Low Power Idle State Info | Move to Arch Common NS |
| 25 | Reserved Memory Range Node | |
| 26 | Memory Range Descriptor | |
| 27 | Continuous Performance Control Info | Move to Arch Common NS |
| 28 | Pcc Subspace Type 0 Info | Move to Arch Common NS |
| 29 | Pcc Subspace Type 1 Info | Move to Arch Common NS |
| 30 | Pcc Subspace Type 2 Info | Move to Arch Common NS |
| 31 | Pcc Subspace Type 3 Info | Move to Arch Common NS |
| 32 | Pcc Subspace Type 4 Info | Move to Arch Common NS |
| 33 | Pcc Subspace Type 5 Info | Move to Arch Common NS |
| 34 | Embedded Trace Extension/Module Info | |
| 35 | P-State Dependency (PSD) Info | Move to Arch Common NS |
| `*` | All other values are reserved. | |
#### Object ID's in the Arch Common Namespace:
@ -496,4 +495,5 @@ The CM_OBJECT_ID type is used to identify the Configuration Manager
| 10 | PCI Interrupt Map Info | |
| 11 | Memory Affinity Info | |
| 12 | Device Handle Acpi | |
| 13 | Device Handle PCI | |
| `*` | All other values are reserved. | |