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ArmPkg/CpuDxe: ignore attribute changes during SyncCacheConfig() 

To prevent the initial MMU->GCD memory space map synchronization from
stripping permissions attributes [which we cannot use in the GCD memory
space map, unfortunately], implement the same approach as x86, and ignore
SetMemoryAttributes() calls during the time SyncCacheConfig() is in
progress. This is a horrible hack, but is currently the only way we can
implement strict permissions on arbitrary memory regions [as opposed to
PE/COFF text/data sections only]

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
This commit is contained in:
Ard Biesheuvel 2017-02-24 09:58:38 +00:00
parent c325e41585
commit 3b44bb5527
3 changed files with 8 additions and 0 deletions
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3
ArmPkg/Drivers/CpuDxe/CpuDxe.c
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@ -17,6 +17,7 @@
#include <Guid/IdleLoopEvent.h> #include <Guid/IdleLoopEvent.h>
BOOLEAN mIsFlushingGCD;
/** /**
This function flushes the range of addresses from Start to Start+Length This function flushes the range of addresses from Start to Start+Length
@ -261,7 +262,9 @@ CpuDxeInitialize (
// and that calls EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes, so this code needs to go // and that calls EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes, so this code needs to go
// after the protocol is installed // after the protocol is installed
// //
mIsFlushingGCD = TRUE;
SyncCacheConfig (&mCpu); SyncCacheConfig (&mCpu);
mIsFlushingGCD = FALSE;
// If the platform is a MPCore system then install the Configuration Table describing the // If the platform is a MPCore system then install the Configuration Table describing the
// secondary core states // secondary core states

1
ArmPkg/Drivers/CpuDxe/CpuDxe.h
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@ -37,6 +37,7 @@
#include <Protocol/DebugSupportPeriodicCallback.h> #include <Protocol/DebugSupportPeriodicCallback.h>
#include <Protocol/LoadedImage.h> #include <Protocol/LoadedImage.h>
extern BOOLEAN mIsFlushingGCD;
/** /**
This function registers and enables the handler specified by InterruptHandler for a processor This function registers and enables the handler specified by InterruptHandler for a processor

4
ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
View File

@ -188,6 +188,10 @@ CpuSetMemoryAttributes (
UINTN RegionLength; UINTN RegionLength;
UINTN RegionArmAttributes; UINTN RegionArmAttributes;
if (mIsFlushingGCD) {
return EFI_SUCCESS;
}
if ((BaseAddress & (SIZE_4KB - 1)) != 0) { if ((BaseAddress & (SIZE_4KB - 1)) != 0) {
// Minimum granularity is SIZE_4KB (4KB on ARM) // Minimum granularity is SIZE_4KB (4KB on ARM)
DEBUG ((EFI_D_PAGE, "CpuSetMemoryAttributes(%lx, %lx, %lx): Minimum ganularity is SIZE_4KB\n", BaseAddress, Length, EfiAttributes)); DEBUG ((EFI_D_PAGE, "CpuSetMemoryAttributes(%lx, %lx, %lx): Minimum ganularity is SIZE_4KB\n", BaseAddress, Length, EfiAttributes));