From 3b567f08f99df24a31fa06750171b7050e08f966 Mon Sep 17 00:00:00 2001 From: "Yao, Jiewen" Date: Tue, 15 Dec 2015 04:27:00 +0000 Subject: [PATCH] Fix >4G issue on IDT not restored correctly. Idtr might be changed inside of FSP. 32bit FSP only knows the <4G address. If IDTR.Base is >4G, FSP can not handle. So we need save/restore IDTR here. Interrupt is already disabled here, so it is safety to update IDTR. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" Reviewed-by: "Ma, Maurice" Reviewed-by: "Mudusuru, Giri P" Reviewed-by: "Yarlagadda, Satya P" git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19246 6f19259b-4bc3-4df7-8a09-765794883524 --- .../Library/BaseFspApiLib/X64/DispatchExecute.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/IntelFspWrapperPkg/Library/BaseFspApiLib/X64/DispatchExecute.c b/IntelFspWrapperPkg/Library/BaseFspApiLib/X64/DispatchExecute.c index e2f4422534..360327ed08 100644 --- a/IntelFspWrapperPkg/Library/BaseFspApiLib/X64/DispatchExecute.c +++ b/IntelFspWrapperPkg/Library/BaseFspApiLib/X64/DispatchExecute.c @@ -89,6 +89,18 @@ Execute32BitCode ( IN UINT64 Param1 ) { - return AsmExecute32BitCode (Function, Param1, 0, &mGdt); + EFI_STATUS Status; + IA32_DESCRIPTOR Idtr; + + // + // Idtr might be changed inside of FSP. 32bit FSP only knows the <4G address. + // If IDTR.Base is >4G, FSP can not handle. So we need save/restore IDTR here for X64 only. + // Interrupt is already disabled here, so it is safety to update IDTR. + // + AsmReadIdtr (&Idtr); + Status = AsmExecute32BitCode (Function, Param1, 0, &mGdt); + AsmWriteIdtr (&Idtr); + + return Status; }