ArmPkg/ArmGicDxe: Remove pointless passing around of MMIO addresses

The GIC distributor and redistributor addresses that are passed into the
interrupt enable and disable routines are always the same, so just use
the global variables directly.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
This commit is contained in:
Ard Biesheuvel 2025-01-28 16:19:44 +01:00 committed by mergify[bot]
parent e68e784649
commit 3c4c7a0fc9

View File

@ -103,8 +103,6 @@ GicGetCpuRedistributorBase (
STATIC STATIC
VOID VOID
ArmGicSetInterruptPriority ( ArmGicSetInterruptPriority (
IN UINTN GicDistributorBase,
IN UINTN GicRedistributorBase,
IN UINTN Source, IN UINTN Source,
IN UINT32 Priority IN UINT32 Priority
) )
@ -118,13 +116,13 @@ ArmGicSetInterruptPriority (
if (SourceIsSpi (Source)) { if (SourceIsSpi (Source)) {
MmioAndThenOr32 ( MmioAndThenOr32 (
GicDistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset), mGicDistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset),
~(0xff << RegShift), ~(0xff << RegShift),
Priority << RegShift Priority << RegShift
); );
} else { } else {
MmioAndThenOr32 ( MmioAndThenOr32 (
IPRIORITY_ADDRESS (GicRedistributorBase, RegOffset), IPRIORITY_ADDRESS (mGicRedistributorBase, RegOffset),
~(0xff << RegShift), ~(0xff << RegShift),
Priority << RegShift Priority << RegShift
); );
@ -134,8 +132,6 @@ ArmGicSetInterruptPriority (
STATIC STATIC
VOID VOID
ArmGicEnableInterrupt ( ArmGicEnableInterrupt (
IN UINTN GicDistributorBase,
IN UINTN GicRedistributorBase,
IN UINTN Source IN UINTN Source
) )
{ {
@ -149,13 +145,13 @@ ArmGicEnableInterrupt (
if (SourceIsSpi (Source)) { if (SourceIsSpi (Source)) {
// Write set-enable register // Write set-enable register
MmioWrite32 ( MmioWrite32 (
GicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset), mGicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset),
1 << RegShift 1 << RegShift
); );
} else { } else {
// Write set-enable register // Write set-enable register
MmioWrite32 ( MmioWrite32 (
ISENABLER_ADDRESS (GicRedistributorBase, RegOffset), ISENABLER_ADDRESS (mGicRedistributorBase, RegOffset),
1 << RegShift 1 << RegShift
); );
} }
@ -164,8 +160,6 @@ ArmGicEnableInterrupt (
STATIC STATIC
VOID VOID
ArmGicDisableInterrupt ( ArmGicDisableInterrupt (
IN UINTN GicDistributorBase,
IN UINTN GicRedistributorBase,
IN UINTN Source IN UINTN Source
) )
{ {
@ -179,13 +173,13 @@ ArmGicDisableInterrupt (
if (SourceIsSpi (Source)) { if (SourceIsSpi (Source)) {
// Write clear-enable register // Write clear-enable register
MmioWrite32 ( MmioWrite32 (
GicDistributorBase + ARM_GIC_ICDICER + (4 * RegOffset), mGicDistributorBase + ARM_GIC_ICDICER + (4 * RegOffset),
1 << RegShift 1 << RegShift
); );
} else { } else {
// Write clear-enable register // Write clear-enable register
MmioWrite32 ( MmioWrite32 (
ICENABLER_ADDRESS (GicRedistributorBase, RegOffset), ICENABLER_ADDRESS (mGicRedistributorBase, RegOffset),
1 << RegShift 1 << RegShift
); );
} }
@ -194,8 +188,6 @@ ArmGicDisableInterrupt (
STATIC STATIC
BOOLEAN BOOLEAN
ArmGicIsInterruptEnabled ( ArmGicIsInterruptEnabled (
IN UINTN GicDistributorBase,
IN UINTN GicRedistributorBase,
IN UINTN Source IN UINTN Source
) )
{ {
@ -209,12 +201,12 @@ ArmGicIsInterruptEnabled (
if (SourceIsSpi (Source)) { if (SourceIsSpi (Source)) {
Interrupts = MmioRead32 ( Interrupts = MmioRead32 (
GicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset) mGicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset)
); );
} else { } else {
// Read set-enable register // Read set-enable register
Interrupts = MmioRead32 ( Interrupts = MmioRead32 (
ISENABLER_ADDRESS (GicRedistributorBase, RegOffset) ISENABLER_ADDRESS (mGicRedistributorBase, RegOffset)
); );
} }
@ -244,7 +236,7 @@ GicV3EnableInterruptSource (
return EFI_UNSUPPORTED; return EFI_UNSUPPORTED;
} }
ArmGicEnableInterrupt (mGicDistributorBase, mGicRedistributorBase, Source); ArmGicEnableInterrupt (Source);
return EFI_SUCCESS; return EFI_SUCCESS;
} }
@ -272,7 +264,7 @@ GicV3DisableInterruptSource (
return EFI_UNSUPPORTED; return EFI_UNSUPPORTED;
} }
ArmGicDisableInterrupt (mGicDistributorBase, mGicRedistributorBase, Source); ArmGicDisableInterrupt (Source);
return EFI_SUCCESS; return EFI_SUCCESS;
} }
@ -302,11 +294,7 @@ GicV3GetInterruptSourceState (
return EFI_UNSUPPORTED; return EFI_UNSUPPORTED;
} }
*InterruptState = ArmGicIsInterruptEnabled ( *InterruptState = ArmGicIsInterruptEnabled (Source);
mGicDistributorBase,
mGicRedistributorBase,
Source
);
return EFI_SUCCESS; return EFI_SUCCESS;
} }
@ -619,12 +607,7 @@ GicV3DxeInitialize (
GicV3DisableInterruptSource (&gHardwareInterruptV3Protocol, Index); GicV3DisableInterruptSource (&gHardwareInterruptV3Protocol, Index);
// Set Priority // Set Priority
ArmGicSetInterruptPriority ( ArmGicSetInterruptPriority (Index, ARM_GIC_DEFAULT_PRIORITY);
mGicDistributorBase,
mGicRedistributorBase,
Index,
ARM_GIC_DEFAULT_PRIORITY
);
} }
// Targets the interrupts to the Primary Cpu // Targets the interrupts to the Primary Cpu