mirror of https://github.com/acidanthera/audk.git
PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.c: rewrap code, strip trailing ws
In this patch the code and the comments embedded in code are rewrapped to 79 columns, plus any trailing whitespace is stripped. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Gabriel Somlo <somlo@cmu.edu> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17948 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
parent
7c7af556e0
commit
3d9eddb1b7
|
@ -24,7 +24,9 @@
|
||||||
//
|
//
|
||||||
UINTN RootBridgeNumber[1] = { 1 };
|
UINTN RootBridgeNumber[1] = { 1 };
|
||||||
|
|
||||||
UINT64 RootBridgeAttribute[1][1] = { { EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM } };
|
UINT64 RootBridgeAttribute[1][1] = {
|
||||||
|
{ EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM }
|
||||||
|
};
|
||||||
|
|
||||||
EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[1][1] = {
|
EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[1][1] = {
|
||||||
{
|
{
|
||||||
|
@ -41,7 +43,7 @@ EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[1][1] = {
|
||||||
EISA_PNP_ID(0x0A03),
|
EISA_PNP_ID(0x0A03),
|
||||||
0
|
0
|
||||||
},
|
},
|
||||||
|
|
||||||
{
|
{
|
||||||
END_DEVICE_PATH_TYPE,
|
END_DEVICE_PATH_TYPE,
|
||||||
END_ENTIRE_DEVICE_PATH_SUBTYPE,
|
END_ENTIRE_DEVICE_PATH_SUBTYPE,
|
||||||
|
@ -105,35 +107,37 @@ InitializePciHostBridge (
|
||||||
UINTN Loop2;
|
UINTN Loop2;
|
||||||
PCI_HOST_BRIDGE_INSTANCE *HostBridge;
|
PCI_HOST_BRIDGE_INSTANCE *HostBridge;
|
||||||
PCI_ROOT_BRIDGE_INSTANCE *PrivateData;
|
PCI_ROOT_BRIDGE_INSTANCE *PrivateData;
|
||||||
|
|
||||||
mDriverImageHandle = ImageHandle;
|
mDriverImageHandle = ImageHandle;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Create Host Bridge Device Handle
|
// Create Host Bridge Device Handle
|
||||||
//
|
//
|
||||||
for (Loop1 = 0; Loop1 < HOST_BRIDGE_NUMBER; Loop1++) {
|
for (Loop1 = 0; Loop1 < HOST_BRIDGE_NUMBER; Loop1++) {
|
||||||
HostBridge = AllocateCopyPool (sizeof(PCI_HOST_BRIDGE_INSTANCE), &mPciHostBridgeInstanceTemplate);
|
HostBridge = AllocateCopyPool (sizeof(PCI_HOST_BRIDGE_INSTANCE),
|
||||||
|
&mPciHostBridgeInstanceTemplate);
|
||||||
if (HostBridge == NULL) {
|
if (HostBridge == NULL) {
|
||||||
return EFI_OUT_OF_RESOURCES;
|
return EFI_OUT_OF_RESOURCES;
|
||||||
}
|
}
|
||||||
|
|
||||||
HostBridge->RootBridgeNumber = RootBridgeNumber[Loop1];
|
HostBridge->RootBridgeNumber = RootBridgeNumber[Loop1];
|
||||||
InitializeListHead (&HostBridge->Head);
|
InitializeListHead (&HostBridge->Head);
|
||||||
|
|
||||||
Status = gBS->InstallMultipleProtocolInterfaces (
|
Status = gBS->InstallMultipleProtocolInterfaces (
|
||||||
&HostBridge->HostBridgeHandle,
|
&HostBridge->HostBridgeHandle,
|
||||||
&gEfiPciHostBridgeResourceAllocationProtocolGuid, &HostBridge->ResAlloc,
|
&gEfiPciHostBridgeResourceAllocationProtocolGuid,
|
||||||
|
&HostBridge->ResAlloc,
|
||||||
NULL
|
NULL
|
||||||
);
|
);
|
||||||
if (EFI_ERROR (Status)) {
|
if (EFI_ERROR (Status)) {
|
||||||
FreePool (HostBridge);
|
FreePool (HostBridge);
|
||||||
return EFI_DEVICE_ERROR;
|
return EFI_DEVICE_ERROR;
|
||||||
}
|
}
|
||||||
|
|
||||||
//
|
//
|
||||||
// Create Root Bridge Device Handle in this Host Bridge
|
// Create Root Bridge Device Handle in this Host Bridge
|
||||||
//
|
//
|
||||||
|
|
||||||
for (Loop2 = 0; Loop2 < HostBridge->RootBridgeNumber; Loop2++) {
|
for (Loop2 = 0; Loop2 < HostBridge->RootBridgeNumber; Loop2++) {
|
||||||
PrivateData = AllocateZeroPool (sizeof(PCI_ROOT_BRIDGE_INSTANCE));
|
PrivateData = AllocateZeroPool (sizeof(PCI_ROOT_BRIDGE_INSTANCE));
|
||||||
if (PrivateData == NULL) {
|
if (PrivateData == NULL) {
|
||||||
|
@ -141,29 +145,32 @@ InitializePciHostBridge (
|
||||||
}
|
}
|
||||||
|
|
||||||
PrivateData->Signature = PCI_ROOT_BRIDGE_SIGNATURE;
|
PrivateData->Signature = PCI_ROOT_BRIDGE_SIGNATURE;
|
||||||
PrivateData->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath[Loop1][Loop2];
|
PrivateData->DevicePath =
|
||||||
|
(EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath[Loop1][Loop2];
|
||||||
|
|
||||||
RootBridgeConstructor (
|
RootBridgeConstructor (
|
||||||
&PrivateData->Io,
|
&PrivateData->Io,
|
||||||
HostBridge->HostBridgeHandle,
|
HostBridge->HostBridgeHandle,
|
||||||
RootBridgeAttribute[Loop1][Loop2],
|
RootBridgeAttribute[Loop1][Loop2],
|
||||||
&mResAperture[Loop1][Loop2]
|
&mResAperture[Loop1][Loop2]
|
||||||
);
|
);
|
||||||
|
|
||||||
Status = gBS->InstallMultipleProtocolInterfaces(
|
Status = gBS->InstallMultipleProtocolInterfaces(
|
||||||
&PrivateData->Handle,
|
&PrivateData->Handle,
|
||||||
&gEfiDevicePathProtocolGuid, PrivateData->DevicePath,
|
&gEfiDevicePathProtocolGuid,
|
||||||
&gEfiPciRootBridgeIoProtocolGuid, &PrivateData->Io,
|
PrivateData->DevicePath,
|
||||||
|
&gEfiPciRootBridgeIoProtocolGuid,
|
||||||
|
&PrivateData->Io,
|
||||||
NULL
|
NULL
|
||||||
);
|
);
|
||||||
if (EFI_ERROR (Status)) {
|
if (EFI_ERROR (Status)) {
|
||||||
FreePool(PrivateData);
|
FreePool(PrivateData);
|
||||||
return EFI_DEVICE_ERROR;
|
return EFI_DEVICE_ERROR;
|
||||||
}
|
}
|
||||||
|
|
||||||
InsertTailList (&HostBridge->Head, &PrivateData->Link);
|
InsertTailList (&HostBridge->Head, &PrivateData->Link);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
}
|
}
|
||||||
|
@ -295,18 +302,18 @@ NotifyPhase(
|
||||||
UINTN BitsOfAlignment;
|
UINTN BitsOfAlignment;
|
||||||
EFI_STATUS Status;
|
EFI_STATUS Status;
|
||||||
EFI_STATUS ReturnStatus;
|
EFI_STATUS ReturnStatus;
|
||||||
|
|
||||||
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
|
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
|
||||||
|
|
||||||
switch (Phase) {
|
switch (Phase) {
|
||||||
|
|
||||||
case EfiPciHostBridgeBeginEnumeration:
|
case EfiPciHostBridgeBeginEnumeration:
|
||||||
if (HostBridgeInstance->CanRestarted) {
|
if (HostBridgeInstance->CanRestarted) {
|
||||||
//
|
//
|
||||||
// Reset the Each Root Bridge
|
// Reset the Each Root Bridge
|
||||||
//
|
//
|
||||||
List = HostBridgeInstance->Head.ForwardLink;
|
List = HostBridgeInstance->Head.ForwardLink;
|
||||||
|
|
||||||
while (List != &HostBridgeInstance->Head) {
|
while (List != &HostBridgeInstance->Head) {
|
||||||
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
|
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
|
||||||
for (Index = TypeIo; Index < TypeMax; Index++) {
|
for (Index = TypeIo; Index < TypeMax; Index++) {
|
||||||
|
@ -315,18 +322,18 @@ NotifyPhase(
|
||||||
RootBridgeInstance->ResAllocNode[Index].Length = 0;
|
RootBridgeInstance->ResAllocNode[Index].Length = 0;
|
||||||
RootBridgeInstance->ResAllocNode[Index].Status = ResNone;
|
RootBridgeInstance->ResAllocNode[Index].Status = ResNone;
|
||||||
}
|
}
|
||||||
|
|
||||||
List = List->ForwardLink;
|
List = List->ForwardLink;
|
||||||
}
|
}
|
||||||
|
|
||||||
HostBridgeInstance->ResourceSubmited = FALSE;
|
HostBridgeInstance->ResourceSubmited = FALSE;
|
||||||
HostBridgeInstance->CanRestarted = TRUE;
|
HostBridgeInstance->CanRestarted = TRUE;
|
||||||
} else {
|
} else {
|
||||||
//
|
//
|
||||||
// Can not restart
|
// Can not restart
|
||||||
//
|
//
|
||||||
return EFI_NOT_READY;
|
return EFI_NOT_READY;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case EfiPciHostBridgeEndEnumeration:
|
case EfiPciHostBridgeEndEnumeration:
|
||||||
|
@ -334,21 +341,24 @@ NotifyPhase(
|
||||||
|
|
||||||
case EfiPciHostBridgeBeginBusAllocation:
|
case EfiPciHostBridgeBeginBusAllocation:
|
||||||
//
|
//
|
||||||
// No specific action is required here, can perform any chipset specific programing
|
// No specific action is required here, can perform any chipset specific
|
||||||
|
// programing
|
||||||
//
|
//
|
||||||
HostBridgeInstance->CanRestarted = FALSE;
|
HostBridgeInstance->CanRestarted = FALSE;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case EfiPciHostBridgeEndBusAllocation:
|
case EfiPciHostBridgeEndBusAllocation:
|
||||||
//
|
//
|
||||||
// No specific action is required here, can perform any chipset specific programing
|
// No specific action is required here, can perform any chipset specific
|
||||||
|
// programing
|
||||||
//
|
//
|
||||||
//HostBridgeInstance->CanRestarted = FALSE;
|
//HostBridgeInstance->CanRestarted = FALSE;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case EfiPciHostBridgeBeginResourceAllocation:
|
case EfiPciHostBridgeBeginResourceAllocation:
|
||||||
//
|
//
|
||||||
// No specific action is required here, can perform any chipset specific programing
|
// No specific action is required here, can perform any chipset specific
|
||||||
|
// programing
|
||||||
//
|
//
|
||||||
//HostBridgeInstance->CanRestarted = FALSE;
|
//HostBridgeInstance->CanRestarted = FALSE;
|
||||||
break;
|
break;
|
||||||
|
@ -357,7 +367,7 @@ NotifyPhase(
|
||||||
ReturnStatus = EFI_SUCCESS;
|
ReturnStatus = EFI_SUCCESS;
|
||||||
if (HostBridgeInstance->ResourceSubmited) {
|
if (HostBridgeInstance->ResourceSubmited) {
|
||||||
//
|
//
|
||||||
// Take care of the resource dependencies between the root bridges
|
// Take care of the resource dependencies between the root bridges
|
||||||
//
|
//
|
||||||
List = HostBridgeInstance->Head.ForwardLink;
|
List = HostBridgeInstance->Head.ForwardLink;
|
||||||
|
|
||||||
|
@ -365,17 +375,20 @@ NotifyPhase(
|
||||||
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
|
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
|
||||||
for (Index = TypeIo; Index < TypeBus; Index++) {
|
for (Index = TypeIo; Index < TypeBus; Index++) {
|
||||||
if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
|
if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
|
||||||
|
|
||||||
AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
|
AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Get the number of '1' in Alignment.
|
// Get the number of '1' in Alignment.
|
||||||
//
|
//
|
||||||
BitsOfAlignment = (UINTN) (HighBitSet64 (RootBridgeInstance->ResAllocNode[Index].Alignment) + 1);
|
BitsOfAlignment =
|
||||||
|
(UINTN)(HighBitSet64 (
|
||||||
|
RootBridgeInstance->ResAllocNode[Index].Alignment
|
||||||
|
) + 1);
|
||||||
|
|
||||||
switch (Index) {
|
switch (Index) {
|
||||||
|
|
||||||
case TypeIo:
|
case TypeIo:
|
||||||
//
|
//
|
||||||
// It is impossible for this chipset to align 0xFFFF for IO16
|
// It is impossible for this chipset to align 0xFFFF for IO16
|
||||||
// So clear it
|
// So clear it
|
||||||
|
@ -383,22 +396,24 @@ NotifyPhase(
|
||||||
if (BitsOfAlignment >= 16) {
|
if (BitsOfAlignment >= 16) {
|
||||||
BitsOfAlignment = 0;
|
BitsOfAlignment = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
Status = gDS->AllocateIoSpace (
|
Status = gDS->AllocateIoSpace (
|
||||||
EfiGcdAllocateAnySearchBottomUp,
|
EfiGcdAllocateAnySearchBottomUp,
|
||||||
EfiGcdIoTypeIo,
|
EfiGcdIoTypeIo,
|
||||||
BitsOfAlignment,
|
BitsOfAlignment,
|
||||||
AddrLen,
|
AddrLen,
|
||||||
&BaseAddress,
|
&BaseAddress,
|
||||||
mDriverImageHandle,
|
mDriverImageHandle,
|
||||||
NULL
|
NULL
|
||||||
);
|
);
|
||||||
|
|
||||||
if (!EFI_ERROR (Status)) {
|
if (!EFI_ERROR (Status)) {
|
||||||
RootBridgeInstance->ResAllocNode[Index].Base = (UINTN)BaseAddress;
|
RootBridgeInstance->ResAllocNode[Index].Base =
|
||||||
RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated;
|
(UINTN)BaseAddress;
|
||||||
|
RootBridgeInstance->ResAllocNode[Index].Status =
|
||||||
|
ResAllocated;
|
||||||
} else {
|
} else {
|
||||||
ReturnStatus = Status;
|
ReturnStatus = Status;
|
||||||
if (Status != EFI_OUT_OF_RESOURCES) {
|
if (Status != EFI_OUT_OF_RESOURCES) {
|
||||||
RootBridgeInstance->ResAllocNode[Index].Length = 0;
|
RootBridgeInstance->ResAllocNode[Index].Length = 0;
|
||||||
}
|
}
|
||||||
|
@ -409,55 +424,58 @@ NotifyPhase(
|
||||||
|
|
||||||
case TypeMem32:
|
case TypeMem32:
|
||||||
//
|
//
|
||||||
// It is impossible for this chipset to align 0xFFFFFFFF for Mem32
|
// It is impossible for this chipset to align 0xFFFFFFFF for
|
||||||
// So clear it
|
// Mem32
|
||||||
|
// So clear it
|
||||||
//
|
//
|
||||||
|
|
||||||
if (BitsOfAlignment >= 32) {
|
if (BitsOfAlignment >= 32) {
|
||||||
BitsOfAlignment = 0;
|
BitsOfAlignment = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
Status = gDS->AllocateMemorySpace (
|
Status = gDS->AllocateMemorySpace (
|
||||||
EfiGcdAllocateAnySearchBottomUp,
|
EfiGcdAllocateAnySearchBottomUp,
|
||||||
EfiGcdMemoryTypeMemoryMappedIo,
|
EfiGcdMemoryTypeMemoryMappedIo,
|
||||||
BitsOfAlignment,
|
BitsOfAlignment,
|
||||||
AddrLen,
|
AddrLen,
|
||||||
&BaseAddress,
|
&BaseAddress,
|
||||||
mDriverImageHandle,
|
mDriverImageHandle,
|
||||||
NULL
|
NULL
|
||||||
);
|
);
|
||||||
|
|
||||||
if (!EFI_ERROR (Status)) {
|
if (!EFI_ERROR (Status)) {
|
||||||
// We were able to allocate the PCI memory
|
// We were able to allocate the PCI memory
|
||||||
RootBridgeInstance->ResAllocNode[Index].Base = (UINTN)BaseAddress;
|
RootBridgeInstance->ResAllocNode[Index].Base =
|
||||||
RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated;
|
(UINTN)BaseAddress;
|
||||||
|
RootBridgeInstance->ResAllocNode[Index].Status =
|
||||||
|
ResAllocated;
|
||||||
|
|
||||||
} else {
|
} else {
|
||||||
// Not able to allocate enough PCI memory
|
// Not able to allocate enough PCI memory
|
||||||
ReturnStatus = Status;
|
ReturnStatus = Status;
|
||||||
|
|
||||||
if (Status != EFI_OUT_OF_RESOURCES) {
|
if (Status != EFI_OUT_OF_RESOURCES) {
|
||||||
RootBridgeInstance->ResAllocNode[Index].Length = 0;
|
RootBridgeInstance->ResAllocNode[Index].Length = 0;
|
||||||
}
|
}
|
||||||
ASSERT (FALSE);
|
ASSERT (FALSE);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TypePMem32:
|
case TypePMem32:
|
||||||
case TypeMem64:
|
case TypeMem64:
|
||||||
case TypePMem64:
|
case TypePMem64:
|
||||||
ReturnStatus = EFI_ABORTED;
|
ReturnStatus = EFI_ABORTED;
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
ASSERT (FALSE);
|
ASSERT (FALSE);
|
||||||
break;
|
break;
|
||||||
}; //end switch
|
}; //end switch
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
List = List->ForwardLink;
|
List = List->ForwardLink;
|
||||||
}
|
}
|
||||||
|
|
||||||
return ReturnStatus;
|
return ReturnStatus;
|
||||||
|
|
||||||
} else {
|
} else {
|
||||||
|
@ -479,8 +497,8 @@ NotifyPhase(
|
||||||
BaseAddress = RootBridgeInstance->ResAllocNode[Index].Base;
|
BaseAddress = RootBridgeInstance->ResAllocNode[Index].Base;
|
||||||
switch (Index) {
|
switch (Index) {
|
||||||
|
|
||||||
case TypeIo:
|
case TypeIo:
|
||||||
Status = gDS->FreeIoSpace (BaseAddress, AddrLen);
|
Status = gDS->FreeIoSpace (BaseAddress, AddrLen);
|
||||||
if (EFI_ERROR (Status)) {
|
if (EFI_ERROR (Status)) {
|
||||||
ReturnStatus = Status;
|
ReturnStatus = Status;
|
||||||
}
|
}
|
||||||
|
@ -500,7 +518,7 @@ NotifyPhase(
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TypePMem64:
|
case TypePMem64:
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
ASSERT (FALSE);
|
ASSERT (FALSE);
|
||||||
|
@ -513,12 +531,12 @@ NotifyPhase(
|
||||||
RootBridgeInstance->ResAllocNode[Index].Status = ResNone;
|
RootBridgeInstance->ResAllocNode[Index].Status = ResNone;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
List = List->ForwardLink;
|
List = List->ForwardLink;
|
||||||
}
|
}
|
||||||
|
|
||||||
HostBridgeInstance->ResourceSubmited = FALSE;
|
HostBridgeInstance->ResourceSubmited = FALSE;
|
||||||
HostBridgeInstance->CanRestarted = TRUE;
|
HostBridgeInstance->CanRestarted = TRUE;
|
||||||
return ReturnStatus;
|
return ReturnStatus;
|
||||||
|
|
||||||
case EfiPciHostBridgeEndResourceAllocation:
|
case EfiPciHostBridgeEndResourceAllocation:
|
||||||
|
@ -528,8 +546,8 @@ NotifyPhase(
|
||||||
default:
|
default:
|
||||||
return EFI_INVALID_PARAMETER;
|
return EFI_INVALID_PARAMETER;
|
||||||
}
|
}
|
||||||
|
|
||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -573,16 +591,16 @@ GetNextRootBridge(
|
||||||
IN OUT EFI_HANDLE *RootBridgeHandle
|
IN OUT EFI_HANDLE *RootBridgeHandle
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
BOOLEAN NoRootBridge;
|
BOOLEAN NoRootBridge;
|
||||||
LIST_ENTRY *List;
|
LIST_ENTRY *List;
|
||||||
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
|
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
|
||||||
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
|
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
|
||||||
|
|
||||||
NoRootBridge = TRUE;
|
NoRootBridge = TRUE;
|
||||||
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
|
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
|
||||||
List = HostBridgeInstance->Head.ForwardLink;
|
List = HostBridgeInstance->Head.ForwardLink;
|
||||||
|
|
||||||
|
|
||||||
while (List != &HostBridgeInstance->Head) {
|
while (List != &HostBridgeInstance->Head) {
|
||||||
NoRootBridge = FALSE;
|
NoRootBridge = FALSE;
|
||||||
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
|
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
|
||||||
|
@ -601,16 +619,16 @@ GetNextRootBridge(
|
||||||
if (List!=&HostBridgeInstance->Head) {
|
if (List!=&HostBridgeInstance->Head) {
|
||||||
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
|
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
|
||||||
*RootBridgeHandle = RootBridgeInstance->Handle;
|
*RootBridgeHandle = RootBridgeInstance->Handle;
|
||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
} else {
|
} else {
|
||||||
return EFI_NOT_FOUND;
|
return EFI_NOT_FOUND;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
List = List->ForwardLink;
|
List = List->ForwardLink;
|
||||||
} //end while
|
} //end while
|
||||||
|
|
||||||
if (NoRootBridge) {
|
if (NoRootBridge) {
|
||||||
return EFI_NOT_FOUND;
|
return EFI_NOT_FOUND;
|
||||||
} else {
|
} else {
|
||||||
|
@ -684,17 +702,17 @@ GetAttributes(
|
||||||
OUT UINT64 *Attributes
|
OUT UINT64 *Attributes
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
LIST_ENTRY *List;
|
LIST_ENTRY *List;
|
||||||
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
|
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
|
||||||
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
|
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
|
||||||
|
|
||||||
if (Attributes == NULL) {
|
if (Attributes == NULL) {
|
||||||
return EFI_INVALID_PARAMETER;
|
return EFI_INVALID_PARAMETER;
|
||||||
}
|
}
|
||||||
|
|
||||||
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
|
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
|
||||||
List = HostBridgeInstance->Head.ForwardLink;
|
List = HostBridgeInstance->Head.ForwardLink;
|
||||||
|
|
||||||
while (List != &HostBridgeInstance->Head) {
|
while (List != &HostBridgeInstance->Head) {
|
||||||
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
|
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
|
||||||
if (RootBridgeHandle == RootBridgeInstance->Handle) {
|
if (RootBridgeHandle == RootBridgeInstance->Handle) {
|
||||||
|
@ -703,9 +721,9 @@ GetAttributes(
|
||||||
}
|
}
|
||||||
List = List->ForwardLink;
|
List = List->ForwardLink;
|
||||||
}
|
}
|
||||||
|
|
||||||
//
|
//
|
||||||
// RootBridgeHandle is not an EFI_HANDLE
|
// RootBridgeHandle is not an EFI_HANDLE
|
||||||
// that was returned on a previous call to GetNextRootBridge()
|
// that was returned on a previous call to GetNextRootBridge()
|
||||||
//
|
//
|
||||||
return EFI_INVALID_PARAMETER;
|
return EFI_INVALID_PARAMETER;
|
||||||
|
@ -741,17 +759,17 @@ StartBusEnumeration(
|
||||||
OUT VOID **Configuration
|
OUT VOID **Configuration
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
LIST_ENTRY *List;
|
LIST_ENTRY *List;
|
||||||
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
|
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
|
||||||
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
|
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
|
||||||
VOID *Buffer;
|
VOID *Buffer;
|
||||||
UINT8 *Temp;
|
UINT8 *Temp;
|
||||||
UINT64 BusStart;
|
UINT64 BusStart;
|
||||||
UINT64 BusEnd;
|
UINT64 BusEnd;
|
||||||
|
|
||||||
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
|
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
|
||||||
List = HostBridgeInstance->Head.ForwardLink;
|
List = HostBridgeInstance->Head.ForwardLink;
|
||||||
|
|
||||||
while (List != &HostBridgeInstance->Head) {
|
while (List != &HostBridgeInstance->Head) {
|
||||||
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
|
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
|
||||||
if (RootBridgeHandle == RootBridgeInstance->Handle) {
|
if (RootBridgeHandle == RootBridgeInstance->Handle) {
|
||||||
|
@ -763,35 +781,39 @@ StartBusEnumeration(
|
||||||
//
|
//
|
||||||
// Program the Hardware(if needed) if error return EFI_DEVICE_ERROR
|
// Program the Hardware(if needed) if error return EFI_DEVICE_ERROR
|
||||||
//
|
//
|
||||||
|
|
||||||
Buffer = AllocatePool (sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof(EFI_ACPI_END_TAG_DESCRIPTOR));
|
Buffer = AllocatePool (
|
||||||
|
sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) +
|
||||||
|
sizeof(EFI_ACPI_END_TAG_DESCRIPTOR)
|
||||||
|
);
|
||||||
if (Buffer == NULL) {
|
if (Buffer == NULL) {
|
||||||
return EFI_OUT_OF_RESOURCES;
|
return EFI_OUT_OF_RESOURCES;
|
||||||
}
|
}
|
||||||
|
|
||||||
Temp = (UINT8 *)Buffer;
|
Temp = (UINT8 *)Buffer;
|
||||||
|
|
||||||
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Desc = 0x8A;
|
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Desc = 0x8A;
|
||||||
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Len = 0x2B;
|
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Len = 0x2B;
|
||||||
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->ResType = 2;
|
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->ResType = 2;
|
||||||
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->GenFlag = 0;
|
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->GenFlag = 0;
|
||||||
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->SpecificFlag = 0;
|
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->SpecificFlag = 0;
|
||||||
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrSpaceGranularity = 0;
|
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrSpaceGranularity = 0;
|
||||||
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMin = BusStart;
|
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMin = BusStart;
|
||||||
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMax = 0;
|
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMax = 0;
|
||||||
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrTranslationOffset = 0;
|
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrTranslationOffset = 0;
|
||||||
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrLen = BusEnd - BusStart + 1;
|
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrLen =
|
||||||
|
BusEnd - BusStart + 1;
|
||||||
|
|
||||||
Temp = Temp + sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
|
Temp = Temp + sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
|
||||||
((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;
|
((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;
|
||||||
((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;
|
((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;
|
||||||
|
|
||||||
*Configuration = Buffer;
|
*Configuration = Buffer;
|
||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
}
|
}
|
||||||
List = List->ForwardLink;
|
List = List->ForwardLink;
|
||||||
}
|
}
|
||||||
|
|
||||||
return EFI_INVALID_PARAMETER;
|
return EFI_INVALID_PARAMETER;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -849,27 +871,27 @@ SetBusNumbers(
|
||||||
IN VOID *Configuration
|
IN VOID *Configuration
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
LIST_ENTRY *List;
|
LIST_ENTRY *List;
|
||||||
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
|
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
|
||||||
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
|
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
|
||||||
UINT8 *Ptr;
|
UINT8 *Ptr;
|
||||||
UINTN BusStart;
|
UINTN BusStart;
|
||||||
UINTN BusEnd;
|
UINTN BusEnd;
|
||||||
UINTN BusLen;
|
UINTN BusLen;
|
||||||
|
|
||||||
if (Configuration == NULL) {
|
if (Configuration == NULL) {
|
||||||
return EFI_INVALID_PARAMETER;
|
return EFI_INVALID_PARAMETER;
|
||||||
}
|
}
|
||||||
|
|
||||||
Ptr = Configuration;
|
Ptr = Configuration;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Check the Configuration is valid
|
// Check the Configuration is valid
|
||||||
//
|
//
|
||||||
if(*Ptr != ACPI_ADDRESS_SPACE_DESCRIPTOR) {
|
if(*Ptr != ACPI_ADDRESS_SPACE_DESCRIPTOR) {
|
||||||
return EFI_INVALID_PARAMETER;
|
return EFI_INVALID_PARAMETER;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->ResType != 2) {
|
if (((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->ResType != 2) {
|
||||||
return EFI_INVALID_PARAMETER;
|
return EFI_INVALID_PARAMETER;
|
||||||
}
|
}
|
||||||
|
@ -878,44 +900,48 @@ SetBusNumbers(
|
||||||
if (*Ptr != ACPI_END_TAG_DESCRIPTOR) {
|
if (*Ptr != ACPI_END_TAG_DESCRIPTOR) {
|
||||||
return EFI_INVALID_PARAMETER;
|
return EFI_INVALID_PARAMETER;
|
||||||
}
|
}
|
||||||
|
|
||||||
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
|
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
|
||||||
List = HostBridgeInstance->Head.ForwardLink;
|
List = HostBridgeInstance->Head.ForwardLink;
|
||||||
|
|
||||||
Ptr = Configuration;
|
Ptr = Configuration;
|
||||||
|
|
||||||
while (List != &HostBridgeInstance->Head) {
|
while (List != &HostBridgeInstance->Head) {
|
||||||
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
|
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
|
||||||
if (RootBridgeHandle == RootBridgeInstance->Handle) {
|
if (RootBridgeHandle == RootBridgeInstance->Handle) {
|
||||||
BusStart = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrRangeMin;
|
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc;
|
||||||
BusLen = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrLen;
|
|
||||||
|
Desc = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr;
|
||||||
|
BusStart = (UINTN)Desc->AddrRangeMin;
|
||||||
|
BusLen = (UINTN)Desc->AddrLen;
|
||||||
BusEnd = BusStart + BusLen - 1;
|
BusEnd = BusStart + BusLen - 1;
|
||||||
|
|
||||||
if (BusStart > BusEnd) {
|
if (BusStart > BusEnd) {
|
||||||
return EFI_INVALID_PARAMETER;
|
return EFI_INVALID_PARAMETER;
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((BusStart < RootBridgeInstance->BusBase) || (BusEnd > RootBridgeInstance->BusLimit)) {
|
if ((BusStart < RootBridgeInstance->BusBase) ||
|
||||||
|
(BusEnd > RootBridgeInstance->BusLimit)) {
|
||||||
return EFI_INVALID_PARAMETER;
|
return EFI_INVALID_PARAMETER;
|
||||||
}
|
}
|
||||||
|
|
||||||
//
|
//
|
||||||
// Update the Bus Range
|
// Update the Bus Range
|
||||||
//
|
//
|
||||||
RootBridgeInstance->ResAllocNode[TypeBus].Base = BusStart;
|
RootBridgeInstance->ResAllocNode[TypeBus].Base = BusStart;
|
||||||
RootBridgeInstance->ResAllocNode[TypeBus].Length = BusLen;
|
RootBridgeInstance->ResAllocNode[TypeBus].Length = BusLen;
|
||||||
RootBridgeInstance->ResAllocNode[TypeBus].Status = ResAllocated;
|
RootBridgeInstance->ResAllocNode[TypeBus].Status = ResAllocated;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Program the Root Bridge Hardware
|
// Program the Root Bridge Hardware
|
||||||
//
|
//
|
||||||
|
|
||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
}
|
}
|
||||||
|
|
||||||
List = List->ForwardLink;
|
List = List->ForwardLink;
|
||||||
}
|
}
|
||||||
|
|
||||||
return EFI_INVALID_PARAMETER;
|
return EFI_INVALID_PARAMETER;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -974,32 +1000,32 @@ SubmitResources(
|
||||||
IN VOID *Configuration
|
IN VOID *Configuration
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
LIST_ENTRY *List;
|
LIST_ENTRY *List;
|
||||||
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
|
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
|
||||||
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
|
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
|
||||||
UINT8 *Temp;
|
UINT8 *Temp;
|
||||||
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
|
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
|
||||||
UINT64 AddrLen;
|
UINT64 AddrLen;
|
||||||
UINT64 Alignment;
|
UINT64 Alignment;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Check the input parameter: Configuration
|
// Check the input parameter: Configuration
|
||||||
//
|
//
|
||||||
if (Configuration == NULL) {
|
if (Configuration == NULL) {
|
||||||
return EFI_INVALID_PARAMETER;
|
return EFI_INVALID_PARAMETER;
|
||||||
}
|
}
|
||||||
|
|
||||||
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
|
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
|
||||||
List = HostBridgeInstance->Head.ForwardLink;
|
List = HostBridgeInstance->Head.ForwardLink;
|
||||||
|
|
||||||
Temp = (UINT8 *)Configuration;
|
Temp = (UINT8 *)Configuration;
|
||||||
while ( *Temp == 0x8A) {
|
while ( *Temp == 0x8A) {
|
||||||
Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;
|
Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;
|
||||||
}
|
}
|
||||||
if (*Temp != 0x79) {
|
if (*Temp != 0x79) {
|
||||||
return EFI_INVALID_PARAMETER;
|
return EFI_INVALID_PARAMETER;
|
||||||
}
|
}
|
||||||
|
|
||||||
Temp = (UINT8 *)Configuration;
|
Temp = (UINT8 *)Configuration;
|
||||||
while (List != &HostBridgeInstance->Head) {
|
while (List != &HostBridgeInstance->Head) {
|
||||||
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
|
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
|
||||||
|
@ -1017,29 +1043,32 @@ SubmitResources(
|
||||||
//
|
//
|
||||||
// Check address range alignment
|
// Check address range alignment
|
||||||
//
|
//
|
||||||
if (Ptr->AddrRangeMax >= 0xffffffff || Ptr->AddrRangeMax != (GetPowerOfTwo64 (Ptr->AddrRangeMax + 1) - 1)) {
|
if (Ptr->AddrRangeMax >= 0xffffffff ||
|
||||||
|
Ptr->AddrRangeMax != (GetPowerOfTwo64 (
|
||||||
|
Ptr->AddrRangeMax + 1) - 1)) {
|
||||||
return EFI_INVALID_PARAMETER;
|
return EFI_INVALID_PARAMETER;
|
||||||
}
|
}
|
||||||
|
|
||||||
switch (Ptr->ResType) {
|
switch (Ptr->ResType) {
|
||||||
|
|
||||||
case 0:
|
case 0:
|
||||||
|
|
||||||
//
|
//
|
||||||
// Check invalid Address Sapce Granularity
|
// Check invalid Address Sapce Granularity
|
||||||
//
|
//
|
||||||
if (Ptr->AddrSpaceGranularity != 32) {
|
if (Ptr->AddrSpaceGranularity != 32) {
|
||||||
return EFI_INVALID_PARAMETER;
|
return EFI_INVALID_PARAMETER;
|
||||||
}
|
}
|
||||||
|
|
||||||
//
|
//
|
||||||
// check the memory resource request is supported by PCI root bridge
|
// check the memory resource request is supported by PCI root bridge
|
||||||
//
|
//
|
||||||
if (RootBridgeInstance->RootBridgeAttrib == EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM &&
|
if (RootBridgeInstance->RootBridgeAttrib ==
|
||||||
Ptr->SpecificFlag == 0x06) {
|
EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM &&
|
||||||
|
Ptr->SpecificFlag == 0x06) {
|
||||||
return EFI_INVALID_PARAMETER;
|
return EFI_INVALID_PARAMETER;
|
||||||
}
|
}
|
||||||
|
|
||||||
AddrLen = Ptr->AddrLen;
|
AddrLen = Ptr->AddrLen;
|
||||||
Alignment = Ptr->AddrRangeMax;
|
Alignment = Ptr->AddrRangeMax;
|
||||||
if (Ptr->AddrSpaceGranularity == 32) {
|
if (Ptr->AddrSpaceGranularity == 32) {
|
||||||
|
@ -1047,20 +1076,25 @@ SubmitResources(
|
||||||
//
|
//
|
||||||
// Apply from GCD
|
// Apply from GCD
|
||||||
//
|
//
|
||||||
RootBridgeInstance->ResAllocNode[TypePMem32].Status = ResSubmitted;
|
RootBridgeInstance->ResAllocNode[TypePMem32].Status =
|
||||||
|
ResSubmitted;
|
||||||
} else {
|
} else {
|
||||||
RootBridgeInstance->ResAllocNode[TypeMem32].Length = AddrLen;
|
RootBridgeInstance->ResAllocNode[TypeMem32].Length = AddrLen;
|
||||||
RootBridgeInstance->ResAllocNode[TypeMem32].Alignment = Alignment;
|
RootBridgeInstance->ResAllocNode[TypeMem32].Alignment =
|
||||||
RootBridgeInstance->ResAllocNode[TypeMem32].Status = ResRequested;
|
Alignment;
|
||||||
|
RootBridgeInstance->ResAllocNode[TypeMem32].Status =
|
||||||
|
ResRequested;
|
||||||
HostBridgeInstance->ResourceSubmited = TRUE;
|
HostBridgeInstance->ResourceSubmited = TRUE;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if (Ptr->AddrSpaceGranularity == 64) {
|
if (Ptr->AddrSpaceGranularity == 64) {
|
||||||
if (Ptr->SpecificFlag == 0x06) {
|
if (Ptr->SpecificFlag == 0x06) {
|
||||||
RootBridgeInstance->ResAllocNode[TypePMem64].Status = ResSubmitted;
|
RootBridgeInstance->ResAllocNode[TypePMem64].Status =
|
||||||
|
ResSubmitted;
|
||||||
} else {
|
} else {
|
||||||
RootBridgeInstance->ResAllocNode[TypeMem64].Status = ResSubmitted;
|
RootBridgeInstance->ResAllocNode[TypeMem64].Status =
|
||||||
|
ResSubmitted;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
@ -1071,22 +1105,22 @@ SubmitResources(
|
||||||
RootBridgeInstance->ResAllocNode[TypeIo].Length = AddrLen;
|
RootBridgeInstance->ResAllocNode[TypeIo].Length = AddrLen;
|
||||||
RootBridgeInstance->ResAllocNode[TypeIo].Alignment = Alignment;
|
RootBridgeInstance->ResAllocNode[TypeIo].Alignment = Alignment;
|
||||||
RootBridgeInstance->ResAllocNode[TypeIo].Status = ResRequested;
|
RootBridgeInstance->ResAllocNode[TypeIo].Status = ResRequested;
|
||||||
HostBridgeInstance->ResourceSubmited = TRUE;
|
HostBridgeInstance->ResourceSubmited = TRUE;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
break;
|
break;
|
||||||
};
|
};
|
||||||
|
|
||||||
Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;
|
Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;
|
||||||
}
|
}
|
||||||
|
|
||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
}
|
}
|
||||||
|
|
||||||
List = List->ForwardLink;
|
List = List->ForwardLink;
|
||||||
}
|
}
|
||||||
|
|
||||||
return EFI_INVALID_PARAMETER;
|
return EFI_INVALID_PARAMETER;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1130,16 +1164,16 @@ GetProposedResources(
|
||||||
OUT VOID **Configuration
|
OUT VOID **Configuration
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
LIST_ENTRY *List;
|
LIST_ENTRY *List;
|
||||||
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
|
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
|
||||||
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
|
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
|
||||||
UINTN Index;
|
UINTN Index;
|
||||||
UINTN Number;
|
UINTN Number;
|
||||||
VOID *Buffer;
|
VOID *Buffer;
|
||||||
UINT8 *Temp;
|
UINT8 *Temp;
|
||||||
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
|
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
|
||||||
UINT64 ResStatus;
|
UINT64 ResStatus;
|
||||||
|
|
||||||
Buffer = NULL;
|
Buffer = NULL;
|
||||||
Number = 0;
|
Number = 0;
|
||||||
//
|
//
|
||||||
|
@ -1147,7 +1181,7 @@ GetProposedResources(
|
||||||
//
|
//
|
||||||
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
|
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
|
||||||
List = HostBridgeInstance->Head.ForwardLink;
|
List = HostBridgeInstance->Head.ForwardLink;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Enumerate the root bridges in this host bridge
|
// Enumerate the root bridges in this host bridge
|
||||||
//
|
//
|
||||||
|
@ -1157,24 +1191,27 @@ GetProposedResources(
|
||||||
for (Index = 0; Index < TypeBus; Index ++) {
|
for (Index = 0; Index < TypeBus; Index ++) {
|
||||||
if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
|
if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
|
||||||
Number ++;
|
Number ++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if (Number == 0) {
|
if (Number == 0) {
|
||||||
return EFI_INVALID_PARAMETER;
|
return EFI_INVALID_PARAMETER;
|
||||||
}
|
}
|
||||||
|
|
||||||
Buffer = AllocateZeroPool (Number * sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof(EFI_ACPI_END_TAG_DESCRIPTOR));
|
Buffer = AllocateZeroPool (
|
||||||
|
Number * sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) +
|
||||||
|
sizeof(EFI_ACPI_END_TAG_DESCRIPTOR)
|
||||||
|
);
|
||||||
if (Buffer == NULL) {
|
if (Buffer == NULL) {
|
||||||
return EFI_OUT_OF_RESOURCES;
|
return EFI_OUT_OF_RESOURCES;
|
||||||
}
|
}
|
||||||
|
|
||||||
Temp = Buffer;
|
Temp = Buffer;
|
||||||
for (Index = 0; Index < TypeBus; Index ++) {
|
for (Index = 0; Index < TypeBus; Index ++) {
|
||||||
if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
|
if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
|
||||||
Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;
|
Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;
|
||||||
ResStatus = RootBridgeInstance->ResAllocNode[Index].Status;
|
ResStatus = RootBridgeInstance->ResAllocNode[Index].Status;
|
||||||
|
|
||||||
switch (Index) {
|
switch (Index) {
|
||||||
|
|
||||||
case TypeIo:
|
case TypeIo:
|
||||||
|
@ -1184,29 +1221,31 @@ GetProposedResources(
|
||||||
Ptr->Desc = 0x8A;
|
Ptr->Desc = 0x8A;
|
||||||
Ptr->Len = 0x2B;
|
Ptr->Len = 0x2B;
|
||||||
Ptr->ResType = 1;
|
Ptr->ResType = 1;
|
||||||
Ptr->GenFlag = 0;
|
Ptr->GenFlag = 0;
|
||||||
Ptr->SpecificFlag = 0;
|
Ptr->SpecificFlag = 0;
|
||||||
Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;
|
Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;
|
||||||
Ptr->AddrRangeMax = 0;
|
Ptr->AddrRangeMax = 0;
|
||||||
Ptr->AddrTranslationOffset = \
|
Ptr->AddrTranslationOffset = (ResStatus == ResAllocated) ?
|
||||||
(ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
|
EFI_RESOURCE_SATISFIED :
|
||||||
|
EFI_RESOURCE_LESS;
|
||||||
Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
|
Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TypeMem32:
|
case TypeMem32:
|
||||||
//
|
//
|
||||||
// Memory 32
|
// Memory 32
|
||||||
//
|
//
|
||||||
Ptr->Desc = 0x8A;
|
Ptr->Desc = 0x8A;
|
||||||
Ptr->Len = 0x2B;
|
Ptr->Len = 0x2B;
|
||||||
Ptr->ResType = 0;
|
Ptr->ResType = 0;
|
||||||
Ptr->GenFlag = 0;
|
Ptr->GenFlag = 0;
|
||||||
Ptr->SpecificFlag = 0;
|
Ptr->SpecificFlag = 0;
|
||||||
Ptr->AddrSpaceGranularity = 32;
|
Ptr->AddrSpaceGranularity = 32;
|
||||||
Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;
|
Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;
|
||||||
Ptr->AddrRangeMax = 0;
|
Ptr->AddrRangeMax = 0;
|
||||||
Ptr->AddrTranslationOffset = \
|
Ptr->AddrTranslationOffset = (ResStatus == ResAllocated) ?
|
||||||
(ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
|
EFI_RESOURCE_SATISFIED :
|
||||||
|
EFI_RESOURCE_LESS;
|
||||||
Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
|
Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
@ -1217,12 +1256,12 @@ GetProposedResources(
|
||||||
Ptr->Desc = 0x8A;
|
Ptr->Desc = 0x8A;
|
||||||
Ptr->Len = 0x2B;
|
Ptr->Len = 0x2B;
|
||||||
Ptr->ResType = 0;
|
Ptr->ResType = 0;
|
||||||
Ptr->GenFlag = 0;
|
Ptr->GenFlag = 0;
|
||||||
Ptr->SpecificFlag = 6;
|
Ptr->SpecificFlag = 6;
|
||||||
Ptr->AddrSpaceGranularity = 32;
|
Ptr->AddrSpaceGranularity = 32;
|
||||||
Ptr->AddrRangeMin = 0;
|
Ptr->AddrRangeMin = 0;
|
||||||
Ptr->AddrRangeMax = 0;
|
Ptr->AddrRangeMax = 0;
|
||||||
Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
|
Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
|
||||||
Ptr->AddrLen = 0;
|
Ptr->AddrLen = 0;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
@ -1233,12 +1272,12 @@ GetProposedResources(
|
||||||
Ptr->Desc = 0x8A;
|
Ptr->Desc = 0x8A;
|
||||||
Ptr->Len = 0x2B;
|
Ptr->Len = 0x2B;
|
||||||
Ptr->ResType = 0;
|
Ptr->ResType = 0;
|
||||||
Ptr->GenFlag = 0;
|
Ptr->GenFlag = 0;
|
||||||
Ptr->SpecificFlag = 0;
|
Ptr->SpecificFlag = 0;
|
||||||
Ptr->AddrSpaceGranularity = 64;
|
Ptr->AddrSpaceGranularity = 64;
|
||||||
Ptr->AddrRangeMin = 0;
|
Ptr->AddrRangeMin = 0;
|
||||||
Ptr->AddrRangeMax = 0;
|
Ptr->AddrRangeMax = 0;
|
||||||
Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
|
Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
|
||||||
Ptr->AddrLen = 0;
|
Ptr->AddrLen = 0;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
@ -1249,31 +1288,31 @@ GetProposedResources(
|
||||||
Ptr->Desc = 0x8A;
|
Ptr->Desc = 0x8A;
|
||||||
Ptr->Len = 0x2B;
|
Ptr->Len = 0x2B;
|
||||||
Ptr->ResType = 0;
|
Ptr->ResType = 0;
|
||||||
Ptr->GenFlag = 0;
|
Ptr->GenFlag = 0;
|
||||||
Ptr->SpecificFlag = 6;
|
Ptr->SpecificFlag = 6;
|
||||||
Ptr->AddrSpaceGranularity = 64;
|
Ptr->AddrSpaceGranularity = 64;
|
||||||
Ptr->AddrRangeMin = 0;
|
Ptr->AddrRangeMin = 0;
|
||||||
Ptr->AddrRangeMax = 0;
|
Ptr->AddrRangeMax = 0;
|
||||||
Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
|
Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
|
||||||
Ptr->AddrLen = 0;
|
Ptr->AddrLen = 0;
|
||||||
break;
|
break;
|
||||||
};
|
};
|
||||||
|
|
||||||
Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
|
Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;
|
((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;
|
||||||
((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;
|
((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;
|
||||||
|
|
||||||
*Configuration = Buffer;
|
*Configuration = Buffer;
|
||||||
|
|
||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
}
|
}
|
||||||
|
|
||||||
List = List->ForwardLink;
|
List = List->ForwardLink;
|
||||||
}
|
}
|
||||||
|
|
||||||
return EFI_INVALID_PARAMETER;
|
return EFI_INVALID_PARAMETER;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1322,15 +1361,15 @@ GetProposedResources(
|
||||||
EFI_STATUS
|
EFI_STATUS
|
||||||
EFIAPI
|
EFIAPI
|
||||||
PreprocessController (
|
PreprocessController (
|
||||||
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
|
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
|
||||||
IN EFI_HANDLE RootBridgeHandle,
|
IN EFI_HANDLE RootBridgeHandle,
|
||||||
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
|
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
|
||||||
IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
|
IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
|
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
|
||||||
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
|
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
|
||||||
LIST_ENTRY *List;
|
LIST_ENTRY *List;
|
||||||
|
|
||||||
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
|
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
|
||||||
List = HostBridgeInstance->Head.ForwardLink;
|
List = HostBridgeInstance->Head.ForwardLink;
|
||||||
|
|
Loading…
Reference in New Issue