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UefiCpuPkg/CpuCommonFeaturesLib: Add check for input parameter. 

The ConfigData parameter initialized in *GetConfigData function should not be NULL in
later *Support, *Initilize function, so just add ASSERT code check in these functions.

Cc: Ming Shao <ming.shao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
This commit is contained in:
Eric Dong 2017-09-26 10:43:42 +08:00
parent cbd7300c80
commit 3dcb53258d
2 changed files with 4 additions and 0 deletions
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2
UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c
View File

@ -68,6 +68,7 @@ AesniSupport (
IS_XEON_E7_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
IS_XEON_PHI_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {
MsrFeatureConfig = (MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *) ConfigData;
ASSERT (MsrFeatureConfig != NULL);
MsrFeatureConfig[ProcessorNumber].Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_FEATURE_CONFIG);
return (CpuInfo->CpuIdVersionInfoEcx.Bits.AESNI == 1);
}
@ -112,6 +113,7 @@ AesniInitialize (
//
if (CpuInfo->ProcessorInfo.Location.Thread == 0) {
MsrFeatureConfig = (MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *) ConfigData;
ASSERT (MsrFeatureConfig != NULL);
if ((MsrFeatureConfig[ProcessorNumber].Bits.AESConfiguration & BIT0) == 0) {
CPU_REGISTER_TABLE_WRITE_FIELD (
ProcessorNumber,

2
UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c
View File

@ -120,6 +120,7 @@ ProcTraceSupport (
// Check if ProcTraceMemorySize option is enabled (0xFF means disable by user)
//
ProcTraceData = (PROC_TRACE_DATA *) ConfigData;
ASSERT (ProcTraceData != NULL);
if ((ProcTraceData->ProcTraceMemSize > RtitTopaMemorySize128M) ||
(ProcTraceData->ProcTraceOutputScheme > RtitOutputSchemeToPA)) {
return FALSE;
@ -191,6 +192,7 @@ ProcTraceInitialize (
RTIT_TOPA_TABLE_ENTRY *TopaEntryPtr;
ProcTraceData = (PROC_TRACE_DATA *) ConfigData;
ASSERT (ProcTraceData != NULL);
MemRegionBaseAddr = 0;
FirstIn = FALSE;