mirror of https://github.com/acidanthera/audk.git
OvmfPkg/SmmRelocationLib: Add library instance for OVMF
There are below 2 differences between AMD & OVMF according
existing implementation:
1.The mode of the CPU check is different between the AMD & OVMF.
OVMF:
CpuSaveState->x86.SMMRevId & 0Xffff
AMD:
LMAValue = (UINT32)AsmReadMsr64 (EFER_ADDRESS) & LMA
2.Existing SmBase configuration is different between the
AMD & OVMF.
OVMF:
if ((CpuSaveState->x86.SMMRevId & 0xFFFF) == 0) {
CpuSaveState->x86.SMBASE = mSmBaseForAllCpus[CpuIndex];
} else {
CpuSaveState->x64.SMBASE = mSmBaseForAllCpus[CpuIndex];
}
AMD:
AmdCpuState->x64.SMBASE = mSmBaseForAllCpus[CpuIndex];
This patch provides the SmmRelocationLib library instance
for OVMF to handle the logic difference, and it won't change
the existing implementation code logic.
Cc: Ray Ni <ray.ni@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
This commit is contained in:
Jiaxin Wu
mergify[bot]
parent
47f212295f
commit
3dfd64305b
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@ -110,6 +110,7 @@
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!include MdePkg/MdeLibs.dsc.inc
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!include MdePkg/MdeLibs.dsc.inc
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[LibraryClasses]
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[LibraryClasses]
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SmmRelocationLib|OvmfPkg/Library/SmmRelocationLib/SmmRelocationLib.inf
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PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
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PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
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TimerLib|OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.inf
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TimerLib|OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.inf
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ResetSystemLib|OvmfPkg/Library/ResetSystemLib/BaseResetSystemLib.inf
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ResetSystemLib|OvmfPkg/Library/ResetSystemLib/BaseResetSystemLib.inf
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@ -126,6 +126,7 @@
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!include MdePkg/MdeLibs.dsc.inc
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!include MdePkg/MdeLibs.dsc.inc
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[LibraryClasses]
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[LibraryClasses]
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SmmRelocationLib|OvmfPkg/Library/SmmRelocationLib/SmmRelocationLib.inf
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PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
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PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
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TimerLib|OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.inf
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TimerLib|OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.inf
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ResetSystemLib|OvmfPkg/Library/ResetSystemLib/BaseResetSystemLib.inf
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ResetSystemLib|OvmfPkg/Library/ResetSystemLib/BaseResetSystemLib.inf
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@ -0,0 +1,39 @@
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/** @file
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Semaphore mechanism to indicate to the BSP that an AP has exited SMM
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after SMBASE relocation.
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Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "InternalSmmRelocationLib.h"
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UINTN mSmmRelocationOriginalAddress;
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volatile BOOLEAN *mRebasedFlag;
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/**
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Hook return address of SMM Save State so that semaphore code
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can be executed immediately after AP exits SMM to indicate to
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the BSP that an AP has exited SMM after SMBASE relocation.
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@param[in] RebasedFlag A pointer to a flag that is set to TRUE
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immediately after AP exits SMM.
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**/
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VOID
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SemaphoreHook (
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IN volatile BOOLEAN *RebasedFlag
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)
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{
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SMRAM_SAVE_STATE_MAP *CpuState;
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mRebasedFlag = RebasedFlag;
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CpuState = (SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET);
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mSmmRelocationOriginalAddress = (UINTN)HookReturnFromSmm (
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CpuState,
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(UINT64)(UINTN)&SmmRelocationSemaphoreComplete,
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(UINT64)(UINTN)&SmmRelocationSemaphoreComplete
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);
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}
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@ -0,0 +1,151 @@
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;------------------------------------------------------------------------------ ;
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; Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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; Module Name:
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;
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; SmmInit.nasm
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;
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; Abstract:
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;
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; Functions for relocating SMBASE's for all processors
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;
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;-------------------------------------------------------------------------------
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%include "StuffRsbNasm.inc"
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extern ASM_PFX(SmmInitHandler)
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extern ASM_PFX(mRebasedFlag)
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extern ASM_PFX(mSmmRelocationOriginalAddress)
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global ASM_PFX(gPatchSmmInitCr3)
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global ASM_PFX(gPatchSmmInitCr4)
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global ASM_PFX(gPatchSmmInitCr0)
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global ASM_PFX(gPatchSmmInitStack)
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global ASM_PFX(gcSmmInitGdtr)
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global ASM_PFX(gcSmmInitSize)
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global ASM_PFX(gcSmmInitTemplate)
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%define PROTECT_MODE_CS 0x8
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%define PROTECT_MODE_DS 0x20
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SECTION .data
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NullSeg: DQ 0 ; reserved by architecture
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CodeSeg32:
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DW -1 ; LimitLow
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DW 0 ; BaseLow
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DB 0 ; BaseMid
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DB 0x9b
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DB 0xcf ; LimitHigh
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DB 0 ; BaseHigh
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ProtModeCodeSeg32:
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DW -1 ; LimitLow
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DW 0 ; BaseLow
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DB 0 ; BaseMid
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DB 0x9b
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DB 0xcf ; LimitHigh
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DB 0 ; BaseHigh
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ProtModeSsSeg32:
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DW -1 ; LimitLow
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DW 0 ; BaseLow
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DB 0 ; BaseMid
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DB 0x93
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DB 0xcf ; LimitHigh
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DB 0 ; BaseHigh
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DataSeg32:
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DW -1 ; LimitLow
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DW 0 ; BaseLow
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DB 0 ; BaseMid
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DB 0x93
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DB 0xcf ; LimitHigh
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DB 0 ; BaseHigh
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CodeSeg16:
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DW -1
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DW 0
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DB 0
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DB 0x9b
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DB 0x8f
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DB 0
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DataSeg16:
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DW -1
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DW 0
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DB 0
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DB 0x93
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DB 0x8f
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DB 0
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CodeSeg64:
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DW -1 ; LimitLow
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DW 0 ; BaseLow
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DB 0 ; BaseMid
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DB 0x9b
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DB 0xaf ; LimitHigh
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DB 0 ; BaseHigh
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GDT_SIZE equ $ - NullSeg
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ASM_PFX(gcSmmInitGdtr):
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DW GDT_SIZE - 1
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DD NullSeg
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SECTION .text
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global ASM_PFX(SmmStartup)
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BITS 16
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ASM_PFX(SmmStartup):
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mov eax, 0x80000001 ; read capability
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cpuid
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mov ebx, edx ; rdmsr will change edx. keep it in ebx.
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and ebx, BIT20 ; extract NX capability bit
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shr ebx, 9 ; shift bit to IA32_EFER.NXE[BIT11] position
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mov eax, strict dword 0 ; source operand will be patched
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ASM_PFX(gPatchSmmInitCr3):
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mov cr3, eax
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o32 lgdt [cs:ebp + (ASM_PFX(gcSmmInitGdtr) - ASM_PFX(SmmStartup))]
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mov eax, strict dword 0 ; source operand will be patched
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ASM_PFX(gPatchSmmInitCr4):
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mov cr4, eax
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mov ecx, 0xc0000080 ; IA32_EFER MSR
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rdmsr
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or eax, ebx ; set NXE bit if NX is available
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wrmsr
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mov eax, strict dword 0 ; source operand will be patched
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ASM_PFX(gPatchSmmInitCr0):
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mov di, PROTECT_MODE_DS
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mov cr0, eax
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jmp PROTECT_MODE_CS : dword @32bit
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BITS 32
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@32bit:
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mov ds, edi
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mov es, edi
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mov fs, edi
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mov gs, edi
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mov ss, edi
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mov esp, strict dword 0 ; source operand will be patched
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ASM_PFX(gPatchSmmInitStack):
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call ASM_PFX(SmmInitHandler)
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StuffRsb32
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rsm
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BITS 16
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ASM_PFX(gcSmmInitTemplate):
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mov ebp, ASM_PFX(SmmStartup)
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sub ebp, 0x30000
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jmp ebp
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ASM_PFX(gcSmmInitSize): DW $ - ASM_PFX(gcSmmInitTemplate)
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BITS 32
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global ASM_PFX(SmmRelocationSemaphoreComplete)
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ASM_PFX(SmmRelocationSemaphoreComplete):
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push eax
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mov eax, [ASM_PFX(mRebasedFlag)]
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mov byte [eax], 1
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pop eax
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jmp [ASM_PFX(mSmmRelocationOriginalAddress)]
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global ASM_PFX(SmmInitFixupAddress)
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ASM_PFX(SmmInitFixupAddress):
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ret
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@ -0,0 +1,127 @@
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/** @file
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SMM Relocation Lib for each processor.
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This Lib produces the SMM_BASE_HOB in HOB database which tells
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the PiSmmCpuDxeSmm driver (runs at a later phase) about the new
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SMBASE for each processor. PiSmmCpuDxeSmm driver installs the
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SMI handler at the SMM_BASE_HOB.SmBase[Index]+0x8000 for processor
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Index.
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Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef INTERNAL_SMM_RELOCATION_LIB_H_
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#define INTERNAL_SMM_RELOCATION_LIB_H_
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#include <Library/BaseLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/CpuExceptionHandlerLib.h>
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#include <Library/DebugLib.h>
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#include <Library/HobLib.h>
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#include <Library/LocalApicLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/PcdLib.h>
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#include <Library/PeimEntryPoint.h>
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#include <Library/PeiServicesLib.h>
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#include <Library/SmmRelocationLib.h>
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#include <Guid/SmramMemoryReserve.h>
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#include <Guid/SmmBaseHob.h>
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#include <Register/Intel/Cpuid.h>
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#include <Register/Intel/SmramSaveStateMap.h>
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#include <Protocol/MmCpu.h>
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extern IA32_DESCRIPTOR gcSmmInitGdtr;
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extern CONST UINT16 gcSmmInitSize;
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extern CONST UINT8 gcSmmInitTemplate[];
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X86_ASSEMBLY_PATCH_LABEL gPatchSmmInitCr0;
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X86_ASSEMBLY_PATCH_LABEL gPatchSmmInitCr3;
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X86_ASSEMBLY_PATCH_LABEL gPatchSmmInitCr4;
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X86_ASSEMBLY_PATCH_LABEL gPatchSmmInitStack;
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//
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// The size 0x20 must be bigger than
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// the size of template code of SmmInit. Currently,
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// the size of SmmInit requires the 0x16 Bytes buffer
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// at least.
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//
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#define BACK_BUF_SIZE 0x20
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#define CR4_CET_ENABLE BIT23
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//
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// EFER register LMA bit
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//
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#define LMA BIT10
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/**
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This function configures the SmBase on the currently executing CPU.
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@param[in] SmBase The SmBase on the currently executing CPU.
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**/
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VOID
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EFIAPI
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ConfigureSmBase (
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IN UINT64 SmBase
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);
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/**
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Semaphore operation for all processor relocate SMMBase.
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**/
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VOID
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EFIAPI
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SmmRelocationSemaphoreComplete (
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VOID
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);
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/**
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Hook the code executed immediately after an RSM instruction on the currently
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executing CPU. The mode of code executed immediately after RSM must be
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detected, and the appropriate hook must be selected. Always clear the auto
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HALT restart flag if it is set.
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@param[in,out] CpuState Pointer to SMRAM Save State Map for the
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currently executing CPU.
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@param[in] NewInstructionPointer32 Instruction pointer to use if resuming to
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32-bit mode from 64-bit SMM.
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@param[in] NewInstructionPointer Instruction pointer to use if resuming to
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same mode as SMM.
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@retval The value of the original instruction pointer before it was hooked.
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**/
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UINT64
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EFIAPI
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HookReturnFromSmm (
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IN OUT SMRAM_SAVE_STATE_MAP *CpuState,
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IN UINT64 NewInstructionPointer32,
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IN UINT64 NewInstructionPointer
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);
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/**
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Hook return address of SMM Save State so that semaphore code
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can be executed immediately after AP exits SMM to indicate to
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the BSP that an AP has exited SMM after SMBASE relocation.
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@param[in] RebasedFlag A pointer to a flag that is set to TRUE
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immediately after AP exits SMM.
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**/
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VOID
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SemaphoreHook (
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IN volatile BOOLEAN *RebasedFlag
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);
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/**
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This function fixes up the address of the global variable or function
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referred in SmmInit assembly files to be the absolute address.
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**/
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VOID
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EFIAPI
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SmmInitFixupAddress (
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);
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#endif
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@ -0,0 +1,549 @@
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/** @file
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SMM Relocation Lib for each processor.
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|
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This Lib produces the SMM_BASE_HOB in HOB database which tells
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the PiSmmCpuDxeSmm driver (runs at a later phase) about the new
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SMBASE for each processor. PiSmmCpuDxeSmm driver installs the
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SMI handler at the SMM_BASE_HOB.SmBase[Index]+0x8000 for processor
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Index.
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Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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|
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**/
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#include "InternalSmmRelocationLib.h"
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UINTN mMaxNumberOfCpus = 1;
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UINTN mNumberOfCpus = 1;
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//
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// IDT used during SMM Init
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//
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IA32_DESCRIPTOR gcSmmInitIdtr;
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||||||
|
|
||||||
|
//
|
||||||
|
// Smbase for current CPU
|
||||||
|
//
|
||||||
|
UINT64 mSmBase;
|
||||||
|
|
||||||
|
//
|
||||||
|
// SmBase Rebased flag for current CPU
|
||||||
|
//
|
||||||
|
volatile BOOLEAN mRebased;
|
||||||
|
|
||||||
|
/**
|
||||||
|
This function will get the SmBase for CpuIndex.
|
||||||
|
|
||||||
|
@param[in] CpuIndex The processor index.
|
||||||
|
@param[in] SmmRelocationStart The start address of Smm relocated memory in SMRAM.
|
||||||
|
@param[in] TileSize The total size required for a CPU save state, any
|
||||||
|
additional CPU-specific context and the size of code
|
||||||
|
for the SMI entry point.
|
||||||
|
|
||||||
|
@retval The value of SmBase for CpuIndex.
|
||||||
|
|
||||||
|
**/
|
||||||
|
UINTN
|
||||||
|
GetSmBase (
|
||||||
|
IN UINTN CpuIndex,
|
||||||
|
IN EFI_PHYSICAL_ADDRESS SmmRelocationStart,
|
||||||
|
IN UINTN TileSize
|
||||||
|
)
|
||||||
|
{
|
||||||
|
return (UINTN)(SmmRelocationStart) + CpuIndex * TileSize - SMM_HANDLER_OFFSET;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
This function will create SmBase for all CPUs.
|
||||||
|
|
||||||
|
@param[in] SmmRelocationStart The start address of Smm relocated memory in SMRAM.
|
||||||
|
@param[in] TileSize The total size required for a CPU save state, any
|
||||||
|
additional CPU-specific context and the size of code
|
||||||
|
for the SMI entry point.
|
||||||
|
|
||||||
|
@retval EFI_SUCCESS Create SmBase for all CPUs successfully.
|
||||||
|
@retval Others Failed to create SmBase for all CPUs.
|
||||||
|
|
||||||
|
**/
|
||||||
|
EFI_STATUS
|
||||||
|
CreateSmmBaseHob (
|
||||||
|
IN EFI_PHYSICAL_ADDRESS SmmRelocationStart,
|
||||||
|
IN UINTN TileSize
|
||||||
|
)
|
||||||
|
{
|
||||||
|
UINTN Index;
|
||||||
|
SMM_BASE_HOB_DATA *SmmBaseHobData;
|
||||||
|
UINT32 CpuCount;
|
||||||
|
UINT32 NumberOfProcessorsInHob;
|
||||||
|
UINT32 MaxCapOfProcessorsInHob;
|
||||||
|
UINT32 HobCount;
|
||||||
|
|
||||||
|
SmmBaseHobData = NULL;
|
||||||
|
CpuCount = 0;
|
||||||
|
NumberOfProcessorsInHob = 0;
|
||||||
|
MaxCapOfProcessorsInHob = 0;
|
||||||
|
HobCount = 0;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Count the HOB instance maximum capacity of CPU (MaxCapOfProcessorsInHob) since the max HobLength is 0xFFF8.
|
||||||
|
//
|
||||||
|
MaxCapOfProcessorsInHob = (0xFFF8 - sizeof (EFI_HOB_GUID_TYPE) - sizeof (SMM_BASE_HOB_DATA)) / sizeof (UINT64) + 1;
|
||||||
|
DEBUG ((DEBUG_INFO, "CreateSmmBaseHob - MaxCapOfProcessorsInHob: %d\n", MaxCapOfProcessorsInHob));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Create Guided SMM Base HOB Instances.
|
||||||
|
//
|
||||||
|
while (CpuCount != mMaxNumberOfCpus) {
|
||||||
|
NumberOfProcessorsInHob = MIN ((UINT32)mMaxNumberOfCpus - CpuCount, MaxCapOfProcessorsInHob);
|
||||||
|
|
||||||
|
SmmBaseHobData = BuildGuidHob (
|
||||||
|
&gSmmBaseHobGuid,
|
||||||
|
sizeof (SMM_BASE_HOB_DATA) + sizeof (UINT64) * NumberOfProcessorsInHob
|
||||||
|
);
|
||||||
|
if (SmmBaseHobData == NULL) {
|
||||||
|
return EFI_OUT_OF_RESOURCES;
|
||||||
|
}
|
||||||
|
|
||||||
|
SmmBaseHobData->ProcessorIndex = CpuCount;
|
||||||
|
SmmBaseHobData->NumberOfProcessors = NumberOfProcessorsInHob;
|
||||||
|
|
||||||
|
DEBUG ((DEBUG_INFO, "CreateSmmBaseHob - SmmBaseHobData[%d]->ProcessorIndex: %d\n", HobCount, SmmBaseHobData->ProcessorIndex));
|
||||||
|
DEBUG ((DEBUG_INFO, "CreateSmmBaseHob - SmmBaseHobData[%d]->NumberOfProcessors: %d\n", HobCount, SmmBaseHobData->NumberOfProcessors));
|
||||||
|
for (Index = 0; Index < SmmBaseHobData->NumberOfProcessors; Index++) {
|
||||||
|
//
|
||||||
|
// Calculate the new SMBASE address
|
||||||
|
//
|
||||||
|
SmmBaseHobData->SmBase[Index] = GetSmBase (Index + CpuCount, SmmRelocationStart, TileSize);
|
||||||
|
DEBUG ((DEBUG_INFO, "CreateSmmBaseHob - SmmBaseHobData[%d]->SmBase[%d]: 0x%08x\n", HobCount, Index, SmmBaseHobData->SmBase[Index]));
|
||||||
|
}
|
||||||
|
|
||||||
|
CpuCount += NumberOfProcessorsInHob;
|
||||||
|
HobCount++;
|
||||||
|
SmmBaseHobData = NULL;
|
||||||
|
}
|
||||||
|
|
||||||
|
return EFI_SUCCESS;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
C function for SMI handler. To change all processor's SMMBase Register.
|
||||||
|
|
||||||
|
**/
|
||||||
|
VOID
|
||||||
|
EFIAPI
|
||||||
|
SmmInitHandler (
|
||||||
|
VOID
|
||||||
|
)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Update SMM IDT entries' code segment and load IDT
|
||||||
|
//
|
||||||
|
AsmWriteIdtr (&gcSmmInitIdtr);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Configure SmBase.
|
||||||
|
//
|
||||||
|
ConfigureSmBase (mSmBase);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Hook return after RSM to set SMM re-based flag
|
||||||
|
// SMM re-based flag can't be set before RSM, because SMM save state context might be override
|
||||||
|
// by next AP flow before it take effect.
|
||||||
|
//
|
||||||
|
SemaphoreHook (&mRebased);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
Relocate SmmBases for each processor.
|
||||||
|
Execute on first boot and all S3 resumes
|
||||||
|
|
||||||
|
@param[in] MpServices2 Pointer to this instance of the MpServices.
|
||||||
|
@param[in] SmmRelocationStart The start address of Smm relocated memory in SMRAM.
|
||||||
|
@param[in] TileSize The total size required for a CPU save state, any
|
||||||
|
additional CPU-specific context and the size of code
|
||||||
|
for the SMI entry point.
|
||||||
|
|
||||||
|
**/
|
||||||
|
VOID
|
||||||
|
SmmRelocateBases (
|
||||||
|
IN EDKII_PEI_MP_SERVICES2_PPI *MpServices2,
|
||||||
|
IN EFI_PHYSICAL_ADDRESS SmmRelocationStart,
|
||||||
|
IN UINTN TileSize
|
||||||
|
)
|
||||||
|
{
|
||||||
|
EFI_STATUS Status;
|
||||||
|
UINT8 BakBuf[BACK_BUF_SIZE];
|
||||||
|
SMRAM_SAVE_STATE_MAP BakBuf2;
|
||||||
|
SMRAM_SAVE_STATE_MAP *CpuStatePtr;
|
||||||
|
UINT8 *U8Ptr;
|
||||||
|
UINTN Index;
|
||||||
|
UINTN BspIndex;
|
||||||
|
UINT32 BspApicId;
|
||||||
|
EFI_PROCESSOR_INFORMATION ProcessorInfo;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Make sure the reserved size is large enough for procedure SmmInitTemplate.
|
||||||
|
//
|
||||||
|
ASSERT (sizeof (BakBuf) >= gcSmmInitSize);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Patch ASM code template with current CR0, CR3, and CR4 values
|
||||||
|
//
|
||||||
|
PatchInstructionX86 (gPatchSmmInitCr0, AsmReadCr0 (), 4);
|
||||||
|
PatchInstructionX86 (gPatchSmmInitCr3, AsmReadCr3 (), 4);
|
||||||
|
PatchInstructionX86 (gPatchSmmInitCr4, AsmReadCr4 () & (~CR4_CET_ENABLE), 4);
|
||||||
|
|
||||||
|
U8Ptr = (UINT8 *)(UINTN)(SMM_DEFAULT_SMBASE + SMM_HANDLER_OFFSET);
|
||||||
|
CpuStatePtr = (SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Backup original contents at address 0x38000
|
||||||
|
//
|
||||||
|
CopyMem (BakBuf, U8Ptr, sizeof (BakBuf));
|
||||||
|
CopyMem (&BakBuf2, CpuStatePtr, sizeof (BakBuf2));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Load image for relocation
|
||||||
|
//
|
||||||
|
CopyMem (U8Ptr, gcSmmInitTemplate, gcSmmInitSize);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Retrieve the local APIC ID of current processor
|
||||||
|
//
|
||||||
|
BspApicId = GetApicId ();
|
||||||
|
|
||||||
|
//
|
||||||
|
// Relocate SM bases for all APs
|
||||||
|
// This is APs' 1st SMI - rebase will be done here, and APs' default SMI handler will be overridden by gcSmmInitTemplate
|
||||||
|
//
|
||||||
|
BspIndex = (UINTN)-1;
|
||||||
|
for (Index = 0; Index < mNumberOfCpus; Index++) {
|
||||||
|
Status = MpServices2->GetProcessorInfo (MpServices2, Index | CPU_V2_EXTENDED_TOPOLOGY, &ProcessorInfo);
|
||||||
|
ASSERT_EFI_ERROR (Status);
|
||||||
|
|
||||||
|
if (BspApicId != (UINT32)ProcessorInfo.ProcessorId) {
|
||||||
|
mRebased = FALSE;
|
||||||
|
mSmBase = GetSmBase (Index, SmmRelocationStart, TileSize);
|
||||||
|
SendSmiIpi ((UINT32)ProcessorInfo.ProcessorId);
|
||||||
|
//
|
||||||
|
// Wait for this AP to finish its 1st SMI
|
||||||
|
//
|
||||||
|
while (!mRebased) {
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
//
|
||||||
|
// BSP will be Relocated later
|
||||||
|
//
|
||||||
|
BspIndex = Index;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Relocate BSP's SMM base
|
||||||
|
//
|
||||||
|
ASSERT (BspIndex != (UINTN)-1);
|
||||||
|
mRebased = FALSE;
|
||||||
|
mSmBase = GetSmBase (BspIndex, SmmRelocationStart, TileSize);
|
||||||
|
SendSmiIpi (BspApicId);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Wait for the BSP to finish its 1st SMI
|
||||||
|
//
|
||||||
|
while (!mRebased) {
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Restore contents at address 0x38000
|
||||||
|
//
|
||||||
|
CopyMem (CpuStatePtr, &BakBuf2, sizeof (BakBuf2));
|
||||||
|
CopyMem (U8Ptr, BakBuf, sizeof (BakBuf));
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
Initialize IDT to setup exception handlers in SMM.
|
||||||
|
|
||||||
|
**/
|
||||||
|
VOID
|
||||||
|
InitSmmIdt (
|
||||||
|
VOID
|
||||||
|
)
|
||||||
|
{
|
||||||
|
EFI_STATUS Status;
|
||||||
|
BOOLEAN InterruptState;
|
||||||
|
IA32_DESCRIPTOR PeiIdtr;
|
||||||
|
CONST EFI_PEI_SERVICES **PeiServices;
|
||||||
|
|
||||||
|
//
|
||||||
|
// There are 32 (not 255) entries in it since only processor
|
||||||
|
// generated exceptions will be handled.
|
||||||
|
//
|
||||||
|
gcSmmInitIdtr.Limit = (sizeof (IA32_IDT_GATE_DESCRIPTOR) * 32) - 1;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Allocate for IDT.
|
||||||
|
// sizeof (UINTN) is for the PEI Services Table pointer.
|
||||||
|
//
|
||||||
|
gcSmmInitIdtr.Base = (UINTN)AllocateZeroPool (gcSmmInitIdtr.Limit + 1 + sizeof (UINTN));
|
||||||
|
ASSERT (gcSmmInitIdtr.Base != 0);
|
||||||
|
gcSmmInitIdtr.Base += sizeof (UINTN);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Disable Interrupt, save InterruptState and save PEI IDT table
|
||||||
|
//
|
||||||
|
InterruptState = SaveAndDisableInterrupts ();
|
||||||
|
AsmReadIdtr (&PeiIdtr);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Save the PEI Services Table pointer
|
||||||
|
// The PEI Services Table pointer will be stored in the sizeof (UINTN) bytes
|
||||||
|
// immediately preceding the IDT in memory.
|
||||||
|
//
|
||||||
|
PeiServices = (CONST EFI_PEI_SERVICES **)(*(UINTN *)(PeiIdtr.Base - sizeof (UINTN)));
|
||||||
|
(*(UINTN *)(gcSmmInitIdtr.Base - sizeof (UINTN))) = (UINTN)PeiServices;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Load SMM temporary IDT table
|
||||||
|
//
|
||||||
|
AsmWriteIdtr (&gcSmmInitIdtr);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Setup SMM default exception handlers, SMM IDT table
|
||||||
|
// will be updated and saved in gcSmmInitIdtr
|
||||||
|
//
|
||||||
|
Status = InitializeCpuExceptionHandlers (NULL);
|
||||||
|
ASSERT_EFI_ERROR (Status);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Restore PEI IDT table and CPU InterruptState
|
||||||
|
//
|
||||||
|
AsmWriteIdtr ((IA32_DESCRIPTOR *)&PeiIdtr);
|
||||||
|
SetInterruptState (InterruptState);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
This routine will split SmramReserve HOB to reserve SmmRelocationSize for Smm relocated memory.
|
||||||
|
|
||||||
|
@param[in] SmmRelocationSize SmmRelocationSize for all processors.
|
||||||
|
@param[in,out] SmmRelocationStart Return the start address of Smm relocated memory in SMRAM.
|
||||||
|
|
||||||
|
@retval EFI_SUCCESS The gEfiSmmSmramMemoryGuid is split successfully.
|
||||||
|
@retval EFI_DEVICE_ERROR Failed to build new HOB for gEfiSmmSmramMemoryGuid.
|
||||||
|
@retval EFI_NOT_FOUND The gEfiSmmSmramMemoryGuid is not found.
|
||||||
|
|
||||||
|
**/
|
||||||
|
EFI_STATUS
|
||||||
|
SplitSmramHobForSmmRelocation (
|
||||||
|
IN UINT64 SmmRelocationSize,
|
||||||
|
IN OUT EFI_PHYSICAL_ADDRESS *SmmRelocationStart
|
||||||
|
)
|
||||||
|
{
|
||||||
|
EFI_HOB_GUID_TYPE *GuidHob;
|
||||||
|
EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *Block;
|
||||||
|
EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *NewBlock;
|
||||||
|
UINTN NewBlockSize;
|
||||||
|
|
||||||
|
ASSERT (SmmRelocationStart != NULL);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Retrieve the GUID HOB data that contains the set of SMRAM descriptors
|
||||||
|
//
|
||||||
|
GuidHob = GetFirstGuidHob (&gEfiSmmSmramMemoryGuid);
|
||||||
|
if (GuidHob == NULL) {
|
||||||
|
return EFI_NOT_FOUND;
|
||||||
|
}
|
||||||
|
|
||||||
|
Block = (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *)GET_GUID_HOB_DATA (GuidHob);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Allocate one extra EFI_SMRAM_DESCRIPTOR to describe smram carved out for all SMBASE
|
||||||
|
//
|
||||||
|
NewBlockSize = sizeof (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK) + (Block->NumberOfSmmReservedRegions * sizeof (EFI_SMRAM_DESCRIPTOR));
|
||||||
|
|
||||||
|
NewBlock = (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *)BuildGuidHob (
|
||||||
|
&gEfiSmmSmramMemoryGuid,
|
||||||
|
NewBlockSize
|
||||||
|
);
|
||||||
|
ASSERT (NewBlock != NULL);
|
||||||
|
if (NewBlock == NULL) {
|
||||||
|
return EFI_DEVICE_ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Copy old EFI_SMRAM_HOB_DESCRIPTOR_BLOCK to new allocated region
|
||||||
|
//
|
||||||
|
CopyMem ((VOID *)NewBlock, Block, NewBlockSize - sizeof (EFI_SMRAM_DESCRIPTOR));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Increase the number of SMRAM descriptors by 1 to make room for the ALLOCATED descriptor of size EFI_PAGE_SIZE
|
||||||
|
//
|
||||||
|
NewBlock->NumberOfSmmReservedRegions = (UINT32)(Block->NumberOfSmmReservedRegions + 1);
|
||||||
|
|
||||||
|
ASSERT (Block->NumberOfSmmReservedRegions >= 1);
|
||||||
|
//
|
||||||
|
// Copy last entry to the end - we assume TSEG is last entry.
|
||||||
|
//
|
||||||
|
CopyMem (&NewBlock->Descriptor[Block->NumberOfSmmReservedRegions], &NewBlock->Descriptor[Block->NumberOfSmmReservedRegions - 1], sizeof (EFI_SMRAM_DESCRIPTOR));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Update the entry in the array with a size of SmmRelocationSize and put into the ALLOCATED state
|
||||||
|
//
|
||||||
|
NewBlock->Descriptor[Block->NumberOfSmmReservedRegions - 1].PhysicalSize = SmmRelocationSize;
|
||||||
|
NewBlock->Descriptor[Block->NumberOfSmmReservedRegions - 1].RegionState |= EFI_ALLOCATED;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Return the start address of Smm relocated memory in SMRAM.
|
||||||
|
//
|
||||||
|
*SmmRelocationStart = NewBlock->Descriptor[Block->NumberOfSmmReservedRegions - 1].CpuStart;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Reduce the size of the last SMRAM descriptor by SmmRelocationSize
|
||||||
|
//
|
||||||
|
NewBlock->Descriptor[Block->NumberOfSmmReservedRegions].PhysicalStart += SmmRelocationSize;
|
||||||
|
NewBlock->Descriptor[Block->NumberOfSmmReservedRegions].CpuStart += SmmRelocationSize;
|
||||||
|
NewBlock->Descriptor[Block->NumberOfSmmReservedRegions].PhysicalSize -= SmmRelocationSize;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Last step, we can scrub old one
|
||||||
|
//
|
||||||
|
ZeroMem (&GuidHob->Name, sizeof (GuidHob->Name));
|
||||||
|
|
||||||
|
return EFI_SUCCESS;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
CPU SmmBase Relocation Init.
|
||||||
|
|
||||||
|
This function is to relocate CPU SmmBase.
|
||||||
|
|
||||||
|
@param[in] MpServices2 Pointer to this instance of the MpServices.
|
||||||
|
|
||||||
|
@retval EFI_SUCCESS CPU SmmBase Relocated successfully.
|
||||||
|
@retval Others CPU SmmBase Relocation failed.
|
||||||
|
|
||||||
|
**/
|
||||||
|
EFI_STATUS
|
||||||
|
EFIAPI
|
||||||
|
SmmRelocationInit (
|
||||||
|
IN EDKII_PEI_MP_SERVICES2_PPI *MpServices2
|
||||||
|
)
|
||||||
|
{
|
||||||
|
EFI_STATUS Status;
|
||||||
|
UINTN NumberOfEnabledCpus;
|
||||||
|
UINTN TileSize;
|
||||||
|
UINT64 SmmRelocationSize;
|
||||||
|
EFI_PHYSICAL_ADDRESS SmmRelocationStart;
|
||||||
|
UINTN SmmStackSize;
|
||||||
|
UINT8 *SmmStacks;
|
||||||
|
|
||||||
|
SmmRelocationStart = 0;
|
||||||
|
SmmStacks = NULL;
|
||||||
|
|
||||||
|
DEBUG ((DEBUG_INFO, "SmmRelocationInit Start \n"));
|
||||||
|
if (MpServices2 == NULL) {
|
||||||
|
return EFI_INVALID_PARAMETER;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Get the number of processors
|
||||||
|
//
|
||||||
|
Status = MpServices2->GetNumberOfProcessors (
|
||||||
|
MpServices2,
|
||||||
|
&mNumberOfCpus,
|
||||||
|
&NumberOfEnabledCpus
|
||||||
|
);
|
||||||
|
if (EFI_ERROR (Status)) {
|
||||||
|
goto ON_EXIT;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (FeaturePcdGet (PcdCpuHotPlugSupport)) {
|
||||||
|
mMaxNumberOfCpus = PcdGet32 (PcdCpuMaxLogicalProcessorNumber);
|
||||||
|
} else {
|
||||||
|
mMaxNumberOfCpus = mNumberOfCpus;
|
||||||
|
}
|
||||||
|
|
||||||
|
ASSERT (mNumberOfCpus <= mMaxNumberOfCpus);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Calculate SmmRelocationSize for all of the tiles.
|
||||||
|
//
|
||||||
|
// The CPU save state and code for the SMI entry point are tiled within an SMRAM
|
||||||
|
// allocated buffer. The minimum size of this buffer for a uniprocessor system
|
||||||
|
// is 32 KB, because the entry point is SMBASE + 32KB, and CPU save state area
|
||||||
|
// just below SMBASE + 64KB. If more than one CPU is present in the platform,
|
||||||
|
// then the SMI entry point and the CPU save state areas can be tiles to minimize
|
||||||
|
// the total amount SMRAM required for all the CPUs. The tile size can be computed
|
||||||
|
// by adding the CPU save state size, any extra CPU specific context, and
|
||||||
|
// the size of code that must be placed at the SMI entry point to transfer
|
||||||
|
// control to a C function in the native SMM execution mode. This size is
|
||||||
|
// rounded up to the nearest power of 2 to give the tile size for a each CPU.
|
||||||
|
// The total amount of memory required is the maximum number of CPUs that
|
||||||
|
// platform supports times the tile size.
|
||||||
|
//
|
||||||
|
TileSize = SIZE_8KB;
|
||||||
|
SmmRelocationSize = EFI_PAGES_TO_SIZE (EFI_SIZE_TO_PAGES (SIZE_32KB + TileSize * (mMaxNumberOfCpus - 1)));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Split SmramReserve HOB to reserve SmmRelocationSize for Smm relocated memory
|
||||||
|
//
|
||||||
|
Status = SplitSmramHobForSmmRelocation (
|
||||||
|
SmmRelocationSize,
|
||||||
|
&SmmRelocationStart
|
||||||
|
);
|
||||||
|
if (EFI_ERROR (Status)) {
|
||||||
|
goto ON_EXIT;
|
||||||
|
}
|
||||||
|
|
||||||
|
ASSERT (SmmRelocationStart != 0);
|
||||||
|
DEBUG ((DEBUG_INFO, "SmmRelocationInit - SmmRelocationSize: 0x%08x\n", SmmRelocationSize));
|
||||||
|
DEBUG ((DEBUG_INFO, "SmmRelocationInit - SmmRelocationStart: 0x%08x\n", SmmRelocationStart));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Fix up the address of the global variable or function referred in
|
||||||
|
// SmmInit assembly files to be the absolute address
|
||||||
|
//
|
||||||
|
SmmInitFixupAddress ();
|
||||||
|
|
||||||
|
//
|
||||||
|
// Patch SMI stack for SMM base relocation
|
||||||
|
// Note: No need allocate stack for all CPUs since the relocation
|
||||||
|
// occurs serially for each CPU
|
||||||
|
//
|
||||||
|
SmmStackSize = EFI_PAGE_SIZE;
|
||||||
|
SmmStacks = (UINT8 *)AllocatePages (EFI_SIZE_TO_PAGES (SmmStackSize));
|
||||||
|
if (SmmStacks == NULL) {
|
||||||
|
Status = EFI_OUT_OF_RESOURCES;
|
||||||
|
goto ON_EXIT;
|
||||||
|
}
|
||||||
|
|
||||||
|
DEBUG ((DEBUG_INFO, "SmmRelocationInit - SmmStackSize: 0x%08x\n", SmmStackSize));
|
||||||
|
DEBUG ((DEBUG_INFO, "SmmRelocationInit - SmmStacks: 0x%08x\n", SmmStacks));
|
||||||
|
|
||||||
|
PatchInstructionX86 (
|
||||||
|
gPatchSmmInitStack,
|
||||||
|
(UINTN)(SmmStacks + SmmStackSize - sizeof (UINTN)),
|
||||||
|
sizeof (UINTN)
|
||||||
|
);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Initialize the SMM IDT for SMM base relocation
|
||||||
|
//
|
||||||
|
InitSmmIdt ();
|
||||||
|
|
||||||
|
//
|
||||||
|
// Relocate SmmBases for each processor.
|
||||||
|
//
|
||||||
|
SmmRelocateBases (MpServices2, SmmRelocationStart, TileSize);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Create the SmBase HOB for all CPUs
|
||||||
|
//
|
||||||
|
Status = CreateSmmBaseHob (SmmRelocationStart, TileSize);
|
||||||
|
|
||||||
|
ON_EXIT:
|
||||||
|
if (SmmStacks != NULL) {
|
||||||
|
FreePages (SmmStacks, EFI_SIZE_TO_PAGES (SmmStackSize));
|
||||||
|
}
|
||||||
|
|
||||||
|
DEBUG ((DEBUG_INFO, "SmmRelocationInit Done\n"));
|
||||||
|
return Status;
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,60 @@
|
||||||
|
## @file
|
||||||
|
# SMM Relocation Lib for each processor.
|
||||||
|
#
|
||||||
|
# This Lib produces the SMM_BASE_HOB in HOB database which tells
|
||||||
|
# the PiSmmCpuDxeSmm driver (runs at a later phase) about the new
|
||||||
|
# SMBASE for each processor. PiSmmCpuDxeSmm driver installs the
|
||||||
|
# SMI handler at the SMM_BASE_HOB.SmBase[Index]+0x8000 for processor
|
||||||
|
# Index.
|
||||||
|
#
|
||||||
|
# Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
|
||||||
|
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||||
|
#
|
||||||
|
##
|
||||||
|
|
||||||
|
[Defines]
|
||||||
|
INF_VERSION = 0x00010005
|
||||||
|
BASE_NAME = SmmRelocationLib
|
||||||
|
FILE_GUID = 51834F51-CCE0-4743-B553-935D0C8A53FF
|
||||||
|
MODULE_TYPE = PEIM
|
||||||
|
VERSION_STRING = 1.0
|
||||||
|
LIBRARY_CLASS = SmmRelocationLib
|
||||||
|
|
||||||
|
[Sources]
|
||||||
|
InternalSmmRelocationLib.h
|
||||||
|
SmramSaveStateConfig.c
|
||||||
|
SmmRelocationLib.c
|
||||||
|
|
||||||
|
[Sources.Ia32]
|
||||||
|
Ia32/Semaphore.c
|
||||||
|
Ia32/SmmInit.nasm
|
||||||
|
|
||||||
|
[Sources.X64]
|
||||||
|
X64/Semaphore.c
|
||||||
|
X64/SmmInit.nasm
|
||||||
|
|
||||||
|
[Packages]
|
||||||
|
MdePkg/MdePkg.dec
|
||||||
|
MdeModulePkg/MdeModulePkg.dec
|
||||||
|
UefiCpuPkg/UefiCpuPkg.dec
|
||||||
|
|
||||||
|
[LibraryClasses]
|
||||||
|
BaseLib
|
||||||
|
BaseMemoryLib
|
||||||
|
CpuExceptionHandlerLib
|
||||||
|
DebugLib
|
||||||
|
HobLib
|
||||||
|
LocalApicLib
|
||||||
|
MemoryAllocationLib
|
||||||
|
PcdLib
|
||||||
|
PeiServicesLib
|
||||||
|
|
||||||
|
[Guids]
|
||||||
|
gSmmBaseHobGuid ## HOB ALWAYS_PRODUCED
|
||||||
|
gEfiSmmSmramMemoryGuid ## CONSUMES
|
||||||
|
|
||||||
|
[Pcd]
|
||||||
|
gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber
|
||||||
|
|
||||||
|
[FeaturePcd]
|
||||||
|
gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugSupport ## CONSUMES
|
||||||
|
|
@ -0,0 +1,100 @@
|
||||||
|
/** @file
|
||||||
|
Config SMRAM Save State for SmmBases Relocation.
|
||||||
|
|
||||||
|
Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
|
||||||
|
SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||||
|
|
||||||
|
**/
|
||||||
|
#include "InternalSmmRelocationLib.h"
|
||||||
|
#include <Register/Amd/SmramSaveStateMap.h>
|
||||||
|
|
||||||
|
/**
|
||||||
|
This function configures the SmBase on the currently executing CPU.
|
||||||
|
|
||||||
|
@param[in] SmBase The SmBase on the currently executing CPU.
|
||||||
|
|
||||||
|
**/
|
||||||
|
VOID
|
||||||
|
EFIAPI
|
||||||
|
ConfigureSmBase (
|
||||||
|
IN UINT64 SmBase
|
||||||
|
)
|
||||||
|
{
|
||||||
|
AMD_SMRAM_SAVE_STATE_MAP *CpuSaveState;
|
||||||
|
|
||||||
|
CpuSaveState = (AMD_SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET);
|
||||||
|
|
||||||
|
if ((CpuSaveState->x86.SMMRevId & 0xFFFF) == 0) {
|
||||||
|
CpuSaveState->x86.SMBASE = (UINT32)SmBase;
|
||||||
|
} else {
|
||||||
|
CpuSaveState->x64.SMBASE = (UINT32)SmBase;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
This function updates the SMRAM save state on the currently executing CPU
|
||||||
|
to resume execution at a specific address after an RSM instruction. This
|
||||||
|
function must evaluate the SMRAM save state to determine the execution mode
|
||||||
|
the RSM instruction resumes and update the resume execution address with
|
||||||
|
either NewInstructionPointer32 or NewInstructionPoint. The auto HALT restart
|
||||||
|
flag in the SMRAM save state must always be cleared. This function returns
|
||||||
|
the value of the instruction pointer from the SMRAM save state that was
|
||||||
|
replaced. If this function returns 0, then the SMRAM save state was not
|
||||||
|
modified.
|
||||||
|
|
||||||
|
This function is called during the very first SMI on each CPU after
|
||||||
|
SmmCpuFeaturesInitializeProcessor() to set a flag in normal execution mode
|
||||||
|
to signal that the SMBASE of each CPU has been updated before the default
|
||||||
|
SMBASE address is used for the first SMI to the next CPU.
|
||||||
|
|
||||||
|
@param[in,out] CpuState Pointer to SMRAM Save State Map for the
|
||||||
|
currently executing CPU.
|
||||||
|
@param[in] NewInstructionPointer32 Instruction pointer to use if resuming to
|
||||||
|
32-bit mode from 64-bit SMM.
|
||||||
|
@param[in] NewInstructionPointer Instruction pointer to use if resuming to
|
||||||
|
same mode as SMM.
|
||||||
|
|
||||||
|
@retval The value of the original instruction pointer before it was hooked.
|
||||||
|
|
||||||
|
**/
|
||||||
|
UINT64
|
||||||
|
EFIAPI
|
||||||
|
HookReturnFromSmm (
|
||||||
|
IN OUT SMRAM_SAVE_STATE_MAP *CpuState,
|
||||||
|
IN UINT64 NewInstructionPointer32,
|
||||||
|
IN UINT64 NewInstructionPointer
|
||||||
|
)
|
||||||
|
{
|
||||||
|
UINT64 OriginalInstructionPointer;
|
||||||
|
AMD_SMRAM_SAVE_STATE_MAP *CpuSaveState;
|
||||||
|
|
||||||
|
CpuSaveState = (AMD_SMRAM_SAVE_STATE_MAP *)CpuState;
|
||||||
|
if ((CpuSaveState->x86.SMMRevId & 0xFFFF) == 0) {
|
||||||
|
OriginalInstructionPointer = (UINT64)CpuSaveState->x86._EIP;
|
||||||
|
CpuSaveState->x86._EIP = (UINT32)NewInstructionPointer;
|
||||||
|
//
|
||||||
|
// Clear the auto HALT restart flag so the RSM instruction returns
|
||||||
|
// program control to the instruction following the HLT instruction.
|
||||||
|
//
|
||||||
|
if ((CpuSaveState->x86.AutoHALTRestart & BIT0) != 0) {
|
||||||
|
CpuSaveState->x86.AutoHALTRestart &= ~BIT0;
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
OriginalInstructionPointer = CpuSaveState->x64._RIP;
|
||||||
|
if ((CpuSaveState->x64.EFER & LMA) == 0) {
|
||||||
|
CpuSaveState->x64._RIP = (UINT32)NewInstructionPointer32;
|
||||||
|
} else {
|
||||||
|
CpuSaveState->x64._RIP = (UINT32)NewInstructionPointer;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Clear the auto HALT restart flag so the RSM instruction returns
|
||||||
|
// program control to the instruction following the HLT instruction.
|
||||||
|
//
|
||||||
|
if ((CpuSaveState->x64.AutoHALTRestart & BIT0) != 0) {
|
||||||
|
CpuSaveState->x64.AutoHALTRestart &= ~BIT0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return OriginalInstructionPointer;
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,66 @@
|
||||||
|
/** @file
|
||||||
|
Semaphore mechanism to indicate to the BSP that an AP has exited SMM
|
||||||
|
after SMBASE relocation.
|
||||||
|
|
||||||
|
Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
|
||||||
|
SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||||
|
|
||||||
|
**/
|
||||||
|
|
||||||
|
#include "InternalSmmRelocationLib.h"
|
||||||
|
|
||||||
|
X86_ASSEMBLY_PATCH_LABEL gPatchSmmRelocationOriginalAddressPtr32;
|
||||||
|
X86_ASSEMBLY_PATCH_LABEL gPatchRebasedFlagAddr32;
|
||||||
|
|
||||||
|
UINTN mSmmRelocationOriginalAddress;
|
||||||
|
volatile BOOLEAN *mRebasedFlag;
|
||||||
|
|
||||||
|
/**
|
||||||
|
AP Semaphore operation in 32-bit mode while BSP runs in 64-bit mode.
|
||||||
|
**/
|
||||||
|
VOID
|
||||||
|
SmmRelocationSemaphoreComplete32 (
|
||||||
|
VOID
|
||||||
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
Hook return address of SMM Save State so that semaphore code
|
||||||
|
can be executed immediately after AP exits SMM to indicate to
|
||||||
|
the BSP that an AP has exited SMM after SMBASE relocation.
|
||||||
|
|
||||||
|
@param[in] RebasedFlag A pointer to a flag that is set to TRUE
|
||||||
|
immediately after AP exits SMM.
|
||||||
|
|
||||||
|
**/
|
||||||
|
VOID
|
||||||
|
SemaphoreHook (
|
||||||
|
IN volatile BOOLEAN *RebasedFlag
|
||||||
|
)
|
||||||
|
{
|
||||||
|
SMRAM_SAVE_STATE_MAP *CpuState;
|
||||||
|
UINTN TempValue;
|
||||||
|
|
||||||
|
mRebasedFlag = RebasedFlag;
|
||||||
|
PatchInstructionX86 (
|
||||||
|
gPatchRebasedFlagAddr32,
|
||||||
|
(UINT32)(UINTN)mRebasedFlag,
|
||||||
|
4
|
||||||
|
);
|
||||||
|
|
||||||
|
CpuState = (SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET);
|
||||||
|
mSmmRelocationOriginalAddress = HookReturnFromSmm (
|
||||||
|
CpuState,
|
||||||
|
(UINT64)(UINTN)&SmmRelocationSemaphoreComplete32,
|
||||||
|
(UINT64)(UINTN)&SmmRelocationSemaphoreComplete
|
||||||
|
);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Use temp value to fix ICC compiler warning
|
||||||
|
//
|
||||||
|
TempValue = (UINTN)&mSmmRelocationOriginalAddress;
|
||||||
|
PatchInstructionX86 (
|
||||||
|
gPatchSmmRelocationOriginalAddressPtr32,
|
||||||
|
(UINT32)TempValue,
|
||||||
|
4
|
||||||
|
);
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,201 @@
|
||||||
|
;------------------------------------------------------------------------------ ;
|
||||||
|
; Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
|
||||||
|
; SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||||
|
;
|
||||||
|
; Module Name:
|
||||||
|
;
|
||||||
|
; SmmInit.nasm
|
||||||
|
;
|
||||||
|
; Abstract:
|
||||||
|
;
|
||||||
|
; Functions for relocating SMBASE's for all processors
|
||||||
|
;
|
||||||
|
;-------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
%include "StuffRsbNasm.inc"
|
||||||
|
|
||||||
|
extern ASM_PFX(SmmInitHandler)
|
||||||
|
extern ASM_PFX(mRebasedFlag)
|
||||||
|
extern ASM_PFX(mSmmRelocationOriginalAddress)
|
||||||
|
|
||||||
|
global ASM_PFX(gPatchSmmInitCr3)
|
||||||
|
global ASM_PFX(gPatchSmmInitCr4)
|
||||||
|
global ASM_PFX(gPatchSmmInitCr0)
|
||||||
|
global ASM_PFX(gPatchSmmInitStack)
|
||||||
|
global ASM_PFX(gcSmmInitGdtr)
|
||||||
|
global ASM_PFX(gcSmmInitSize)
|
||||||
|
global ASM_PFX(gcSmmInitTemplate)
|
||||||
|
global ASM_PFX(gPatchRebasedFlagAddr32)
|
||||||
|
global ASM_PFX(gPatchSmmRelocationOriginalAddressPtr32)
|
||||||
|
|
||||||
|
%define LONG_MODE_CS 0x38
|
||||||
|
|
||||||
|
SECTION .data
|
||||||
|
|
||||||
|
NullSeg: DQ 0 ; reserved by architecture
|
||||||
|
CodeSeg32:
|
||||||
|
DW -1 ; LimitLow
|
||||||
|
DW 0 ; BaseLow
|
||||||
|
DB 0 ; BaseMid
|
||||||
|
DB 0x9b
|
||||||
|
DB 0xcf ; LimitHigh
|
||||||
|
DB 0 ; BaseHigh
|
||||||
|
ProtModeCodeSeg32:
|
||||||
|
DW -1 ; LimitLow
|
||||||
|
DW 0 ; BaseLow
|
||||||
|
DB 0 ; BaseMid
|
||||||
|
DB 0x9b
|
||||||
|
DB 0xcf ; LimitHigh
|
||||||
|
DB 0 ; BaseHigh
|
||||||
|
ProtModeSsSeg32:
|
||||||
|
DW -1 ; LimitLow
|
||||||
|
DW 0 ; BaseLow
|
||||||
|
DB 0 ; BaseMid
|
||||||
|
DB 0x93
|
||||||
|
DB 0xcf ; LimitHigh
|
||||||
|
DB 0 ; BaseHigh
|
||||||
|
DataSeg32:
|
||||||
|
DW -1 ; LimitLow
|
||||||
|
DW 0 ; BaseLow
|
||||||
|
DB 0 ; BaseMid
|
||||||
|
DB 0x93
|
||||||
|
DB 0xcf ; LimitHigh
|
||||||
|
DB 0 ; BaseHigh
|
||||||
|
CodeSeg16:
|
||||||
|
DW -1
|
||||||
|
DW 0
|
||||||
|
DB 0
|
||||||
|
DB 0x9b
|
||||||
|
DB 0x8f
|
||||||
|
DB 0
|
||||||
|
DataSeg16:
|
||||||
|
DW -1
|
||||||
|
DW 0
|
||||||
|
DB 0
|
||||||
|
DB 0x93
|
||||||
|
DB 0x8f
|
||||||
|
DB 0
|
||||||
|
CodeSeg64:
|
||||||
|
DW -1 ; LimitLow
|
||||||
|
DW 0 ; BaseLow
|
||||||
|
DB 0 ; BaseMid
|
||||||
|
DB 0x9b
|
||||||
|
DB 0xaf ; LimitHigh
|
||||||
|
DB 0 ; BaseHigh
|
||||||
|
GDT_SIZE equ $ - NullSeg
|
||||||
|
|
||||||
|
ASM_PFX(gcSmmInitGdtr):
|
||||||
|
DW GDT_SIZE - 1
|
||||||
|
DQ NullSeg
|
||||||
|
|
||||||
|
|
||||||
|
DEFAULT REL
|
||||||
|
SECTION .text
|
||||||
|
|
||||||
|
global ASM_PFX(SmmStartup)
|
||||||
|
|
||||||
|
BITS 16
|
||||||
|
ASM_PFX(SmmStartup):
|
||||||
|
mov eax, 0x80000001 ; read capability
|
||||||
|
cpuid
|
||||||
|
mov ebx, edx ; rdmsr will change edx. keep it in ebx.
|
||||||
|
mov eax, strict dword 0 ; source operand will be patched
|
||||||
|
ASM_PFX(gPatchSmmInitCr3):
|
||||||
|
mov cr3, eax
|
||||||
|
o32 lgdt [cs:ebp + (ASM_PFX(gcSmmInitGdtr) - ASM_PFX(SmmStartup))]
|
||||||
|
mov eax, strict dword 0 ; source operand will be patched
|
||||||
|
ASM_PFX(gPatchSmmInitCr4):
|
||||||
|
or ah, 2 ; enable XMM registers access
|
||||||
|
mov cr4, eax
|
||||||
|
mov ecx, 0xc0000080 ; IA32_EFER MSR
|
||||||
|
rdmsr
|
||||||
|
or ah, BIT0 ; set LME bit
|
||||||
|
test ebx, BIT20 ; check NXE capability
|
||||||
|
jz .1
|
||||||
|
or ah, BIT3 ; set NXE bit
|
||||||
|
.1:
|
||||||
|
wrmsr
|
||||||
|
mov eax, strict dword 0 ; source operand will be patched
|
||||||
|
ASM_PFX(gPatchSmmInitCr0):
|
||||||
|
mov cr0, eax ; enable protected mode & paging
|
||||||
|
jmp LONG_MODE_CS : dword 0 ; offset will be patched to @LongMode
|
||||||
|
@PatchLongModeOffset:
|
||||||
|
|
||||||
|
BITS 64
|
||||||
|
@LongMode: ; long-mode starts here
|
||||||
|
mov rsp, strict qword 0 ; source operand will be patched
|
||||||
|
ASM_PFX(gPatchSmmInitStack):
|
||||||
|
and sp, 0xfff0 ; make sure RSP is 16-byte aligned
|
||||||
|
;
|
||||||
|
; According to X64 calling convention, XMM0~5 are volatile, we need to save
|
||||||
|
; them before calling C-function.
|
||||||
|
;
|
||||||
|
sub rsp, 0x60
|
||||||
|
movdqa [rsp], xmm0
|
||||||
|
movdqa [rsp + 0x10], xmm1
|
||||||
|
movdqa [rsp + 0x20], xmm2
|
||||||
|
movdqa [rsp + 0x30], xmm3
|
||||||
|
movdqa [rsp + 0x40], xmm4
|
||||||
|
movdqa [rsp + 0x50], xmm5
|
||||||
|
|
||||||
|
add rsp, -0x20
|
||||||
|
call ASM_PFX(SmmInitHandler)
|
||||||
|
add rsp, 0x20
|
||||||
|
|
||||||
|
;
|
||||||
|
; Restore XMM0~5 after calling C-function.
|
||||||
|
;
|
||||||
|
movdqa xmm0, [rsp]
|
||||||
|
movdqa xmm1, [rsp + 0x10]
|
||||||
|
movdqa xmm2, [rsp + 0x20]
|
||||||
|
movdqa xmm3, [rsp + 0x30]
|
||||||
|
movdqa xmm4, [rsp + 0x40]
|
||||||
|
movdqa xmm5, [rsp + 0x50]
|
||||||
|
|
||||||
|
StuffRsb64
|
||||||
|
rsm
|
||||||
|
|
||||||
|
BITS 16
|
||||||
|
ASM_PFX(gcSmmInitTemplate):
|
||||||
|
mov ebp, [cs:@L1 - ASM_PFX(gcSmmInitTemplate) + 0x8000]
|
||||||
|
sub ebp, 0x30000
|
||||||
|
jmp ebp
|
||||||
|
@L1:
|
||||||
|
DQ 0; ASM_PFX(SmmStartup)
|
||||||
|
|
||||||
|
ASM_PFX(gcSmmInitSize): DW $ - ASM_PFX(gcSmmInitTemplate)
|
||||||
|
|
||||||
|
BITS 64
|
||||||
|
global ASM_PFX(SmmRelocationSemaphoreComplete)
|
||||||
|
ASM_PFX(SmmRelocationSemaphoreComplete):
|
||||||
|
push rax
|
||||||
|
mov rax, [ASM_PFX(mRebasedFlag)]
|
||||||
|
mov byte [rax], 1
|
||||||
|
pop rax
|
||||||
|
jmp [ASM_PFX(mSmmRelocationOriginalAddress)]
|
||||||
|
|
||||||
|
;
|
||||||
|
; Semaphore code running in 32-bit mode
|
||||||
|
;
|
||||||
|
BITS 32
|
||||||
|
global ASM_PFX(SmmRelocationSemaphoreComplete32)
|
||||||
|
ASM_PFX(SmmRelocationSemaphoreComplete32):
|
||||||
|
push eax
|
||||||
|
mov eax, strict dword 0 ; source operand will be patched
|
||||||
|
ASM_PFX(gPatchRebasedFlagAddr32):
|
||||||
|
mov byte [eax], 1
|
||||||
|
pop eax
|
||||||
|
jmp dword [dword 0] ; destination will be patched
|
||||||
|
ASM_PFX(gPatchSmmRelocationOriginalAddressPtr32):
|
||||||
|
|
||||||
|
BITS 64
|
||||||
|
global ASM_PFX(SmmInitFixupAddress)
|
||||||
|
ASM_PFX(SmmInitFixupAddress):
|
||||||
|
lea rax, [@LongMode]
|
||||||
|
lea rcx, [@PatchLongModeOffset - 6]
|
||||||
|
mov dword [rcx], eax
|
||||||
|
|
||||||
|
lea rax, [ASM_PFX(SmmStartup)]
|
||||||
|
lea rcx, [@L1]
|
||||||
|
mov qword [rcx], rax
|
||||||
|
ret
|
||||||
|
|
@ -129,6 +129,7 @@
|
||||||
!include MdePkg/MdeLibs.dsc.inc
|
!include MdePkg/MdeLibs.dsc.inc
|
||||||
|
|
||||||
[LibraryClasses]
|
[LibraryClasses]
|
||||||
|
SmmRelocationLib|OvmfPkg/Library/SmmRelocationLib/SmmRelocationLib.inf
|
||||||
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
|
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
|
||||||
TimerLib|MdePkg/Library/SecPeiDxeTimerLibCpu/SecPeiDxeTimerLibCpu.inf
|
TimerLib|MdePkg/Library/SecPeiDxeTimerLibCpu/SecPeiDxeTimerLibCpu.inf
|
||||||
ResetSystemLib|OvmfPkg/Library/ResetSystemLib/BaseResetSystemLibMicrovm.inf
|
ResetSystemLib|OvmfPkg/Library/ResetSystemLib/BaseResetSystemLibMicrovm.inf
|
||||||
|
|
|
||||||
|
|
@ -129,6 +129,7 @@
|
||||||
!include MdePkg/MdeLibs.dsc.inc
|
!include MdePkg/MdeLibs.dsc.inc
|
||||||
|
|
||||||
[LibraryClasses]
|
[LibraryClasses]
|
||||||
|
SmmRelocationLib|OvmfPkg/Library/SmmRelocationLib/SmmRelocationLib.inf
|
||||||
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
|
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
|
||||||
TimerLib|OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.inf
|
TimerLib|OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.inf
|
||||||
ResetSystemLib|OvmfPkg/Library/ResetSystemLib/BaseResetSystemLib.inf
|
ResetSystemLib|OvmfPkg/Library/ResetSystemLib/BaseResetSystemLib.inf
|
||||||
|
|
|
||||||
|
|
@ -134,6 +134,7 @@
|
||||||
!include MdePkg/MdeLibs.dsc.inc
|
!include MdePkg/MdeLibs.dsc.inc
|
||||||
|
|
||||||
[LibraryClasses]
|
[LibraryClasses]
|
||||||
|
SmmRelocationLib|OvmfPkg/Library/SmmRelocationLib/SmmRelocationLib.inf
|
||||||
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
|
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
|
||||||
TimerLib|OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.inf
|
TimerLib|OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.inf
|
||||||
ResetSystemLib|OvmfPkg/Library/ResetSystemLib/BaseResetSystemLib.inf
|
ResetSystemLib|OvmfPkg/Library/ResetSystemLib/BaseResetSystemLib.inf
|
||||||
|
|
|
||||||
|
|
@ -147,6 +147,7 @@
|
||||||
!include MdePkg/MdeLibs.dsc.inc
|
!include MdePkg/MdeLibs.dsc.inc
|
||||||
|
|
||||||
[LibraryClasses]
|
[LibraryClasses]
|
||||||
|
SmmRelocationLib|OvmfPkg/Library/SmmRelocationLib/SmmRelocationLib.inf
|
||||||
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
|
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
|
||||||
TimerLib|OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.inf
|
TimerLib|OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.inf
|
||||||
ResetSystemLib|OvmfPkg/Library/ResetSystemLib/BaseResetSystemLib.inf
|
ResetSystemLib|OvmfPkg/Library/ResetSystemLib/BaseResetSystemLib.inf
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue