Fix a bug introuduced by r16104, not all NIC device implement both memory and IO bar.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-By: Ye, Ting (ting.ye@intel.com)
Reviewed-By: Wu, Jiaxin <jiaxin.wu@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16278 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Fu Siyuan 2014-10-31 00:38:39 +00:00 committed by sfu5
parent b176333801
commit 3f103c08ba
1 changed files with 7 additions and 6 deletions

View File

@ -455,10 +455,14 @@ SimpleNetworkDriverStart (
Snp->Db = (VOID *) ((UINTN) Address + 2048);
//
// Find the correct memory and io bar.
// Find the correct BAR to do IO.
//
Snp->MemoryBarIndex = PCI_MAX_BAR;
Snp->IoBarIndex = PCI_MAX_BAR;
// Enumerate through the PCI BARs for the device to determine which one is
// the IO BAR. Save the index of the BAR into the adapter info structure.
// for regular 32bit BARs, 0 is memory mapped, 1 is io mapped
//
Snp->MemoryBarIndex = 0;
Snp->IoBarIndex = 1;
for (BarIndex = 0; BarIndex < PCI_MAX_BAR; BarIndex++) {
Status = PciIo->GetBarAttributes (
PciIo,
@ -480,9 +484,6 @@ SimpleNetworkDriverStart (
FreePool (BarDesc);
}
if ((Snp->MemoryBarIndex == PCI_MAX_BAR) || (Snp->IoBarIndex == PCI_MAX_BAR)) {
goto Error_DeleteSNP;
}
Status = PxeStart (Snp);