ArmPlatformPkg: Removed the 'Identify' functions

This function was introduced in some drivers to check if the ARM controller
was present in the memory map.
It was using a 8 bit access to get the value from the Identification registers.
These accesses could generate access error on some buses. Instead of replacing
the 8bit access by a 32bit access, these fcuntions have been removed because
they are only useful when the boot firmware is ported on a new platform.

Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13247 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin 2012-05-02 19:52:49 +00:00
parent d9efd68ef5
commit 3f305c063a
2 changed files with 3 additions and 65 deletions

View File

@ -1,6 +1,7 @@
/** @file PL111Lcd.c
Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -25,43 +26,11 @@
*
**********************************************************************/
EFI_STATUS
PL111Indentify (
VOID
)
{
// Check if this is a PrimeCell Peripheral
if ( ( MmioRead8( PL111_REG_CLCD_P_CELL_ID_0 ) != 0x0D )
|| ( MmioRead8( PL111_REG_CLCD_P_CELL_ID_1 ) != 0xF0 )
|| ( MmioRead8( PL111_REG_CLCD_P_CELL_ID_2 ) != 0x05 )
|| ( MmioRead8( PL111_REG_CLCD_P_CELL_ID_3 ) != 0xB1 ) ) {
return EFI_NOT_FOUND;
}
// Check if this PrimeCell Peripheral is the PL111 LCD
if ( ( MmioRead8( PL111_REG_CLCD_PERIPH_ID_0 ) != 0x11 )
|| ( MmioRead8( PL111_REG_CLCD_PERIPH_ID_1 ) != 0x11 )
|| ( (MmioRead8( PL111_REG_CLCD_PERIPH_ID_2 ) & 0xF) != 0x04 )
|| ( MmioRead8( PL111_REG_CLCD_PERIPH_ID_3 ) != 0x00 ) ) {
return EFI_NOT_FOUND;
}
return EFI_SUCCESS;
}
EFI_STATUS
LcdInitialize (
IN EFI_PHYSICAL_ADDRESS VramBaseAddress
)
{
EFI_STATUS Status = EFI_SUCCESS;
// Check if the PL111 is fitted on this motherboard
Status = PL111Indentify ();
if (EFI_ERROR( Status )) {
return EFI_DEVICE_ERROR;
}
// Define start of the VRAM. This never changes for any graphics mode
MmioWrite32(PL111_REG_LCD_UP_BASE, (UINT32) VramBaseAddress);
MmioWrite32(PL111_REG_LCD_LP_BASE, 0); // We are not using a double buffer

View File

@ -29,30 +29,6 @@
EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;
EFI_STATUS
SP805Identify (
VOID
)
{
// Check if this is a PrimeCell Peripheral
if ( (MmioRead8 (SP805_WDOG_PCELL_ID0) != 0x0D)
|| (MmioRead8 (SP805_WDOG_PCELL_ID1) != 0xF0)
|| (MmioRead8 (SP805_WDOG_PCELL_ID2) != 0x05)
|| (MmioRead8 (SP805_WDOG_PCELL_ID3) != 0xB1)) {
return EFI_NOT_FOUND;
}
// Check if this PrimeCell Peripheral is the SP805 Watchdog Timer
if ( (MmioRead8 (SP805_WDOG_PERIPH_ID0) != 0x05)
|| (MmioRead8 (SP805_WDOG_PERIPH_ID1) != 0x18)
|| ((MmioRead8 (SP805_WDOG_PERIPH_ID2) & 0x0000000F) != 0x04)
|| (MmioRead8 (SP805_WDOG_PERIPH_ID3) != 0x00)) {
return EFI_NOT_FOUND;
}
return EFI_SUCCESS;
}
/**
Make sure the SP805 registers are unlocked for writing.
@ -363,13 +339,6 @@ SP805Initialize (
EFI_STATUS Status;
EFI_HANDLE Handle;
// Check if the SP805 hardware watchdog module exists on board
Status = SP805Identify();
if (EFI_ERROR(Status)) {
Status = EFI_DEVICE_ERROR;
goto EXIT;
}
// Unlock access to the SP805 registers
SP805Unlock ();
@ -409,7 +378,7 @@ SP805Initialize (
goto EXIT;
}
EXIT:
EXIT:
if(EFI_ERROR(Status)) {
// The watchdog failed to initialize
ASSERT(FALSE);