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ArmPlatformPkg: Apply uncrustify changes 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the ArmPlatformPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Andrew Fish <afish@apple.com>
This commit is contained in:
Michael Kubacki 2021-12-05 14:53:52 -08:00 committed by mergify[bot]
parent 429309e0c6
commit 40b0b23ed3
47 changed files with 2846 additions and 2662 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

49
ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputBlt.c
View File

@ -60,7 +60,6 @@ VideoCopyNoHorizontalOverlap (
}
switch (BitsPerPixel) {
case LcdBitsPerPixel_24:
WidthInBytes = Width * 4;
@ -77,6 +76,7 @@ VideoCopyNoHorizontalOverlap (
SourceLine += Step;
DestinationLine += Step;
}
break;
case LcdBitsPerPixel_16_555:
@ -97,6 +97,7 @@ VideoCopyNoHorizontalOverlap (
SourceLine += Step;
DestinationLine += Step;
}
break;
case LcdBitsPerPixel_8:
@ -109,7 +110,6 @@ VideoCopyNoHorizontalOverlap (
Status = EFI_INVALID_PARAMETER;
goto EXIT;
// break;
}
EXIT:
@ -148,7 +148,6 @@ VideoCopyHorizontalOverlap (
Status = EFI_SUCCESS;
switch (BitsPerPixel) {
case LcdBitsPerPixel_24:
// Allocate a temporary buffer
@ -190,7 +189,6 @@ VideoCopyHorizontalOverlap (
break;
case LcdBitsPerPixel_16_555:
case LcdBitsPerPixel_16_565:
case LcdBitsPerPixel_12_444:
@ -235,7 +233,6 @@ VideoCopyHorizontalOverlap (
break;
case LcdBitsPerPixel_8:
case LcdBitsPerPixel_4:
case LcdBitsPerPixel_2:
@ -246,7 +243,6 @@ VideoCopyHorizontalOverlap (
Status = EFI_INVALID_PARAMETER;
goto EXIT;
// break;
}
EXIT:
@ -301,6 +297,7 @@ BltVideoFill (
// Fill the entire line
SetMem32 (DestinationAddr, WidthInBytes, *((UINT32 *)EfiSourcePixel));
}
break;
case LcdBitsPerPixel_16_555:
@ -328,6 +325,7 @@ BltVideoFill (
*DestinationPixel16bit = Pixel16bit;
}
}
break;
case LcdBitsPerPixel_16_565:
@ -354,6 +352,7 @@ BltVideoFill (
*DestinationPixel16bit = Pixel16bit;
}
}
break;
case LcdBitsPerPixel_12_444:
@ -380,6 +379,7 @@ BltVideoFill (
*DestinationPixel16bit = Pixel16bit;
}
}
break;
case LcdBitsPerPixel_8:
@ -458,6 +458,7 @@ BltVideoToBltBuffer (
// Copy the entire line
CopyMem (DestinationAddr, SourceAddr, WidthInBytes);
}
break;
case LcdBitsPerPixel_16_555:
@ -485,6 +486,7 @@ BltVideoToBltBuffer (
// EfiDestinationPixel->Reserved = (UINT8) 0;
}
}
break;
case LcdBitsPerPixel_16_565:
@ -513,6 +515,7 @@ BltVideoToBltBuffer (
// EfiDestinationPixel->Reserved = (UINT8) 0;
}
}
break;
case LcdBitsPerPixel_12_444:
@ -540,6 +543,7 @@ BltVideoToBltBuffer (
// EfiDestinationPixel->Reserved = (UINT8) 0;
}
}
break;
case LcdBitsPerPixel_8:
@ -552,6 +556,7 @@ BltVideoToBltBuffer (
Status = EFI_INVALID_PARAMETER;
break;
}
return Status;
}
@ -616,14 +621,15 @@ BltBufferToVideo (
// Copy the entire row Y
CopyMem (DestinationAddr, SourceAddr, WidthInBytes);
}
break;
case LcdBitsPerPixel_16_555:
// Access each pixel inside the BltBuffer Memory
for (SourceLine = SourceY, DestinationLine = DestinationY;
SourceLine < SourceY + Height;
SourceLine++, DestinationLine++) {
SourceLine++, DestinationLine++)
{
for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;
SourcePixelX < SourceX + Width;
SourcePixelX++, DestinationPixelX++)
@ -643,14 +649,15 @@ BltBufferToVideo (
);
}
}
break;
case LcdBitsPerPixel_16_565:
// Access each pixel inside the BltBuffer Memory
for (SourceLine = SourceY, DestinationLine = DestinationY;
SourceLine < SourceY + Height;
SourceLine++, DestinationLine++) {
SourceLine++, DestinationLine++)
{
for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;
SourcePixelX < SourceX + Width;
SourcePixelX++, DestinationPixelX++)
@ -670,14 +677,15 @@ BltBufferToVideo (
);
}
}
break;
case LcdBitsPerPixel_12_444:
// Access each pixel inside the BltBuffer Memory
for (SourceLine = SourceY, DestinationLine = DestinationY;
SourceLine < SourceY + Height;
SourceLine++, DestinationLine++) {
SourceLine++, DestinationLine++)
{
for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;
SourcePixelX < SourceX + Width;
SourcePixelX++, DestinationPixelX++)
@ -697,6 +705,7 @@ BltBufferToVideo (
);
}
}
break;
case LcdBitsPerPixel_8:
@ -709,6 +718,7 @@ BltBufferToVideo (
Status = EFI_INVALID_PARAMETER;
break;
}
return Status;
}
@ -805,11 +815,20 @@ LcdGraphicsBlt (
HorizontalResolution = This->Mode->Info->HorizontalResolution;
VerticalResolution = This->Mode->Info->VerticalResolution;
DEBUG((DEBUG_INFO, "LcdGraphicsBlt (BltOperation:%d,DestX:%d,DestY:%d,Width:%d,Height:%d) res(%d,%d)\n",
BltOperation,DestinationX,DestinationY,Width,Height,HorizontalResolution,VerticalResolution));
DEBUG ((
DEBUG_INFO,
"LcdGraphicsBlt (BltOperation:%d,DestX:%d,DestY:%d,Width:%d,Height:%d) res(%d,%d)\n",
BltOperation,
DestinationX,
DestinationY,
Width,
Height,
HorizontalResolution,
VerticalResolution
));
// Check we have reasonable parameters
if (Width == 0 || Height == 0) {
if ((Width == 0) || (Height == 0)) {
DEBUG ((DEBUG_ERROR, "LcdGraphicsBlt: ERROR - Invalid dimension: Zero size area.\n"));
Status = EFI_INVALID_PARAMETER;
goto EXIT;

4
ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c
View File

@ -263,7 +263,8 @@ LcdGraphicsQueryMode (
if ((This == NULL) ||
(Info == NULL) ||
(SizeOfInfo == NULL) ||
(ModeNumber >= This->Mode->MaxMode)) {
(ModeNumber >= This->Mode->MaxMode))
{
DEBUG ((DEBUG_ERROR, "LcdGraphicsQueryMode: ERROR - For mode number %d : Invalid Parameter.\n", ModeNumber));
Status = EFI_INVALID_PARAMETER;
goto EXIT;
@ -333,6 +334,7 @@ LcdGraphicsSetMode (
DEBUG ((DEBUG_ERROR, "LcdGraphicsSetMode: ERROR - Couldn't get bytes per pixel, status: %r\n", Status));
goto EXIT;
}
This->Mode->FrameBufferSize = Instance->ModeInfo.VerticalResolution
* Instance->ModeInfo.PixelsPerScanLine
* GetBytesPerPixel (Bpp);

46
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlash.c
View File

@ -120,7 +120,6 @@ NorFlashUnlockSingleBlockIfNecessary (
return Status;
}
/**
* The following function presumes that the block has already been unlocked.
**/
@ -201,7 +200,6 @@ NorFlashWriteSingleWord (
// The chip is busy while the WRITE bit is not asserted
} while ((StatusRegister & P30_SR_BIT_WRITE) != P30_SR_BIT_WRITE);
// Perform a full status check:
// Mask the relevant bits of Status Register.
// Everything should be zero, if not, we have a problem
@ -303,7 +301,6 @@ NorFlashWriteBuffer (
// Update the loop counter
WaitForBuffer--;
} while ((WaitForBuffer > 0) && (BufferAvailable == FALSE));
// The buffer was not available for writing
@ -333,7 +330,6 @@ NorFlashWriteBuffer (
// The chip is busy while the WRITE bit is not asserted
} while ((StatusRegister & P30_SR_BIT_WRITE) != P30_SR_BIT_WRITE);
// Perform a full status check:
// Mask the relevant bits of Status Register.
// Everything should be zero, if not, we have a problem
@ -423,7 +419,6 @@ NorFlashWriteBlocks (
CurrentBlock = Lba;
for (BlockCount = 0; BlockCount < NumBlocks; BlockCount++, CurrentBlock++, pWriteBuffer = pWriteBuffer + BlockSizeInWords) {
DEBUG ((DEBUG_BLKIO, "NorFlashWriteBlocks: Writing block #%d\n", (UINTN)CurrentBlock));
Status = NorFlashWriteFullBlock (Instance, CurrentBlock, pWriteBuffer, BlockSizeInWords);
@ -466,7 +461,7 @@ AlignedCopyMem (
UINT64 *Destination64;
CONST UINT64 *Source64;
if (BOTH_ALIGNED(DestinationBuffer, SourceBuffer, 8) && Length >= 8) {
if (BOTH_ALIGNED (DestinationBuffer, SourceBuffer, 8) && (Length >= 8)) {
Destination64 = DestinationBuffer;
Source64 = SourceBuffer;
while (Length >= 8) {
@ -476,7 +471,7 @@ AlignedCopyMem (
Destination8 = (UINT8 *)Destination64;
Source8 = (CONST UINT8 *)Source64;
} else if (BOTH_ALIGNED(DestinationBuffer, SourceBuffer, 4) && Length >= 4) {
} else if (BOTH_ALIGNED (DestinationBuffer, SourceBuffer, 4) && (Length >= 4)) {
Destination32 = DestinationBuffer;
Source32 = SourceBuffer;
while (Length >= 4) {
@ -490,9 +485,11 @@ AlignedCopyMem (
Destination8 = DestinationBuffer;
Source8 = SourceBuffer;
}
while (Length-- != 0) {
*Destination8++ = *Source8++;
}
return DestinationBuffer;
}
@ -507,8 +504,14 @@ NorFlashReadBlocks (
UINT32 NumBlocks;
UINTN StartAddress;
DEBUG((DEBUG_BLKIO, "NorFlashReadBlocks: BufferSize=0x%xB BlockSize=0x%xB LastBlock=%ld, Lba=%ld.\n",
BufferSizeInBytes, Instance->Media.BlockSize, Instance->Media.LastBlock, Lba));
DEBUG ((
DEBUG_BLKIO,
"NorFlashReadBlocks: BufferSize=0x%xB BlockSize=0x%xB LastBlock=%ld, Lba=%ld.\n",
BufferSizeInBytes,
Instance->Media.BlockSize,
Instance->Media.LastBlock,
Lba
));
// The buffer must be valid
if (Buffer == NULL) {
@ -534,7 +537,8 @@ NorFlashReadBlocks (
}
// Get the address to start reading from
StartAddress = GET_NOR_BLOCK_ADDRESS (Instance->RegionBaseAddress,
StartAddress = GET_NOR_BLOCK_ADDRESS (
Instance->RegionBaseAddress,
Lba,
Instance->Media.BlockSize
);
@ -575,7 +579,8 @@ NorFlashRead (
}
// Get the address to start reading from
StartAddress = GET_NOR_BLOCK_ADDRESS (Instance->RegionBaseAddress,
StartAddress = GET_NOR_BLOCK_ADDRESS (
Instance->RegionBaseAddress,
Lba,
Instance->Media.BlockSize
);
@ -633,7 +638,8 @@ NorFlashWriteSingleBlock (
// We need to check each variable individually because adding two large values together overflows.
if ((Offset >= BlockSize) ||
(*NumBytes > BlockSize) ||
( (Offset + *NumBytes) > BlockSize ) ) {
((Offset + *NumBytes) > BlockSize))
{
DEBUG ((DEBUG_ERROR, "NorFlashWriteSingleBlock: ERROR - EFI_BAD_BUFFER_SIZE: (Offset=0x%x + NumBytes=0x%x) > BlockSize=0x%x\n", Offset, *NumBytes, BlockSize));
return EFI_BAD_BUFFER_SIZE;
}
@ -665,8 +671,11 @@ NorFlashWriteSingleBlock (
}
// Physical address of word in NOR to write.
WordAddr = (CurOffset & ~(0x3)) + GET_NOR_BLOCK_ADDRESS (Instance->RegionBaseAddress,
Lba, BlockSize);
WordAddr = (CurOffset & ~(0x3)) + GET_NOR_BLOCK_ADDRESS (
Instance->RegionBaseAddress,
Lba,
BlockSize
);
// The word of data that is to be written.
TmpBuf = *((UINT32 *)(Buffer + (*NumBytes - BytesToWrite)));
@ -681,6 +690,7 @@ NorFlashWriteSingleBlock (
break;
}
}
// Write this word to NOR
WordToWrite = TmpBuf;
CurOffset += sizeof (TmpBuf);
@ -698,6 +708,7 @@ NorFlashWriteSingleBlock (
break;
}
}
// Merge old and new data. Write merged word to NOR
WordToWrite = (Tmp & ~Mask) | TmpBuf;
CurOffset += BytesToWrite;
@ -717,6 +728,7 @@ NorFlashWriteSingleBlock (
break;
}
}
// Merge old and new data. Write merged word to NOR
WordToWrite = (Tmp & ~Mask) | TmpBuf;
BytesToWrite -= (4 - (CurOffset & 0x3));
@ -734,6 +746,7 @@ NorFlashWriteSingleBlock (
break;
}
}
// Merge old and new data. Write merged word to NOR
WordToWrite = (Tmp & ~Mask) | TmpBuf;
CurOffset += BytesToWrite;
@ -751,13 +764,16 @@ NorFlashWriteSingleBlock (
if (EFI_ERROR (TempStatus)) {
return EFI_DEVICE_ERROR;
}
PrevBlockAddress = BlockAddress;
}
TempStatus = NorFlashWriteSingleWord (Instance, WordAddr, WordToWrite);
if (EFI_ERROR (TempStatus)) {
return EFI_DEVICE_ERROR;
}
}
// Exit if we got here and could write all the data. Otherwise do the
// Erase-Write cycle.
if (!DoErase) {
@ -904,9 +920,11 @@ NorFlashDiskIoWriteDisk (
// Write a partial block
Status = NorFlashWriteSingleBlock (Instance, Lba, BlockOffset, &WriteSize, Buffer);
}
if (EFI_ERROR (Status)) {
return Status;
}
// Now continue writing either all the remaining bytes or single blocks.
RemainingBytes -= WriteSize;
Buffer = (UINT8 *)Buffer + WriteSize;

2
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlash.h
View File

@ -9,7 +9,6 @@
#ifndef __NOR_FLASH_H__
#define __NOR_FLASH_H__
#include <Base.h>
#include <PiDxe.h>
@ -343,7 +342,6 @@ NorFlashFvbInitialize (
IN NOR_FLASH_INSTANCE *Instance
);
//
// NorFlash.c
//

55
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.c
View File

@ -85,7 +85,8 @@ NOR_FLASH_INSTANCE mNorFlashInstanceTemplate = {
(UINT8)(OFFSET_OF (NOR_FLASH_DEVICE_PATH, End) >> 8)
}
},
{ 0x0, 0x0, 0x0, { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 } }, // GUID ... NEED TO BE FILLED
{ 0x0, 0x0, 0x0, { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 }
}, // GUID ... NEED TO BE FILLED
},
0, // Index
{
@ -129,7 +130,7 @@ NorFlashCreateInstance (
CopyGuid (&Instance->DevicePath.Vendor.Guid, &gEfiCallerIdGuid);
Instance->DevicePath.Index = (UINT8)Index;
Instance->ShadowBuffer = AllocateRuntimePool (BlockSize);;
Instance->ShadowBuffer = AllocateRuntimePool (BlockSize);
if (Instance->ShadowBuffer == NULL) {
return EFI_OUT_OF_RESOURCES;
}
@ -139,9 +140,12 @@ NorFlashCreateInstance (
Status = gBS->InstallMultipleProtocolInterfaces (
&Instance->Handle,
&gEfiDevicePathProtocolGuid, &Instance->DevicePath,
&gEfiBlockIoProtocolGuid, &Instance->BlockIoProtocol,
&gEfiFirmwareVolumeBlockProtocolGuid, &Instance->FvbProtocol,
&gEfiDevicePathProtocolGuid,
&Instance->DevicePath,
&gEfiBlockIoProtocolGuid,
&Instance->BlockIoProtocol,
&gEfiFirmwareVolumeBlockProtocolGuid,
&Instance->FvbProtocol,
NULL
);
if (EFI_ERROR (Status)) {
@ -151,9 +155,12 @@ NorFlashCreateInstance (
} else {
Status = gBS->InstallMultipleProtocolInterfaces (
&Instance->Handle,
&gEfiDevicePathProtocolGuid, &Instance->DevicePath,
&gEfiBlockIoProtocolGuid, &Instance->BlockIoProtocol,
&gEfiDiskIoProtocolGuid, &Instance->DiskIoProtocol,
&gEfiDevicePathProtocolGuid,
&Instance->DevicePath,
&gEfiBlockIoProtocolGuid,
&Instance->BlockIoProtocol,
&gEfiDiskIoProtocolGuid,
&Instance->DiskIoProtocol,
NULL
);
if (EFI_ERROR (Status)) {
@ -196,6 +203,7 @@ NorFlashUnlockAndEraseSingleBlock (
if (EFI_ERROR (Status)) {
break;
}
Status = NorFlashEraseSingleBlock (Instance, BlockAddress);
Index++;
} while ((Index < NOR_FLASH_ERASE_RETRY) && (Status == EFI_WRITE_PROTECTED));
@ -257,7 +265,6 @@ NorFlashWriteFullBlock (
// Check that the address starts at a 32-word boundary, i.e. last 7 bits must be zero
if ((WordAddress & BOUNDARY_OF_32_WORDS) == 0x00) {
// First, break the entire block into buffer-sized chunks.
BuffersInBlock = (UINTN)(BlockSizeInWords * 4) / P30_MAX_BUFFER_SIZE_IN_BYTES;
@ -266,16 +273,22 @@ NorFlashWriteFullBlock (
for (BufferIndex = 0;
BufferIndex < BuffersInBlock;
BufferIndex++, WordAddress += P30_MAX_BUFFER_SIZE_IN_BYTES, DataBuffer += P30_MAX_BUFFER_SIZE_IN_WORDS
) {
)
{
// Check the buffer to see if it contains any data (not set all 1s).
for (Cnt = 0; Cnt < P30_MAX_BUFFER_SIZE_IN_WORDS; Cnt++) {
if (~DataBuffer[Cnt] != 0 ) {
// Some data found, write the buffer.
Status = NorFlashWriteBuffer (Instance, WordAddress, P30_MAX_BUFFER_SIZE_IN_BYTES,
DataBuffer);
Status = NorFlashWriteBuffer (
Instance,
WordAddress,
P30_MAX_BUFFER_SIZE_IN_BYTES,
DataBuffer
);
if (EFI_ERROR (Status)) {
goto EXIT;
}
break;
}
}
@ -290,7 +303,6 @@ NorFlashWriteFullBlock (
goto EXIT;
}
}
} else {
// For now, use the single word programming algorithm
// It is unlikely that the NOR Flash will exist in an address which falls within a 32 word boundary range,
@ -312,6 +324,7 @@ EXIT:
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "NOR FLASH Programming [WriteSingleBlock] failed at address 0x%08x. Exit Status = \"%r\".\n", WordAddress, Status));
}
return Status;
}
@ -412,14 +425,17 @@ NorFlashFvbInitialize (
Status = gDS->AddMemorySpace (
EfiGcdMemoryTypeMemoryMappedIo,
Instance->DeviceBaseAddress, RuntimeMmioRegionSize,
Instance->DeviceBaseAddress,
RuntimeMmioRegionSize,
EFI_MEMORY_UC | EFI_MEMORY_RUNTIME
);
ASSERT_EFI_ERROR (Status);
Status = gDS->SetMemorySpaceAttributes (
Instance->DeviceBaseAddress, RuntimeMmioRegionSize,
EFI_MEMORY_UC | EFI_MEMORY_RUNTIME);
Instance->DeviceBaseAddress,
RuntimeMmioRegionSize,
EFI_MEMORY_UC | EFI_MEMORY_RUNTIME
);
ASSERT_EFI_ERROR (Status);
mFlashNvStorageVariableBase = (PcdGet64 (PcdFlashNvStorageVariableBase64) != 0) ?
@ -440,8 +456,11 @@ NorFlashFvbInitialize (
if (EFI_ERROR (Status)) {
// There is no valid header, so time to install one.
DEBUG ((DEBUG_INFO, "%a: The FVB Header is not valid.\n", __FUNCTION__));
DEBUG ((DEBUG_INFO, "%a: Installing a correct one for this volume.\n",
__FUNCTION__));
DEBUG ((
DEBUG_INFO,
"%a: Installing a correct one for this volume.\n",
__FUNCTION__
));
// Erase all the NorFlash that is reserved for variable storage
FvbNumLba = (PcdGet32 (PcdFlashNvStorageVariableSize) + PcdGet32 (PcdFlashNvStorageFtwWorkingSize) + PcdGet32 (PcdFlashNvStorageFtwSpareSize)) / Instance->Media.BlockSize;

88
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashFvb.c
View File

@ -71,40 +71,59 @@ InitializeFvAndVariableStoreHeaders (
// FirmwareVolumeHeader->FvLength is declared to have the Variable area AND the FTW working area AND the FTW Spare contiguous.
if ((NvStorageVariableBase + NvStorageVariableSize) != NvStorageFtwWorkingBase) {
DEBUG ((DEBUG_ERROR, "%a: NvStorageFtwWorkingBase is not contiguous with NvStorageVariableBase region\n",
__FUNCTION__));
DEBUG ((
DEBUG_ERROR,
"%a: NvStorageFtwWorkingBase is not contiguous with NvStorageVariableBase region\n",
__FUNCTION__
));
return EFI_INVALID_PARAMETER;
}
if ((NvStorageFtwWorkingBase + NvStorageFtwWorkingSize) != NvStorageFtwSpareBase) {
DEBUG ((DEBUG_ERROR, "%a: NvStorageFtwSpareBase is not contiguous with NvStorageFtwWorkingBase region\n",
__FUNCTION__));
DEBUG ((
DEBUG_ERROR,
"%a: NvStorageFtwSpareBase is not contiguous with NvStorageFtwWorkingBase region\n",
__FUNCTION__
));
return EFI_INVALID_PARAMETER;
}
// Check if the size of the area is at least one block size
if ((NvStorageVariableSize <= 0) || (NvStorageVariableSize / Instance->Media.BlockSize <= 0)) {
DEBUG ((DEBUG_ERROR, "%a: NvStorageVariableSize is 0x%x, should be atleast one block size\n", __FUNCTION__,
NvStorageVariableSize));
DEBUG ((
DEBUG_ERROR,
"%a: NvStorageVariableSize is 0x%x, should be atleast one block size\n",
__FUNCTION__,
NvStorageVariableSize
));
return EFI_INVALID_PARAMETER;
}
if ((NvStorageFtwWorkingSize <= 0) || (NvStorageFtwWorkingSize / Instance->Media.BlockSize <= 0)) {
DEBUG ((DEBUG_ERROR, "%a: NvStorageFtwWorkingSize is 0x%x, should be atleast one block size\n", __FUNCTION__,
NvStorageFtwWorkingSize));
DEBUG ((
DEBUG_ERROR,
"%a: NvStorageFtwWorkingSize is 0x%x, should be atleast one block size\n",
__FUNCTION__,
NvStorageFtwWorkingSize
));
return EFI_INVALID_PARAMETER;
}
if ((NvStorageFtwSpareSize <= 0) || (NvStorageFtwSpareSize / Instance->Media.BlockSize <= 0)) {
DEBUG ((DEBUG_ERROR, "%a: NvStorageFtwSpareSize is 0x%x, should be atleast one block size\n", __FUNCTION__,
NvStorageFtwSpareSize));
DEBUG ((
DEBUG_ERROR,
"%a: NvStorageFtwSpareSize is 0x%x, should be atleast one block size\n",
__FUNCTION__,
NvStorageFtwSpareSize
));
return EFI_INVALID_PARAMETER;
}
// Ensure the Variable area Base Addresses are aligned on a block size boundaries
if ((NvStorageVariableBase % Instance->Media.BlockSize != 0) ||
(NvStorageFtwWorkingBase % Instance->Media.BlockSize != 0) ||
(NvStorageFtwSpareBase % Instance->Media.BlockSize != 0)) {
(NvStorageFtwSpareBase % Instance->Media.BlockSize != 0))
{
DEBUG ((DEBUG_ERROR, "%a: NvStorage Base addresses must be aligned to block size boundaries", __FUNCTION__));
return EFI_INVALID_PARAMETER;
}
@ -187,23 +206,33 @@ ValidateFvHeader (
|| (FwVolHeader->FvLength != FvLength)
)
{
DEBUG ((DEBUG_INFO, "%a: No Firmware Volume header present\n",
__FUNCTION__));
DEBUG ((
DEBUG_INFO,
"%a: No Firmware Volume header present\n",
__FUNCTION__
));
return EFI_NOT_FOUND;
}
// Check the Firmware Volume Guid
if ( CompareGuid (&FwVolHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid) == FALSE ) {
DEBUG ((DEBUG_INFO, "%a: Firmware Volume Guid non-compatible\n",
__FUNCTION__));
DEBUG ((
DEBUG_INFO,
"%a: Firmware Volume Guid non-compatible\n",
__FUNCTION__
));
return EFI_NOT_FOUND;
}
// Verify the header checksum
Checksum = CalculateSum16 ((UINT16 *)FwVolHeader, FwVolHeader->HeaderLength);
if (Checksum != 0) {
DEBUG ((DEBUG_INFO, "%a: FV checksum is invalid (Checksum:0x%X)\n",
__FUNCTION__, Checksum));
DEBUG ((
DEBUG_INFO,
"%a: FV checksum is invalid (Checksum:0x%X)\n",
__FUNCTION__,
Checksum
));
return EFI_NOT_FOUND;
}
@ -211,16 +240,23 @@ ValidateFvHeader (
// Check the Variable Store Guid
if (!CompareGuid (&VariableStoreHeader->Signature, &gEfiVariableGuid) &&
!CompareGuid (&VariableStoreHeader->Signature, &gEfiAuthenticatedVariableGuid)) {
DEBUG ((DEBUG_INFO, "%a: Variable Store Guid non-compatible\n",
__FUNCTION__));
!CompareGuid (&VariableStoreHeader->Signature, &gEfiAuthenticatedVariableGuid))
{
DEBUG ((
DEBUG_INFO,
"%a: Variable Store Guid non-compatible\n",
__FUNCTION__
));
return EFI_NOT_FOUND;
}
VariableStoreLength = PcdGet32 (PcdFlashNvStorageVariableSize) - FwVolHeader->HeaderLength;
if (VariableStoreHeader->Size != VariableStoreLength) {
DEBUG ((DEBUG_INFO, "%a: Variable Store Length does not match\n",
__FUNCTION__));
DEBUG ((
DEBUG_INFO,
"%a: Variable Store Length does not match\n",
__FUNCTION__
));
return EFI_NOT_FOUND;
}
@ -264,7 +300,6 @@ FvbGetAttributes(
// Check if it is write protected
if (Instance->Media.ReadOnly != TRUE) {
FlashFvbAttributes = FlashFvbAttributes |
EFI_FVB2_WRITE_STATUS | // Writes are currently enabled
EFI_FVB2_WRITE_ENABLED_CAP; // Writes may be enabled
@ -471,7 +506,8 @@ FvbRead (
// We need to check each variable individually because adding two large values together overflows.
if ((Offset >= BlockSize) ||
(*NumBytes > BlockSize) ||
((Offset + *NumBytes) > BlockSize)) {
((Offset + *NumBytes) > BlockSize))
{
DEBUG ((DEBUG_ERROR, "FvbRead: ERROR - EFI_BAD_BUFFER_SIZE: (Offset=0x%x + NumBytes=0x%x) > BlockSize=0x%x\n", Offset, *NumBytes, BlockSize));
return EFI_BAD_BUFFER_SIZE;
}
@ -495,6 +531,7 @@ FvbRead (
return EFI_DEVICE_ERROR;
}
}
return EFI_SUCCESS;
}
@ -670,6 +707,7 @@ FvbEraseBlocks (
goto EXIT;
}
} while (TRUE);
VA_END (Args);
//
@ -691,7 +729,6 @@ FvbEraseBlocks (
// Go through each one and erase it
while (NumOfLba > 0) {
// Get the physical address of Lba to erase
BlockAddress = GET_NOR_BLOCK_ADDRESS (
Instance->RegionBaseAddress,
@ -713,6 +750,7 @@ FvbEraseBlocks (
NumOfLba--;
}
} while (TRUE);
VA_END (Args);
EXIT:

29
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashStandaloneMm.c
View File

@ -79,7 +79,8 @@ NOR_FLASH_INSTANCE mNorFlashInstanceTemplate = {
(UINT8)(OFFSET_OF (NOR_FLASH_DEVICE_PATH, End) >> 8)
}
},
{ 0x0, 0x0, 0x0, { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 } }, // GUID ... NEED TO BE FILLED
{ 0x0, 0x0, 0x0, { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 }
}, // GUID ... NEED TO BE FILLED
},
0, // Index
{
@ -123,7 +124,7 @@ NorFlashCreateInstance (
CopyGuid (&Instance->DevicePath.Vendor.Guid, &gEfiCallerIdGuid);
Instance->DevicePath.Index = (UINT8)Index;
Instance->ShadowBuffer = AllocateRuntimePool (BlockSize);;
Instance->ShadowBuffer = AllocateRuntimePool (BlockSize);
if (Instance->ShadowBuffer == NULL) {
return EFI_OUT_OF_RESOURCES;
}
@ -171,6 +172,7 @@ NorFlashUnlockAndEraseSingleBlock (
if (EFI_ERROR (Status)) {
break;
}
Status = NorFlashEraseSingleBlock (Instance, BlockAddress);
Index++;
} while ((Index < NOR_FLASH_ERASE_RETRY) && (Status == EFI_WRITE_PROTECTED));
@ -217,7 +219,6 @@ NorFlashWriteFullBlock (
// Check that the address starts at a 32-word boundary, i.e. last 7 bits must be zero
if ((WordAddress & BOUNDARY_OF_32_WORDS) == 0x00) {
// First, break the entire block into buffer-sized chunks.
BuffersInBlock = (UINTN)(BlockSizeInWords * 4) / P30_MAX_BUFFER_SIZE_IN_BYTES;
@ -226,16 +227,22 @@ NorFlashWriteFullBlock (
for (BufferIndex = 0;
BufferIndex < BuffersInBlock;
BufferIndex++, WordAddress += P30_MAX_BUFFER_SIZE_IN_BYTES, DataBuffer += P30_MAX_BUFFER_SIZE_IN_WORDS
) {
)
{
// Check the buffer to see if it contains any data (not set all 1s).
for (Cnt = 0; Cnt < P30_MAX_BUFFER_SIZE_IN_WORDS; Cnt++) {
if (~DataBuffer[Cnt] != 0 ) {
// Some data found, write the buffer.
Status = NorFlashWriteBuffer (Instance, WordAddress, P30_MAX_BUFFER_SIZE_IN_BYTES,
DataBuffer);
Status = NorFlashWriteBuffer (
Instance,
WordAddress,
P30_MAX_BUFFER_SIZE_IN_BYTES,
DataBuffer
);
if (EFI_ERROR (Status)) {
goto EXIT;
}
break;
}
}
@ -250,7 +257,6 @@ NorFlashWriteFullBlock (
goto EXIT;
}
}
} else {
// For now, use the single word programming algorithm
// It is unlikely that the NOR Flash will exist in an address which falls within a 32 word boundary range,
@ -267,6 +273,7 @@ EXIT:
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "NOR FLASH Programming [WriteSingleBlock] failed at address 0x%08x. Exit Status = \"%r\".\n", WordAddress, Status));
}
return Status;
}
@ -339,7 +346,6 @@ NorFlashFvbInitialize (
ASSERT ((Instance != NULL));
mFlashNvStorageVariableBase = (FixedPcdGet64 (PcdFlashNvStorageVariableBase64) != 0) ?
FixedPcdGet64 (PcdFlashNvStorageVariableBase64) : FixedPcdGet32 (PcdFlashNvStorageVariableBase);
// Set the index of the first LBA for the FVB
@ -352,8 +358,11 @@ NorFlashFvbInitialize (
if (EFI_ERROR (Status)) {
// There is no valid header, so time to install one.
DEBUG ((DEBUG_INFO, "%a: The FVB Header is not valid.\n", __FUNCTION__));
DEBUG ((DEBUG_INFO, "%a: Installing a correct one for this volume.\n",
__FUNCTION__));
DEBUG ((
DEBUG_INFO,
"%a: Installing a correct one for this volume.\n",
__FUNCTION__
));
// Erase all the NorFlash that is reserved for variable storage
FvbNumLba = (PcdGet32 (PcdFlashNvStorageVariableSize) + PcdGet32 (PcdFlashNvStorageFtwWorkingSize) + PcdGet32 (PcdFlashNvStorageFtwSpareSize)) / Instance->Media.BlockSize;

27
ArmPlatformPkg/Drivers/PL061GpioDxe/PL061Gpio.c
View File

@ -7,7 +7,6 @@
**/
#include <PiDxe.h>
#include <Library/BaseLib.h>
@ -40,13 +39,15 @@ PL061Locate (
for (Index = 0; Index < mPL061PlatformGpio->GpioControllerCount; Index++) {
if ( (Gpio >= mPL061PlatformGpio->GpioController[Index].GpioIndex)
&& (Gpio < mPL061PlatformGpio->GpioController[Index].GpioIndex
+ mPL061PlatformGpio->GpioController[Index].InternalGpioCount)) {
+ mPL061PlatformGpio->GpioController[Index].InternalGpioCount))
{
*ControllerIndex = Index;
*ControllerOffset = Gpio % mPL061PlatformGpio->GpioController[Index].InternalGpioCount;
*RegisterBase = mPL061PlatformGpio->GpioController[Index].RegisterBase;
return EFI_SUCCESS;
}
}
DEBUG ((DEBUG_ERROR, "%a, failed to locate gpio %d\n", __func__, Gpio));
return EFI_INVALID_PARAMETER;
}
@ -105,7 +106,6 @@ PL061SetPins (
/**
Function implementations
**/
EFI_STATUS
PL061Identify (
VOID
@ -115,7 +115,8 @@ PL061Identify (
UINTN RegisterBase;
if ( (mPL061PlatformGpio->GpioCount == 0)
|| (mPL061PlatformGpio->GpioControllerCount == 0)) {
|| (mPL061PlatformGpio->GpioControllerCount == 0))
{
return EFI_NOT_FOUND;
}
@ -130,7 +131,8 @@ PL061Identify (
if ( (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID0) != 0x0D)
|| (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID1) != 0xF0)
|| (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID2) != 0x05)
|| (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID3) != 0xB1)) {
|| (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID3) != 0xB1))
{
return EFI_NOT_FOUND;
}
@ -138,7 +140,8 @@ PL061Identify (
if ( (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID0) != 0x61)
|| (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID1) != 0x10)
|| ((MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID2) & 0xF) != 0x04)
|| (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID3) != 0x00)) {
|| (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID3) != 0x00))
{
return EFI_NOT_FOUND;
}
}
@ -222,12 +225,13 @@ Set (
Status = PL061Locate (Gpio, &Index, &Offset, &RegisterBase);
ASSERT_EFI_ERROR (Status);
switch (Mode)
{
switch (Mode) {
case GPIO_MODE_INPUT:
// Set the corresponding direction bit to LOW for input
MmioAnd8 (RegisterBase + PL061_GPIO_DIR_REG,
~GPIO_PIN_MASK(Offset) & 0xFF);
MmioAnd8 (
RegisterBase + PL061_GPIO_DIR_REG,
~GPIO_PIN_MASK(Offset) & 0xFF
);
break;
case GPIO_MODE_OUTPUT_0:
@ -398,7 +402,8 @@ PL061InstallProtocol (
Handle = NULL;
Status = gBS->InstallMultipleProtocolInterfaces (
&Handle,
&gEmbeddedGpioProtocolGuid, &gGpio,
&gEmbeddedGpioProtocolGuid,
&gGpio,
NULL
);
if (EFI_ERROR (Status)) {

1
ArmPlatformPkg/Drivers/PL061GpioDxe/PL061Gpio.h
View File

@ -6,7 +6,6 @@
**/
#ifndef __PL061_GPIO_H__
#define __PL061_GPIO_H__

45
ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c
View File

@ -7,7 +7,6 @@
**/
#include <PiDxe.h>
#include <Library/BaseLib.h>
@ -175,11 +174,11 @@ SP805RegisterHandler (
IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction
)
{
if (mWatchdogNotify == NULL && NotifyFunction == NULL) {
if ((mWatchdogNotify == NULL) && (NotifyFunction == NULL)) {
return EFI_INVALID_PARAMETER;
}
if (mWatchdogNotify != NULL && NotifyFunction != NULL) {
if ((mWatchdogNotify != NULL) && (NotifyFunction != NULL)) {
return EFI_ALREADY_STARTED;
}
@ -363,8 +362,11 @@ SP805Initialize (
EFI_HANDLE Handle;
// Find the interrupt controller protocol. ASSERT if not found.
Status = gBS->LocateProtocol (&gHardwareInterruptProtocolGuid, NULL,
(VOID **)&mInterrupt);
Status = gBS->LocateProtocol (
&gHardwareInterruptProtocolGuid,
NULL,
(VOID **)&mInterrupt
);
ASSERT_EFI_ERROR (Status);
// Unlock access to the SP805 registers
@ -386,17 +388,26 @@ SP805Initialize (
SP805Lock ();
if (PcdGet32 (PcdSP805WatchdogInterrupt) > 0) {
Status = mInterrupt->RegisterInterruptSource (mInterrupt,
Status = mInterrupt->RegisterInterruptSource (
mInterrupt,
PcdGet32 (PcdSP805WatchdogInterrupt),
SP805InterruptHandler);
SP805InterruptHandler
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: failed to register watchdog interrupt - %r\n",
__FUNCTION__, Status));
DEBUG ((
DEBUG_ERROR,
"%a: failed to register watchdog interrupt - %r\n",
__FUNCTION__,
Status
));
return Status;
}
} else {
DEBUG ((DEBUG_WARN, "%a: no interrupt specified, running in RESET mode only\n",
__FUNCTION__));
DEBUG ((
DEBUG_WARN,
"%a: no interrupt specified, running in RESET mode only\n",
__FUNCTION__
));
}
//
@ -406,8 +417,13 @@ SP805Initialize (
ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiWatchdogTimerArchProtocolGuid);
// Register for an ExitBootServicesEvent
Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY,
ExitBootServicesEvent, NULL, &mEfiExitBootServicesEvent);
Status = gBS->CreateEvent (
EVT_SIGNAL_EXIT_BOOT_SERVICES,
TPL_NOTIFY,
ExitBootServicesEvent,
NULL,
&mEfiExitBootServicesEvent
);
if (EFI_ERROR (Status)) {
Status = EFI_OUT_OF_RESOURCES;
goto EXIT;
@ -417,7 +433,8 @@ SP805Initialize (
Handle = NULL;
Status = gBS->InstallMultipleProtocolInterfaces (
&Handle,
&gEfiWatchdogTimerArchProtocolGuid, &mWatchdogTimer,
&gEfiWatchdogTimerArchProtocolGuid,
&mWatchdogTimer,
NULL
);
if (EFI_ERROR (Status)) {

1
ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.h
View File

@ -6,7 +6,6 @@
**/
#ifndef __SP805_WATCHDOG_H__
#define __SP805_WATCHDOG_H__

38
ArmPlatformPkg/Library/ArmMaliDp/ArmMaliDp.c
View File

@ -25,7 +25,9 @@ STATIC UINT32 mDpDeviceId;
**/
STATIC
VOID
LayerGraphicsDisable (VOID)
LayerGraphicsDisable (
VOID
)
{
MmioAnd32 (DP_BASE + DP_DE_LG_CONTROL, ~DP_DE_LG_ENABLE);
}
@ -36,7 +38,9 @@ LayerGraphicsDisable (VOID)
**/
STATIC
VOID
LayerGraphicsEnable (VOID)
LayerGraphicsEnable (
VOID
)
{
MmioOr32 (DP_BASE + DP_DE_LG_CONTROL, DP_DE_LG_ENABLE);
}
@ -227,9 +231,12 @@ ArmMaliDpGetCoreId (
on the platform.
**/
EFI_STATUS
LcdIdentify (VOID)
LcdIdentify (
VOID
)
{
DEBUG ((DEBUG_WARN,
DEBUG ((
DEBUG_WARN,
"Probing ARM Mali DP500/DP550/DP650 at base address 0x%p\n",
DP_BASE
));
@ -266,8 +273,11 @@ LcdInitialize (
}
if (mDpDeviceId == MALIDP_NOT_PRESENT) {
DEBUG ((DEBUG_ERROR, "ARM Mali DP initialization failed,"
"no ARM Mali DP present\n"));
DEBUG ((
DEBUG_ERROR,
"ARM Mali DP initialization failed,"
"no ARM Mali DP present\n"
));
return EFI_NOT_FOUND;
}
@ -285,7 +295,9 @@ LcdInitialize (
**/
STATIC
VOID
SetConfigurationMode (VOID)
SetConfigurationMode (
VOID
)
{
// Request configuration Mode.
if (mDpDeviceId == MALIDP_500) {
@ -303,7 +315,9 @@ SetConfigurationMode (VOID)
**/
STATIC
VOID
SetNormalMode (VOID)
SetNormalMode (
VOID
)
{
// Disable configuration Mode.
if (mDpDeviceId == MALIDP_500) {
@ -321,7 +335,9 @@ SetNormalMode (VOID)
**/
STATIC
VOID
SetConfigValid (VOID)
SetConfigValid (
VOID
)
{
if (mDpDeviceId == MALIDP_500) {
MmioOr32 (DP_BASE + DP_DP500_CONFIG_VALID, DP_DC_CONFIG_VALID);
@ -396,7 +412,9 @@ LcdSetMode (
**/
VOID
LcdShutdown (VOID)
LcdShutdown (
VOID
)
{
// Disable graphics layer.
LayerGraphicsDisable ();

1
ArmPlatformPkg/Library/ArmMaliDp/ArmMaliDp.h
View File

@ -6,6 +6,7 @@
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef ARMMALIDP_H_
#define ARMMALIDP_H_

2
ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNull.c
View File

@ -11,7 +11,6 @@
#include <Ppi/ArmMpCoreInfo.h>
ARM_CORE_INFO mArmPlatformNullMpCoreInfoTable[] = {
{
// Cluster 0, Core 0
@ -139,4 +138,3 @@ ArmPlatformGetPlatformPpiList (
*PpiList = NULL;
}
}

1
ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c
View File

@ -107,6 +107,7 @@ SerialPortPoll (
{
return PL011UartPoll ((UINTN)PcdGet64 (PcdSerialRegisterBase));
}
/**
Set new attributes to PL011.

24
ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c
View File

@ -188,6 +188,7 @@ PL011UartInitializePort (
return RETURN_INVALID_PARAMETER;
}
}
if (0 == UartClkInHz) {
return RETURN_INVALID_PARAMETER;
}
@ -204,13 +205,15 @@ PL011UartInitializePort (
if (((MmioRead32 (UartBase + UARTCR) & PL011_UARTCR_UARTEN) != 0) &&
(MmioRead32 (UartBase + UARTLCR_H) == LineControl) &&
(MmioRead32 (UartBase + UARTIBRD) == Integer) &&
(MmioRead32 (UartBase + UARTFBRD) == Fractional)) {
(MmioRead32 (UartBase + UARTFBRD) == Fractional))
{
// Nothing to do - already initialized with correct attributes
return RETURN_SUCCESS;
}
// Wait for the end of transmission
while ((MmioRead32 (UartBase + UARTFR) & PL011_UARTFR_TXFE) == 0);
while ((MmioRead32 (UartBase + UARTFR) & PL011_UARTFR_TXFE) == 0) {
}
// Disable UART: "The UARTLCR_H, UARTIBRD, and UARTFBRD registers must not be changed
// when the UART is enabled"
@ -227,8 +230,10 @@ PL011UartInitializePort (
MmioWrite32 (UartBase + UARTECR, 0);
// Enable Tx, Rx, and UART overall
MmioWrite32 (UartBase + UARTCR,
PL011_UARTCR_RXE | PL011_UARTCR_TXE | PL011_UARTCR_UARTEN);
MmioWrite32 (
UartBase + UARTCR,
PL011_UARTCR_RXE | PL011_UARTCR_TXE | PL011_UARTCR_UARTEN
);
return RETURN_SUCCESS;
}
@ -347,7 +352,6 @@ PL011UartGetControl (
UINT32 FlagRegister;
UINT32 ControlRegister;
FlagRegister = MmioRead32 (UartBase + UARTFR);
ControlRegister = MmioRead32 (UartBase + UARTCR);
@ -386,7 +390,8 @@ PL011UartGetControl (
}
if ((ControlRegister & (PL011_UARTCR_CTSEN | PL011_UARTCR_RTSEN))
== (PL011_UARTCR_CTSEN | PL011_UARTCR_RTSEN)) {
== (PL011_UARTCR_CTSEN | PL011_UARTCR_RTSEN))
{
*Control |= EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE;
}
@ -419,7 +424,8 @@ PL011UartWrite (
while (Buffer < Final) {
// Wait until UART able to accept another char
while ((MmioRead32 (UartBase + UARTFR) & UART_TX_FULL_FLAG_MASK));
while ((MmioRead32 (UartBase + UARTFR) & UART_TX_FULL_FLAG_MASK)) {
}
MmioWrite8 (UartBase + UARTDR, *Buffer++);
}
@ -448,7 +454,9 @@ PL011UartRead (
UINTN Count;
for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) {
while ((MmioRead32 (UartBase + UARTFR) & UART_RX_EMPTY_FLAG_MASK) != 0);
while ((MmioRead32 (UartBase + UARTFR) & UART_RX_EMPTY_FLAG_MASK) != 0) {
}
*Buffer = MmioRead8 (UartBase + UARTDR);
}

1
ArmPlatformPkg/Library/PL031RealTimeClockLib/PL031RealTimeClock.h
View File

@ -6,7 +6,6 @@
**/
#ifndef __PL031_REAL_TIME_CLOCK_H__
#define __PL031_REAL_TIME_CLOCK_H__

15
ArmPlatformPkg/Library/PL031RealTimeClockLib/PL031RealTimeClockLib.c
View File

@ -46,7 +46,8 @@ IdentifyPL031 (
if ( (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID0) != 0x0D)
|| (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID1) != 0xF0)
|| (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID2) != 0x05)
|| (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID3) != 0xB1)) {
|| (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID3) != 0xB1))
{
Status = EFI_NOT_FOUND;
goto EXIT;
}
@ -55,7 +56,8 @@ IdentifyPL031 (
if ( (MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID0) != 0x31)
|| (MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID1) != 0x10)
|| ((MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID2) & 0xF) != 0x04)
|| (MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID3) != 0x00)) {
|| (MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID3) != 0x00))
{
Status = EFI_NOT_FOUND;
goto EXIT;
}
@ -164,7 +166,6 @@ LibGetTime (
return EFI_SUCCESS;
}
/**
Sets the current local time and date information.
@ -217,7 +218,6 @@ LibSetTime (
return EFI_SUCCESS;
}
/**
Returns the current wakeup alarm clock setting.
@ -242,7 +242,6 @@ LibGetWakeupTime (
return EFI_UNSUPPORTED;
}
/**
Sets the system wakeup alarm clock time.
@ -318,7 +317,8 @@ LibRtcInitialize (
// Declare the controller as EFI_MEMORY_RUNTIME
Status = gDS->AddMemorySpace (
EfiGcdMemoryTypeMemoryMappedIo,
mPL031RtcBase, SIZE_4KB,
mPL031RtcBase,
SIZE_4KB,
EFI_MEMORY_UC | EFI_MEMORY_RUNTIME
);
if (EFI_ERROR (Status)) {
@ -334,7 +334,8 @@ LibRtcInitialize (
Handle = NULL;
Status = gBS->InstallMultipleProtocolInterfaces (
&Handle,
&gEfiRealTimeClockArchProtocolGuid, NULL,
&gEfiRealTimeClockArchProtocolGuid,
NULL,
NULL
);
ASSERT_EFI_ERROR (Status);

26
ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c
View File

@ -26,20 +26,25 @@ LcdIdentify (
VOID
)
{
DEBUG ((DEBUG_WARN, "Probing ID registers at 0x%lx for a PL111\n",
PL111_REG_CLCD_PERIPH_ID_0));
DEBUG ((
DEBUG_WARN,
"Probing ID registers at 0x%lx for a PL111\n",
PL111_REG_CLCD_PERIPH_ID_0
));
// Check if this is a PL111
if (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_0) == PL111_CLCD_PERIPH_ID_0 &&
MmioRead8 (PL111_REG_CLCD_PERIPH_ID_1) == PL111_CLCD_PERIPH_ID_1 &&
(MmioRead8 (PL111_REG_CLCD_PERIPH_ID_2) & 0xf) == PL111_CLCD_PERIPH_ID_2 &&
MmioRead8 (PL111_REG_CLCD_PERIPH_ID_3) == PL111_CLCD_PERIPH_ID_3 &&
MmioRead8 (PL111_REG_CLCD_P_CELL_ID_0) == PL111_CLCD_P_CELL_ID_0 &&
MmioRead8 (PL111_REG_CLCD_P_CELL_ID_1) == PL111_CLCD_P_CELL_ID_1 &&
MmioRead8 (PL111_REG_CLCD_P_CELL_ID_2) == PL111_CLCD_P_CELL_ID_2 &&
MmioRead8 (PL111_REG_CLCD_P_CELL_ID_3) == PL111_CLCD_P_CELL_ID_3) {
if ((MmioRead8 (PL111_REG_CLCD_PERIPH_ID_0) == PL111_CLCD_PERIPH_ID_0) &&
(MmioRead8 (PL111_REG_CLCD_PERIPH_ID_1) == PL111_CLCD_PERIPH_ID_1) &&
((MmioRead8 (PL111_REG_CLCD_PERIPH_ID_2) & 0xf) == PL111_CLCD_PERIPH_ID_2) &&
(MmioRead8 (PL111_REG_CLCD_PERIPH_ID_3) == PL111_CLCD_PERIPH_ID_3) &&
(MmioRead8 (PL111_REG_CLCD_P_CELL_ID_0) == PL111_CLCD_P_CELL_ID_0) &&
(MmioRead8 (PL111_REG_CLCD_P_CELL_ID_1) == PL111_CLCD_P_CELL_ID_1) &&
(MmioRead8 (PL111_REG_CLCD_P_CELL_ID_2) == PL111_CLCD_P_CELL_ID_2) &&
(MmioRead8 (PL111_REG_CLCD_P_CELL_ID_3) == PL111_CLCD_P_CELL_ID_3))
{
return EFI_SUCCESS;
}
return EFI_NOT_FOUND;
}
@ -148,6 +153,7 @@ LcdSetMode (
if (ModeInfo.PixelFormat == PixelBlueGreenRedReserved8BitPerColor) {
LcdControl |= PL111_CTRL_BGR;
}
MmioWrite32 (PL111_REG_LCD_CONTROL, LcdControl);
return EFI_SUCCESS;

2
ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointer.c
View File

@ -28,8 +28,6 @@ PrePeiGetHobList (
return (VOID *)ArmReadTpidrurw ();
}
/**
Updates the pointer to the HOB list.

27
ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.c
View File

@ -26,7 +26,6 @@ InitMmu (
IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable
)
{
VOID *TranslationTableBase;
UINTN TranslationTableSize;
RETURN_STATUS Status;
@ -102,6 +101,7 @@ MemoryPeim (
Found = TRUE;
break;
}
NextHob.Raw = GET_NEXT_HOB (NextHob);
}
@ -142,10 +142,12 @@ MemoryPeim (
if (PcdGet64 (PcdFdBaseAddress) == NextHob.ResourceDescriptor->PhysicalStart) {
if (SystemMemoryTop != FdTop) {
// Create the System Memory HOB for the firmware
BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY,
BuildResourceDescriptorHob (
EFI_RESOURCE_SYSTEM_MEMORY,
ResourceAttributes,
PcdGet64 (PcdFdBaseAddress),
PcdGet32 (PcdFdSize));
PcdGet32 (PcdFdSize)
);
// Top of the FD is system memory available for UEFI
NextHob.ResourceDescriptor->PhysicalStart += PcdGet32 (PcdFdSize);
@ -153,10 +155,12 @@ MemoryPeim (
}
} else {
// Create the System Memory HOB for the firmware
BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY,
BuildResourceDescriptorHob (
EFI_RESOURCE_SYSTEM_MEMORY,
ResourceAttributes,
PcdGet64 (PcdFdBaseAddress),
PcdGet32 (PcdFdSize));
PcdGet32 (PcdFdSize)
);
// Update the HOB
NextHob.ResourceDescriptor->ResourceLength = PcdGet64 (PcdFdBaseAddress) - NextHob.ResourceDescriptor->PhysicalStart;
@ -164,21 +168,26 @@ MemoryPeim (
// If there is some memory available on the top of the FD then create a HOB
if (FdTop < NextHob.ResourceDescriptor->PhysicalStart + ResourceLength) {
// Create the System Memory HOB for the remaining region (top of the FD)
BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY,
BuildResourceDescriptorHob (
EFI_RESOURCE_SYSTEM_MEMORY,
ResourceAttributes,
FdTop,
ResourceTop - FdTop);
ResourceTop - FdTop
);
}
}
// Mark the memory covering the Firmware Device as boot services data
BuildMemoryAllocationHob (PcdGet64 (PcdFdBaseAddress),
BuildMemoryAllocationHob (
PcdGet64 (PcdFdBaseAddress),
PcdGet32 (PcdFdSize),
EfiBootServicesData);
EfiBootServicesData
);
Found = TRUE;
break;
}
NextHob.Raw = GET_NEXT_HOB (NextHob);
}

1
ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c
View File

@ -106,6 +106,7 @@ InitializeMemory (
if (SystemMemoryTop - 1 > MAX_ALLOC_ADDRESS) {
SystemMemoryTop = (UINT64)MAX_ALLOC_ADDRESS + 1;
}
FdBase = (UINTN)PcdGet64 (PcdFdBaseAddress);
FdTop = FdBase + (UINTN)PcdGet32 (PcdFdSize);

4
ArmPlatformPkg/PrePeiCore/AArch64/ArchPrePeiCore.c
View File

@ -41,6 +41,6 @@ PeiCommonExceptionEntry (
SerialPortWrite ((UINT8 *)Buffer, CharCount);
while(1);
while (1) {
}
}

7
ArmPlatformPkg/PrePeiCore/Arm/ArchPrePeiCore.c
View File

@ -50,7 +50,8 @@ PeiCommonExceptionEntry (
CharCount = AsciiSPrint (Buffer, sizeof (Buffer), "Unknown Exception at 0x%X\n\r", LR);
break;
}
SerialPortWrite ((UINT8 *) Buffer, CharCount);
while(1);
}
SerialPortWrite ((UINT8 *)Buffer, CharCount);
while (1) {
}
}

5
ArmPlatformPkg/PrePeiCore/MainMPCore.c
View File

@ -37,7 +37,10 @@ SecondaryMain (
ARM_CORE_INFO *ArmCoreInfoTable;
UINT32 ClusterId;
UINT32 CoreId;
VOID (*SecondaryStart)(VOID);
VOID (*SecondaryStart)(
VOID
);
UINTN SecondaryEntryAddr;
UINTN AcknowledgeInterrupt;
UINTN InterruptId;

6
ArmPlatformPkg/PrePeiCore/PrePeiCore.c
View File

@ -65,8 +65,10 @@ CEntryPoint (
// Enable Instruction Caches on all cores.
ArmEnableInstructionCache ();
InvalidateDataCacheRange ((VOID *)(UINTN)PcdGet64 (PcdCPUCoresStackBase),
PcdGet32 (PcdCPUCorePrimaryStackSize));
InvalidateDataCacheRange (
(VOID *)(UINTN)PcdGet64 (PcdCPUCoresStackBase),
PcdGet32 (PcdCPUCorePrimaryStackSize)
);
//
// Note: Doesn't have to Enable CPU interface in non-secure world,

6
ArmPlatformPkg/PrePeiCore/PrePeiCore.h
View File

@ -6,6 +6,7 @@
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __PREPEICORE_H_
#define __PREPEICORE_H_
@ -40,7 +41,10 @@ SecSwitchStack (
);
// Vector Table for Pei Phase
VOID PeiVectorTable (VOID);
VOID
PeiVectorTable (
VOID
);
VOID
EFIAPI

1
ArmPlatformPkg/PrePi/Arm/ArchPrePi.c
View File

@ -20,4 +20,3 @@ ArchInitialize (
ArmEnableVFP ();
}
}

5
ArmPlatformPkg/PrePi/MainMPCore.c
View File

@ -46,7 +46,10 @@ SecondaryMain (
ARM_CORE_INFO *ArmCoreInfoTable;
UINT32 ClusterId;
UINT32 CoreId;
VOID (*SecondaryStart)(VOID);
VOID (*SecondaryStart)(
VOID
);
UINTN SecondaryEntryAddr;
UINTN AcknowledgeInterrupt;
UINTN InterruptId;

1
ArmPlatformPkg/PrePi/MainUniCore.c
View File

@ -29,4 +29,3 @@ SecondaryMain (
// We must never get into this function on UniCore system
ASSERT (FALSE);
}

24
ArmPlatformPkg/PrePi/PrePi.c
View File

@ -70,17 +70,25 @@ PrePiMain (
FIRMWARE_SEC_PERFORMANCE Performance;
// If ensure the FD is either part of the System Memory or totally outside of the System Memory (XIP)
ASSERT (IS_XIP() ||
ASSERT (
IS_XIP () ||
((FixedPcdGet64 (PcdFdBaseAddress) >= FixedPcdGet64 (PcdSystemMemoryBase)) &&
((UINT64)(FixedPcdGet64 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= (UINT64)mSystemMemoryEnd)));
((UINT64)(FixedPcdGet64 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= (UINT64)mSystemMemoryEnd))
);
// Initialize the architecture specific bits
ArchInitialize ();
// Initialize the Serial Port
SerialPortInitialize ();
CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"UEFI firmware (version %s built at %a on %a)\n\r",
(CHAR16*)PcdGetPtr(PcdFirmwareVersionString), __TIME__, __DATE__);
CharCount = AsciiSPrint (
Buffer,
sizeof (Buffer),
"UEFI firmware (version %s built at %a on %a)\n\r",
(CHAR16 *)PcdGetPtr (PcdFirmwareVersionString),
__TIME__,
__DATE__
);
SerialPortWrite ((UINT8 *)Buffer, CharCount);
// Initialize the Debug Agent for Source Level Debugging
@ -107,6 +115,7 @@ PrePiMain (
} else {
StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize);
}
BuildStackHob (StacksBase, StacksSize);
// TODO: Call CpuPei as a library
@ -199,9 +208,10 @@ CEntryPoint (
// If not primary Jump to Secondary Main
if (ArmPlatformIsPrimaryCore (MpId)) {
InvalidateDataCacheRange ((VOID *)UefiMemoryBase,
FixedPcdGet32 (PcdSystemMemoryUefiRegionSize));
InvalidateDataCacheRange (
(VOID *)UefiMemoryBase,
FixedPcdGet32 (PcdSystemMemoryUefiRegionSize)
);
// Goto primary Main.
PrimaryMain (UefiMemoryBase, StacksBase, StartTimeStamp);