mirror of https://github.com/acidanthera/audk.git
MdeModulePkg/NvmExpressPei: Avoid updating the module-level variable
This commit is out of the scope for BZ-1409. The commit will remove the call of RegisterForShadow() at the entry point of the driver. By doing so, the driver is now possible to be executed without being re-loaded into permanent memory. Thus, this commit will update the NvmExpressPei driver to avoid updating the content of a global variable. Cc: Jian J Wang <jian.j.wang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
This commit is contained in:
Hao Wu
parent
112dcbd9c2
commit
4104423ac0
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@ -1,7 +1,7 @@
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/** @file
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The DMA memory help function.
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Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2018 - 2019, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions
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@ -16,7 +16,33 @@
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#include "NvmExpressPei.h"
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EDKII_IOMMU_PPI *mIoMmu;
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/**
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Get IOMMU PPI.
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@return Pointer to IOMMU PPI.
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**/
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EDKII_IOMMU_PPI *
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GetIoMmu (
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VOID
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)
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{
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EFI_STATUS Status;
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EDKII_IOMMU_PPI *IoMmu;
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IoMmu = NULL;
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Status = PeiServicesLocatePpi (
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&gEdkiiIoMmuPpiGuid,
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0,
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NULL,
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(VOID **) &IoMmu
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);
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if (!EFI_ERROR (Status) && (IoMmu != NULL)) {
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return IoMmu;
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}
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return NULL;
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}
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/**
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Provides the controller-specific addresses required to access system memory from a
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@ -46,18 +72,21 @@ IoMmuMap (
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OUT VOID **Mapping
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)
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{
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EFI_STATUS Status;
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UINT64 Attribute;
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EFI_STATUS Status;
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UINT64 Attribute;
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EDKII_IOMMU_PPI *IoMmu;
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if (mIoMmu != NULL) {
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Status = mIoMmu->Map (
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mIoMmu,
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Operation,
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HostAddress,
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NumberOfBytes,
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DeviceAddress,
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Mapping
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);
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IoMmu = GetIoMmu ();
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if (IoMmu != NULL) {
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Status = IoMmu->Map (
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IoMmu,
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Operation,
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HostAddress,
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NumberOfBytes,
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DeviceAddress,
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Mapping
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);
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if (EFI_ERROR (Status)) {
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return EFI_OUT_OF_RESOURCES;
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}
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@ -78,11 +107,11 @@ IoMmuMap (
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ASSERT(FALSE);
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return EFI_INVALID_PARAMETER;
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}
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Status = mIoMmu->SetAttribute (
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mIoMmu,
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*Mapping,
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Attribute
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);
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Status = IoMmu->SetAttribute (
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IoMmu,
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*Mapping,
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Attribute
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);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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@ -108,11 +137,14 @@ IoMmuUnmap (
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IN VOID *Mapping
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)
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{
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EFI_STATUS Status;
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EFI_STATUS Status;
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EDKII_IOMMU_PPI *IoMmu;
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if (mIoMmu != NULL) {
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Status = mIoMmu->SetAttribute (mIoMmu, Mapping, 0);
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Status = mIoMmu->Unmap (mIoMmu, Mapping);
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IoMmu = GetIoMmu ();
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if (IoMmu != NULL) {
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Status = IoMmu->SetAttribute (IoMmu, Mapping, 0);
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Status = IoMmu->Unmap (IoMmu, Mapping);
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} else {
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Status = EFI_SUCCESS;
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}
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@ -148,39 +180,42 @@ IoMmuAllocateBuffer (
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EFI_STATUS Status;
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UINTN NumberOfBytes;
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EFI_PHYSICAL_ADDRESS HostPhyAddress;
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EDKII_IOMMU_PPI *IoMmu;
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*HostAddress = NULL;
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*DeviceAddress = 0;
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if (mIoMmu != NULL) {
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Status = mIoMmu->AllocateBuffer (
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mIoMmu,
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EfiBootServicesData,
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Pages,
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HostAddress,
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0
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);
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IoMmu = GetIoMmu ();
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if (IoMmu != NULL) {
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Status = IoMmu->AllocateBuffer (
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IoMmu,
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EfiBootServicesData,
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Pages,
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HostAddress,
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0
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);
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if (EFI_ERROR (Status)) {
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return EFI_OUT_OF_RESOURCES;
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}
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NumberOfBytes = EFI_PAGES_TO_SIZE(Pages);
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Status = mIoMmu->Map (
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mIoMmu,
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EdkiiIoMmuOperationBusMasterCommonBuffer,
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*HostAddress,
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&NumberOfBytes,
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DeviceAddress,
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Mapping
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);
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Status = IoMmu->Map (
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IoMmu,
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EdkiiIoMmuOperationBusMasterCommonBuffer,
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*HostAddress,
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&NumberOfBytes,
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DeviceAddress,
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Mapping
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);
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if (EFI_ERROR (Status)) {
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return EFI_OUT_OF_RESOURCES;
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}
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Status = mIoMmu->SetAttribute (
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mIoMmu,
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*Mapping,
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EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE
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);
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Status = IoMmu->SetAttribute (
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IoMmu,
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*Mapping,
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EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE
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);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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@ -219,31 +254,17 @@ IoMmuFreeBuffer (
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IN VOID *Mapping
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)
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{
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EFI_STATUS Status;
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EFI_STATUS Status;
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EDKII_IOMMU_PPI *IoMmu;
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if (mIoMmu != NULL) {
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Status = mIoMmu->SetAttribute (mIoMmu, Mapping, 0);
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Status = mIoMmu->Unmap (mIoMmu, Mapping);
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Status = mIoMmu->FreeBuffer (mIoMmu, Pages, HostAddress);
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IoMmu = GetIoMmu ();
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if (IoMmu != NULL) {
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Status = IoMmu->SetAttribute (IoMmu, Mapping, 0);
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Status = IoMmu->Unmap (IoMmu, Mapping);
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Status = IoMmu->FreeBuffer (IoMmu, Pages, HostAddress);
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} else {
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Status = EFI_SUCCESS;
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}
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return Status;
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}
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/**
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Initialize IOMMU.
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**/
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VOID
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IoMmuInit (
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VOID
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)
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{
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PeiServicesLocatePpi (
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&gEdkiiIoMmuPpiGuid,
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0,
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NULL,
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(VOID **)&mIoMmu
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);
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}
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@ -2,7 +2,7 @@
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The NvmExpressPei driver is used to manage non-volatile memory subsystem
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which follows NVM Express specification at PEI phase.
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Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2018 - 2019, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions
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@ -214,13 +214,6 @@ NvmExpressPeimEntry (
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PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
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EFI_PHYSICAL_ADDRESS DeviceAddress;
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//
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// Shadow this PEIM to run from memory
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//
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if (!EFI_ERROR (PeiServicesRegisterForShadow (FileHandle))) {
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return EFI_SUCCESS;
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}
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//
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// Locate the NVME host controller PPI
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//
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@ -235,8 +228,6 @@ NvmExpressPeimEntry (
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return EFI_UNSUPPORTED;
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}
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IoMmuInit ();
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Controller = 0;
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MmioBase = 0;
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while (TRUE) {
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@ -2,7 +2,7 @@
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The NvmExpressPei driver is used to manage non-volatile memory subsystem
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which follows NVM Express specification at PEI phase.
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Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2018 - 2019, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions
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@ -147,13 +147,9 @@ struct _PEI_NVME_CONTROLLER_PRIVATE_DATA {
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CR (a, PEI_NVME_CONTROLLER_PRIVATE_DATA, EndOfPeiNotifyList, NVME_PEI_CONTROLLER_PRIVATE_DATA_SIGNATURE)
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/**
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Initialize IOMMU.
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**/
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VOID
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IoMmuInit (
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VOID
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);
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//
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// Internal functions
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//
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/**
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Allocates pages that are suitable for an OperationBusMasterCommonBuffer or
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